JPS62266628A - Stopping device for instruction under execution - Google Patents

Abstract

PURPOSE:To stop execution at the optional operand address of a program which is made into a subroutine by storing the operand address at which the execution of the programs stops, and an instruction address for calling a subroutine. CONSTITUTION:For stopping the execution of the program at the operand address of a step S in a subroutine Z which is called in a call source step F, the instruction address of the step S is set to a call source address register 2, and the operand address of the step S in the subroutine Z to a stopping address register 3, and an FF 7 is set. Then the program is executed, whereby a detection circuit 4 transmits a coincidence signal in the step F and makes an FF 6 effective. In the step S, a detection circuit 5 transmits the coincidence signal, and therefore an execution stopping instruction circuit 8 instructs the system to stop the execution.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an instruction execution halting device, and particularly relates to an instruction execution halting device in an information processing device.

BACKGROUND ART Conventionally, in an information processing device, as a method of avoiding stopping the execution of a subroutine program at an fEffi address among the operand addresses of the program, a specified stop address and the instruction address of the calling source of the program are specified. A method is adopted in which the data is stopped when it has been read the same number of times.

In this conventional method, when trying to stop the execution of a program at an arbitrary operand address of a permanent instruction, it is necessary to recognize how the subroutine program is used. The drawback is that it is very difficult to stop a single-gram arbitrary instruction at an arbitrary operand address.

OBJECTS OF THE INVENTION The present invention has been made to eliminate the drawbacks of the conventional ones as described above, and provides an instruction execution stop device that can easily stop an arbitrary instruction of a subroutine program at an operand address. The purpose is to

Structure of the Invention An instruction execution halting device according to the present invention comprises: instruction address storage means for storing an instruction address of a program being executed; calling source instruction address storing means for storing a specific program calling source instruction address in the program; stop address storage means for storing a specific operand address in the program indicated by the address stored in the calling source instruction address storing means, the address stored in the instruction address storing means and the calling source instruction address storing means; Stopping the executing program when the comparison result with the address stored in the instruction address storage means and the comparison result between the address stored in the instruction address storage means and the address stored in the stop address storage means both match. It is characterized by the fact that it is made to do.

1 Next, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, one embodiment of the present invention includes an instruction address register 1 that stores the address of the instruction being executed, a call source address register 2 that stores the subroutine call source address for calling the subroutine to be stopped, and A stop address register 3 that stores the execution stop address of the next step to be executed, and a call source instruction address match detection circuit (hereinafter referred to as a detection circuit) that compares the addresses stored in the instruction address register 1 and the call source address register 2, respectively. 4, a stop address-number construction circuit (hereinafter referred to as a detection circuit) 5 that compares the addresses stored in the instruction address register 1 and stop address register 3, respectively, and a caller instruction address match display flip-flop (hereinafter referred to as a flip-flop). 6, a subroutine operand address stop instruction flip-flop (hereinafter referred to as flip-flop) 7, and an execution stop instruction circuit 8 that instructs the system (not shown) to stop program execution. .

When the address stored in the instruction address register 1 matches the address stored in the caller address register 2, the detection circuit 4 sends a match signal to the flip-flop 6. Flip-flop 6 is set by this coincidence signal and reset when execution shifts from the subroutine to the main routine. Furthermore, when the flip-flop 7 is set, that is, when the output from the flip-flop 7 to the execution stop instruction circuit 8 is logic "1", the flip-flop 6 becomes valid.

When the address stored in instruction address register 1 matches the address stored in stop address register 3,
The detection circuit 5 sends a match signal to the execution stop instruction circuit 8. At this time, if the flip-flop 6 is valid and the flip-flop 7 is set, the execution stop instruction circuit 8 instructs the system to stop the execution of the program.

Further, when the flip-flop 7 is reset and the detection circuit 5 outputs a match signal, the execution stop instruction circuit 8 instructs the system to stop the execution of the program.

FIG. 2 is a diagram showing an example of a subroutine program flow for explaining the 1Ir11 operation of one embodiment of the present invention. The operation of an embodiment of the present invention will be explained using the drawings.

Suppose that calling steps C, F, and I call a subroutine program (hereinafter referred to as a subroutine) 2 consisting of 6 steps P to U. If you want to stop program execution at the operand address in step S, set the instruction address of the calling step F to the calling address register 2, and set the operand address of step S in the subroutine Z to the stop address register. 3 and set flip-flop 7. Thereafter, by executing the program, the detection circuit 4 sends out a coincidence signal in the calling step F, thereby enabling the flip-flop 6. Then, the detection circuit 5 sends out a match signal at the operand address of step S in the subroutine Z called by the calling step F, and as a result, the execution stop instruction circuit 8 instructs the system to stop execution, and step S is executed. After that, program execution stops.

In this way, the operand address in the subroutine program for which you want to stop program execution and the instruction address that calls this subroutine program are memorized, and the instruction address of the program being executed matches these addresses. By stopping the execution of the program at the same time, it is possible to easily stop the execution of the program at any operand address among the instruction addresses of the subroutine program.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, the operand address in a subroutine program for which the execution of the program is to be stopped and the instruction address for calling this subroutine program are stored, To provide an instruction execution stop device that can easily stop a subroutine program at an arbitrary operand address by stopping the program execution when the program instruction address matches these addresses. There is an effect that it can be done.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a subroutine program flow for explaining the operation of the embodiment of the present invention. Explanation of codes of main parts 1... Instruction address register 2... Caller address register 3...
・Stop address register 4...Caller instruction address match detection circuit 5・
... Stop address - number construction circuit 6 ... Call source instruction address match display flip-flop 7 ... Operand address in subroutine stop instruction flip-flop

Claims (2)

[Claims] (1) An instruction address storage means for storing an instruction address of a program being executed, a calling source instruction address storing means for storing a specific program calling source instruction address in the program, and a calling source instruction address storing means storing an instruction address of a specific program in the program; stop address storage means for storing a specific operand address in the program indicated by the address indicated by the address, and a comparison result between the address stored in the instruction address storage means and the address stored in the calling source instruction address storage means. and when the results of comparison between the address stored in the instruction address storage means and the address stored in the stop address storage means match, the executing program is stopped. Instruction execution stop device. (2) The instruction execution stopping device according to claim 1, wherein the executing program is stopped in response to an external command.