JPS622557A - Method for preventing static breakdown of semiconductor device - Google Patents

Method for preventing static breakdown of semiconductor device

Info

Publication number
JPS622557A
JPS622557A JP14077085A JP14077085A JPS622557A JP S622557 A JPS622557 A JP S622557A JP 14077085 A JP14077085 A JP 14077085A JP 14077085 A JP14077085 A JP 14077085A JP S622557 A JPS622557 A JP S622557A
Authority
JP
Japan
Prior art keywords
semiconductor device
film
electrostatic damage
plastic member
preventing electrostatic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14077085A
Other languages
Japanese (ja)
Other versions
JPH0451060B2 (en
Inventor
Isamu Yamamoto
勇 山本
Jiro Fukushima
二郎 福島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14077085A priority Critical patent/JPS622557A/en
Publication of JPS622557A publication Critical patent/JPS622557A/en
Publication of JPH0451060B2 publication Critical patent/JPH0451060B2/ja
Granted legal-status Critical Current

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent a semiconductor device from having a static breakdown by a method wherein a film is formed to cover the surface of the sealing plastic member of the semiconductor device for reducing surface resistance for the reduction of static charges without degrading the performance characteristics of the sealing material. CONSTITUTION:The surface of a sealing plastic member is washed with a solvent or is roughed by other means, whereafter metal heated by plasma or the like is sprayed onto the surface. A metal coating may be formed on the sealing plastic member, instead. Such other means may be employed as the oxidation of the surface in the presence of ozone or active oxygenor the baking of the surface by laser beams or hydrogen flame, which all result in the formation of an oxide film on the sealing plastic member surface. Any such means contributes to the reduction in the resistance to be presented by the sealing plastic member surface.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、プラスチック封止半導体デバイスの静電破
壊防止方法に関し、特に、高度に集積化されたプラスチ
ック封止LSI(大vAix積回路:large  3
calCIntegrated QlrcuiLs )
やVLSI(FB大規模集積回路: Very lar
ge  5cale  l ntegrated C1
rcuits )等の半導体デバイスの静電破壊防止方
法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for preventing electrostatic damage in plastic-sealed semiconductor devices, and in particular, to highly integrated plastic-sealed LSIs (large vAix integrated circuits). 3
calCIntegratedQlrcuiLs)
and VLSI (FB large scale integrated circuit: Very lar
ge 5cale integrated C1
This invention relates to a method for preventing electrostatic damage in semiconductor devices such as electronic devices such as electronic devices.

[従来の技術] 周知のように、半導体デバイスはエポキシ樹脂などを用
いたプラスチック封止(才によって封止され、環境から
保護されている。しかし、従来のプラスチック封止材で
は、使用環境中の水分が封止材中の不純物を溶解して進
入し、アルミニウム配線を腐蝕するようになるなどの欠
点があり十分ではない。
[Prior Art] As is well known, semiconductor devices are protected from the environment by being encapsulated in plastic using epoxy resin or the like. However, with conventional plastic encapsulation materials, This is not sufficient because moisture dissolves impurities in the sealing material and enters, corroding the aluminum wiring.

ところで、近年、半導体デバイスの超微細加工技術が進
歩し、今日では、ミクロンあるいはサブミクロンのオー
ダまで加工することができるようになっている。このよ
うな加工技術を用いて開発された半導体デバイスは、高
度に集積化されているので、環境からの保護は一層強化
される必要がある。このため、このような半導体デバイ
スに用。
Incidentally, in recent years, ultrafine processing technology for semiconductor devices has progressed, and today it has become possible to process devices down to the order of microns or submicrons. Semiconductor devices developed using such processing techniques are highly integrated and require even greater protection from the environment. Therefore, it is used for such semiconductor devices.

いられるプラスチック封止材は、高純度化および高絶縁
化されている。
The plastic sealing material used is highly purified and highly insulated.

[発明が解決しようとする問題点] このように、高純度化および高絶縁化された封止材はア
ルミニウム配線の腐蝕防止には大いに効果があるものの
、他方では、静電気を帯電しやすいという欠点を有する
。このような静電気は、封止材が外界の空気と摩擦した
り、マーキング工程などで他の絶縁物と摩擦して発生す
るが、特に問題となるのは、製品輸送中において、封止
材と製品収納用チューブとの間の摩擦で生じる静電気で
ある。このような静電気の帯電は、封止材の表面抵抗(
11(ρ、)が10”〜10すΩを越えると急激に高ま
る傾向にあり、特に冬場に生じやすい。
[Problems to be Solved by the Invention] As described above, although highly purified and highly insulated sealing materials are highly effective in preventing corrosion of aluminum wiring, they also have the disadvantage of being easily charged with static electricity. has. This type of static electricity is generated when the encapsulant rubs against the outside air or when it rubs against other insulators during the marking process, but a particular problem is when the encapsulant and the encapsulant rub against each other during product transportation. This is static electricity generated by friction between the product and the product storage tube. Such electrostatic charging is caused by the surface resistance (
When 11(ρ, ) exceeds 10'' to 10sΩ, it tends to increase rapidly, and is particularly likely to occur in winter.

このように、帯電した静電気は、サージ電圧としてデバ
イスに作用し、デバイス内9.1気的に弱い絶縁層たと
えばゲート酸化膜などを破壊する。
In this way, the charged static electricity acts on the device as a surge voltage and destroys the extremely weak insulating layer, such as the gate oxide film, in the device.

集積度については、特にたとえば64にダイナミックR
AMを含めて、これよりも高度に集積化されlζ半導体
デバイスが破壊されやすい。
Regarding the degree of integration, for example, Dynamic R
More highly integrated lζ semiconductor devices, including AM, are more likely to be destroyed.

ところで、上述の製品輸送中に静電破壊が生じた場合に
は、出荷時に良品であったものが、使用時には不良品と
なっているので、逐一再検査を行なわなければならず、
極めて煩雑である。
By the way, if electrostatic damage occurs during the above-mentioned product transportation, the product must be re-inspected one by one, as the product may have been good at the time of shipment but becomes defective by the time it is used.
It is extremely complicated.

従来、半導体デバイスを環境から有効に保護するという
特性を犠牲にすることなく、このような輸送中の帯電を
防止するために、製品収納チューブの内面や封止プラス
チックの表面に低絶縁抵抗値を有する塗料を塗布するこ
とが行なわれてきた。
Conventionally, in order to prevent such charging during transportation without sacrificing the ability to effectively protect semiconductor devices from the environment, low insulation resistance values have been applied to the inner surface of the product storage tube and the surface of the sealing plastic. It has been practiced to apply a paint containing

しかし、冬場で大気が乾燥しているときには、抵抗値の
増大や塗膜の剥離が生じるおそれがあり、信頼性ならび
に作業性の面で問題が多い。
However, in the winter when the atmosphere is dry, there is a risk that the resistance value will increase and the coating film will peel off, causing many problems in terms of reliability and workability.

なお、製品収納チューブをアルミニウム等の金属製にす
る方法もあるが、中の製品が外から見えないため、製品
の確認をする際不便であるという問題がある。
Although there is a method of making the product storage tube made of metal such as aluminum, there is a problem that it is inconvenient to check the product because the product inside cannot be seen from the outside.

それゆえに、この発明の目的は、封止材の特性を犠牲に
することなく、プラスチック封止LSI。
Therefore, an object of the present invention is to provide a plastic-encapsulated LSI without sacrificing the properties of the encapsulant.

VLS Iなどの半導体デバイスを輸送する時や、基板
に実装する前に保管をしているときに発生する静電気の
帯電を減少させて、半導体デバイスを静電破壊から防ぐ
方法を提供することである。
The purpose of the present invention is to provide a method to prevent semiconductor devices from being damaged by electrostatic discharge by reducing the electrostatic charge that occurs when semiconductor devices such as VLSI are transported or stored before being mounted on a board. .

[問題点を解決するための手段] この発明では、半導体デバイスの封止プラスチック部材
の表面に膜を形成させて、その表面抵抗を下げるように
している。
[Means for Solving the Problems] In the present invention, a film is formed on the surface of a plastic member for sealing a semiconductor device to lower its surface resistance.

[作用] この発明の半導体デバイスの封止プラスチック部材の表
面は表面抵抗値が低いので、静電気の帯電が減少する。
[Function] Since the surface of the sealing plastic member of the semiconductor device of the present invention has a low surface resistance value, static electricity charging is reduced.

[実施例] 次に、この発明の実施例について詳細に説明する。ここ
で説明する実施例は、封止プラスチック部材の表面を適
宜面荒しまたはアルコール、アセトンもしくはトリクレ
ン等の溶剤による洗浄等の表面処理を行なった侵、その
表面にたとえば、〈1) 加熱あるいはプラズマ加熱さ
れた金属を溶射し、もしくは、 (2) 真空蒸着やスパッタリングなどの化学1fi積
法(CvD)あルイハ物理蒸看法(PVD)により、も
しくは、 (3) 無電解めっきなどのめつき処理により、封止プ
ラスチック表面に金属被膜を形成し、あるいは、また。
[Example] Next, an example of the present invention will be described in detail. In the embodiment described here, the surface of the sealing plastic member is subjected to a surface treatment such as roughening or cleaning with a solvent such as alcohol, acetone, or trichloride, and the surface is subjected to, for example, (1) heating or plasma heating. (2) by chemical vapor deposition (CvD) or physical vapor deposition (PVD) such as vacuum evaporation or sputtering, or (3) by plating treatment such as electroless plating. Forming a metal coating on the surface of the encapsulating plastic, or alternatively.

(4) 低圧水銀ランプの発づる紫外線により、または
プラズマもしくはコロナ放電により発生するオゾンや活
性酸素によりプラスチック表面を酸化処理し、または、 (5) レーザ光線や水素炎によりプラスチック表面を
焼成処理して、 封止プラスチック表面に酸化膜を形成することにより、
封止プラスチック表面の表面抵抗を低下させるものであ
る。ここにおいて、上述の実施例は単に例示にすぎず、
この発明は上述の(1)〜(5)の方法に限定されるも
のではない。
(4) The plastic surface is oxidized by ultraviolet rays emitted by a low-pressure mercury lamp, or by ozone or active oxygen generated by plasma or corona discharge, or (5) The plastic surface is sintered by a laser beam or hydrogen flame. , by forming an oxide film on the surface of the sealing plastic,
This reduces the surface resistance of the sealing plastic surface. Here, the above-mentioned embodiments are merely illustrative;
This invention is not limited to the methods (1) to (5) above.

なお、上述の各処理を実施する際には、半導体デバイス
の各々のリード間の短絡を防止するために、リードの周
囲をマスク等により遮蔽する必要があるが、アース(地
格)ビンについてはこの限りではない。
Note that when performing each of the above-mentioned processes, it is necessary to shield the area around the leads with a mask or the like to prevent short circuits between the leads of the semiconductor device. This is not the case.

また、上述の(1)および(2)については、電気伝導
度が高く、かつ耐酸化性に層れた金、白金、m、アルミ
ニウムまたは銅などが好ましく、さらに必要に応じて、
金属の酸化防止のため、表面に塗料を塗布してもよい。
Regarding (1) and (2) above, it is preferable to use gold, platinum, metal, aluminum, copper, etc., which have high electrical conductivity and are oxidation-resistant, and if necessary,
Paint may be applied to the surface to prevent metal oxidation.

以下に、実験した本発明の実施例と比較例とについて詳
細に説明し、その実験によって得られた結果について述
べる。
Below, the experimental examples of the present invention and comparative examples will be explained in detail, and the results obtained from the experiments will be described.

実施例1 まず、エポキシ樹脂で封止した256にダイナミックR
A Mの封止プラスチックパッケージをトリク1ノンに
より煮沸洗浄し、次に、その表面および裏面に金属アル
ミニウムをプラズマ溶射して、金題被躾を形成させた。
Example 1 First, dynamic R was applied to 256 sealed with epoxy resin.
A sealed plastic package of A.M. was boiled and cleaned with Tric-1-Non, and then metallic aluminum was plasma sprayed on the front and back surfaces to form a metal coating.

これを、プラスチック類の製品用チューブに詰めて、約
4秒サイクルで回転させ、ll*を生じさせて、封止プ
ラスチック表面に静電気を帯電させる実験を1週間実施
した慢、半導体デバイスの各ビンの特性をチェックした
。その結果を第1表に示す。
This was packed into a tube for plastic products and rotated at a cycle of about 4 seconds to generate ll*, and an experiment was conducted for one week to charge static electricity on the surface of the sealed plastic. We checked the characteristics of The results are shown in Table 1.

実施例2 実施例1と同様に、予めトリクレンにより煮゛沸洗浄処
理した256にダイナミックRAMの表面および裏面を
金属アルミニウムを用いてスパッタリング処理を行ない
、金属被膜を形成させた。これを、上述と問憚の方法で
帯電実験に供した後、半導体デバイスの各ビンの特性を
チェックした。
Example 2 In the same manner as in Example 1, the front and back surfaces of the dynamic RAM were sputtered using metal aluminum to form a metal film on 256, which had been previously boiled and cleaned with trichlene. After subjecting this to a charging experiment using the method described above, the characteristics of each bottle of the semiconductor device were checked.

その結果を第1表に示す。The results are shown in Table 1.

実施例3 実施例1および実施例2に用いたのと同じ封止パッケー
ジの表面および裏面にアルミニウムを用いて無電解めっ
き処理を行ない、同様の帯電実験に供した侵、半導体デ
バイスの各ビンの特性をチェックした。その結果を第1
表に示す。
Example 3 Electroless plating treatment was performed using aluminum on the front and back surfaces of the same sealed package used in Example 1 and Example 2, and each bottle of the semiconductor device was subjected to a similar charging experiment. I checked the characteristics. The result is the first
Shown in the table.

実施例4 実施例1〜実施例3に用いたのと同じ封止パッケージの
表面および裏面を水素炎により焼成処理し、同様の帯電
実験に供した侵、半導体デバイスの各ビンの特性をチェ
ックした。その結果を第1表に示す。なおこの実施例に
おいては、トリクレンによる煮沸洗浄は行なわなかった
。  “比較例1および比較例2 実施例1へ・実施例4で用いたのと同じ封止パッケージ
を何ら表面処理することなくそのまま同様の帯電実験に
供した。比較例1は、25℃、相対湿度50%でその表
面抵抗値(ρ、)が10’20以下の低抵抗値を有する
塗料を製品収納チューブの内面に塗布したものであり、
比較例2はその塗料を塗布しなかったものである。その
結果を第1表に示す。
Example 4 The front and back surfaces of the same sealed packages used in Examples 1 to 3 were subjected to firing treatment using a hydrogen flame, and the characteristics of each bottle of semiconductor devices subjected to similar charging experiments were checked. . The results are shown in Table 1. Note that in this example, boiling cleaning with trichlene was not performed. Comparative Example 1 and Comparative Example 2 To Example 1 - The same sealed package used in Example 4 was subjected to the same charging experiment without any surface treatment. A paint having a low resistance value (ρ, ) of 10'20 or less at 50% humidity is applied to the inner surface of the product storage tube,
Comparative Example 2 is one in which the paint was not applied. The results are shown in Table 1.

第1表の結果から明らかなように、本発明の実施例1〜
4は不良発生数が皆蔑であり、封止プラスチック部材の
帯電による半導体デバイスの静電破壊防止に著しい効果
がある。なお、上述の表面酸化処理方法(4)および(
5)は予め封止パッケージの表面処理をする必要がない
ので特に好ま    ′しい。
As is clear from the results in Table 1, Examples 1 to 1 of the present invention
Sample No. 4 has a negligible number of defects and is extremely effective in preventing electrostatic damage to semiconductor devices due to charging of the sealing plastic member. In addition, the above-mentioned surface oxidation treatment method (4) and (
5) is particularly preferred since it is not necessary to perform surface treatment on the sealed package in advance.

[′R,明のvJ果] 以上のように、この発明によれば、半導体装置イスの封
止プラスチック部材の表面に形成された躾は表面抵抗を
下げるので、静電気の帯電は減少するため、半導体デバ
イスは静電破壊を起こすことがなくなる。
['R, Ming's vJ result] As described above, according to the present invention, the surface resistance formed on the surface of the sealing plastic member of the semiconductor device chair lowers the surface resistance, so that static electricity charging is reduced. Semiconductor devices no longer suffer from electrostatic damage.

代理人   大  岩  増  雄 手続補正書(自発) 2、発明の名称 半導体デノくイスの静電破壊防止方法 3、補正をする者 名 称  (601)三菱電機株式会社5、補正の対象 明細書の特許請求の範囲の欄および発明の詳細な説明の
欄 6、補正の内容 (1) 明細−の特許請求の範囲を別紙のとおり。
Agent Masuo Oiwa Procedural amendment (voluntary) 2. Title of the invention: Method for preventing electrostatic damage in semiconductor devices 3. Name of person making the amendment (601) Mitsubishi Electric Corporation 5. Specification subject to amendment Claims column and Detailed Description of the Invention column 6, Contents of amendment (1) Specification - Claims are as attached.

(2) 明細書第3頁第13行ないし第14行の[高純
度化および高絶縁化]を「高純度化すなわち低電気伝導
化」に訂正する。
(2) [High purity and high insulation] on page 3, lines 13 to 14 of the specification is corrected to "high purity, ie, low electrical conductivity."

(3) 明細書第3頁第16行の「高純度化および高絶
縁化」を[高純度化すなわち低電気伝導化」に訂正する
(3) "High purity and high insulation" on page 3, line 16 of the specification is corrected to "high purity, that is, low electrical conductivity."

(4) 明細−第6頁第19行ないし第20行の「iI
化処理」を「処理」に訂正する。
(4) Specification - “iI” on page 6, lines 19 and 20
Correct "processing" to "processing".

(5) 明細書第7頁第3行のrim化膜」を「薄い処
理膜」に訂正する。
(5) In the third line of page 7 of the specification, "rimmed film" is corrected to "thin treated film."

(6) 明細書第3頁第13行ないし第17行の「スパ
ッタリング処理」を[スパッタリング処理(PVD)J
に訂正する。
(6) "Sputtering treatment" on page 3, line 13 to line 17 of the specification was changed to [Sputtering treatment (PVD) J
Correct.

(7) 明細書第゛10頁第14行ないしyA15行の
「表面酸化lI!1y11方法」を「処理方法」に訂正
する。
(7) "Surface oxidation lI!1y11 method" in page 10, line 14 to yA15 of the specification is corrected to "processing method."

以上 2、特許請求の範囲 (1) 封止プラスチック部材によって封止された半導
体デバイスにおいて、帯電による静電破壌を防止する方
法であって、 前記封止プラスチック部材の表面に膜を形成して、表面
抵抗を下げることにより静電破壊を防止するようにした
ことを特徴とする半導体デバイスの静電破壊防止方法。
Above 2, Claim (1) A method for preventing electrostatic damage due to charging in a semiconductor device sealed with a sealing plastic member, comprising forming a film on the surface of the sealing plastic member. A method for preventing electrostatic damage of a semiconductor device, characterized in that electrostatic damage is prevented by lowering surface resistance.

(2) 前記膜は金属溶射により形成された金属被膜で
ある、特許請求の範囲第1項記載の半導体デバイスの静
電破壊防止方法。
(2) The method for preventing electrostatic damage of a semiconductor device according to claim 1, wherein the film is a metal coating formed by metal spraying.

(3) 前記膜は、化学堆積法または物理蒸着法により
形成された金属被膜である、特許請求の範囲第1項記載
の半導体デバイスの静電破壊防止方法。
(3) The method for preventing electrostatic damage in a semiconductor device according to claim 1, wherein the film is a metal film formed by a chemical deposition method or a physical vapor deposition method.

(4) 前記膜は、めっき処理によって形成された金属
被膜である、特許請求の範囲第1項記載の半導体デバイ
スの1%1!破壊防止方法。
(4) The semiconductor device according to claim 1, wherein the film is a metal film formed by plating. Destruction prevention method.

(5) 前記膜は、オゾンまたは活性酸素によ1項記載
の半導体デバイスの静電破壊防止方法。
(5) The method for preventing electrostatic damage of a semiconductor device according to item 1, wherein the film is formed by ozone or active oxygen.

(6) 前記膜は、レーザ光線または水素炎によって焼
成されることによって形成された薄膜層である、特許請
求の範囲第1項記載の半導体デバイスの静電破壊防止方
法。
(6) The method for preventing electrostatic damage of a semiconductor device according to claim 1, wherein the film is a thin film layer formed by firing with a laser beam or a hydrogen flame.

Claims (6)

【特許請求の範囲】[Claims] (1)封止プラスチック部材によって封止された半導体
デバイスにおいて、帯電による静電破壊を防止する方法
であつて、 前記封止プラスチック部材の表面に膜を形成して、表面
抵抗を下げることにより静電破壊を防止するようにした
ことを特徴とする半導体デバイスの静電破壊防止方法。
(1) A method for preventing electrostatic damage caused by charging in a semiconductor device sealed with a sealing plastic member, which prevents static electricity by forming a film on the surface of the sealing plastic member to lower the surface resistance. A method for preventing electrostatic damage in semiconductor devices, characterized in that electrostatic damage is prevented.
(2)前記膜は金属溶射により形成された金属被膜であ
る、特許請求の範囲第1項記載の半導体デバイスの静電
破壊防止方法。
(2) The method for preventing electrostatic damage of a semiconductor device according to claim 1, wherein the film is a metal coating formed by metal spraying.
(3)前記膜は、化学堆積法または物理蒸着法により形
成された金属被膜である、特許請求の範囲第1項記載の
半導体デバイスの静電破壊防止方法。
(3) The method for preventing electrostatic damage in a semiconductor device according to claim 1, wherein the film is a metal film formed by a chemical deposition method or a physical vapor deposition method.
(4)前記膜は、めっき処理によつて形成された金属被
膜である、特許請求の範囲第1項記載の半導体デバイス
の静電破壊防止方法。
(4) The method for preventing electrostatic damage in a semiconductor device according to claim 1, wherein the film is a metal coating formed by plating.
(5)前記膜は、オゾンまたは活性酸素によって酸化さ
れた酸化膜である、特許請求の範囲第1項記載の半導体
デバイスの静電破壊防止方法。
(5) The method for preventing electrostatic damage in a semiconductor device according to claim 1, wherein the film is an oxide film oxidized by ozone or active oxygen.
(6)前記膜は、レーザ光線または水素炎によって焼成
されることによって形成された酸化膜である、特許請求
の範囲第1項記載の半導体デバイスの静電破壊防止方法
(6) The method for preventing electrostatic damage of a semiconductor device according to claim 1, wherein the film is an oxide film formed by firing with a laser beam or a hydrogen flame.
JP14077085A 1985-06-27 1985-06-27 Method for preventing static breakdown of semiconductor device Granted JPS622557A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14077085A JPS622557A (en) 1985-06-27 1985-06-27 Method for preventing static breakdown of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14077085A JPS622557A (en) 1985-06-27 1985-06-27 Method for preventing static breakdown of semiconductor device

Publications (2)

Publication Number Publication Date
JPS622557A true JPS622557A (en) 1987-01-08
JPH0451060B2 JPH0451060B2 (en) 1992-08-18

Family

ID=15276339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14077085A Granted JPS622557A (en) 1985-06-27 1985-06-27 Method for preventing static breakdown of semiconductor device

Country Status (1)

Country Link
JP (1) JPS622557A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02106940A (en) * 1988-10-17 1990-04-19 Semiconductor Energy Lab Co Ltd Manufacture of electronic device
US6756670B1 (en) 1988-08-26 2004-06-29 Semiconductor Energy Laboratory Co., Ltd. Electronic device and its manufacturing method
US10167157B2 (en) 2014-01-27 2019-01-01 Danieli & C. Officine Meccaniche S.P.A. Station for inspecting rolled strips in coils

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58102545A (en) * 1981-12-15 1983-06-18 Nec Corp Hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58102545A (en) * 1981-12-15 1983-06-18 Nec Corp Hybrid integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756670B1 (en) 1988-08-26 2004-06-29 Semiconductor Energy Laboratory Co., Ltd. Electronic device and its manufacturing method
JPH02106940A (en) * 1988-10-17 1990-04-19 Semiconductor Energy Lab Co Ltd Manufacture of electronic device
US10167157B2 (en) 2014-01-27 2019-01-01 Danieli & C. Officine Meccaniche S.P.A. Station for inspecting rolled strips in coils

Also Published As

Publication number Publication date
JPH0451060B2 (en) 1992-08-18

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