JPS622554A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device provided with a high inter-element insulating/isolating capability without causing degradation in performance characteristics of a microstructure transistor formed therein by a method wherein a groove is formed, impurity is allowed in a heat treatment process to be diffused from a second insulating film into a semiconductor substrate for the formation of a diffusion region. CONSTITUTION:After the formation of an SiO2 film 2 on a semiconductor substrate 1, the semiconductor substrate 1 is subjected to a selective, vertical RIE process with the SiO2 film 2 serving as a mask, whereby a groove 3 is formed. Next, a boron-containing silica film 4 is formed by application, which is so shaped as to fill up the groove 3. Heat treatment is accomplished for the diffusion of the boron out of the silica film 4, which results in the formation of a field inversion preventing region 5 on the side wall 3a and bottom 3b of the groove 3. Next, an etchant is used for the removal of the silica film 4 and SiO2 film 2. The groove 2 is then filled up with an SiO2 film 6.

Description

[Detailed Description of the Invention] [Industrial Application] The present invention relates to a method for manufacturing a semiconductor integrated circuit element, and more particularly relates to inter-element insulation isolation technology [Summary of the Invention] In a method of manufacturing a semiconductor device in which an isolation region is formed, a first insulating film is formed on a semiconductor substrate, the first insulating film and the semiconductor substrate are selectively removed, and a groove is formed inside the semiconductor; , forming a silica film containing an m-type impurity having the same conductivity as the impurity of the semiconductor substrate on the entire surface, and diffusing the impurity from the silica film into the semiconductor substrate by heat treatment to form an impurity diffusion region; By removing the first insulating film and the silica film and then filling the groove inside the semiconductor with a second insulating film, a field antireflection region can be easily formed on the side wall of the groove inside the semiconductor. This makes it possible to realize a semiconductor device having a high element-to-element isolation ability without deteriorating the characteristics of the fine transistors formed therein.

[Conventional technology]

Conventional insulating isolation between elements in semiconductor devices uses a silicon nitride film as an oxidation-resistant film, and a thermal oxide film is selectively formed in the region between the elements (field region) using LOOOS.
(Local Oxidation of 5ili
-con) method was widely used.

However, with the progress of element miniaturization, LOOO8
Problems include the occurrence of bird's beaks in the process, narrow channel effects caused by impurities seeping into the channel region from the field region, and crystal defects caused by field oxidation at high temperatures over a long period of time.

Therefore, in general, in order to remove the above obstacles, BOX
(Buried (lxide engineering 5olation
) has been proposed.

A method of manufacturing this type of semiconductor device will be explained with reference to FIG. Here, the semiconductor substrate is of P type.

(1) Silicon oxide (
sio*) [After forming the mask 2 using reactive ion etching (R-E) technology, the above-mentioned Sin.

Using the film 2 as a mask, the semiconductor substrate in the field region is vertically etched using an R process 2 using a chlorine (OL) gas to form a groove 3.

(See figure t! (8) After that, a Sin film 6 is deposited on the entire surface by a vapor phase deposition (OVD) method to a thickness of about 2 μm, which is about 0.2 μm thicker than the depth of the groove.Furthermore, a resist film 8 is applied on the EIiO film 6, The surface is flattened (see FIG. 2(C)). (4) Resist film 8 and Sin formed in the previous step.

The surface is etched back by RE etching under the condition that the etching rate is equal to that of the film 6, and the semiconductor substrate in the element region is exposed while leaving the 5-inch film 6 in the groove. (Figure 2(d)
Reference [Problems and Objectives to be Solved by the Invention] However, although the above-mentioned conventional technology could eliminate the above-mentioned problems, due to the trench digging structure as described above, there is a field in the trench side wall portion 3α. It is difficult to form an anti-inversion region.

Therefore, due to the structure, electric field concentration occurs at both ends of the channel +111 direction of the MOS transistor formed there, and the inversion voltage at both ends decreases.

Therefore, as shown in FIG. 6, there is a problem in that a hump 9 force is generated in the subthreshold characteristic of the transistor.

SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to easily form a field reversal prevention region on the groove side wall portion 5α, and to improve the characteristics of a fine transistor formed there. An object of the present invention is to provide a method for manufacturing a semiconductor device having high inter-element insulation isolation ability without deterioration.

[Means to solve the problem]

In the method for manufacturing a semiconductor device of the present invention, a first
a step of selectively removing the first insulating film and the semiconductor substrate to form a groove inside the semiconductor; and a step of forming a second insulating film on the entire surface; a step of diffusing impurities from the second insulating film to the semiconductor substrate by heat treatment to form an impurity diffusion region;
and a step of removing the second insulating film, and then a step of filling the groove inside the half-necked body with a third insulating film. In this case, it is preferable that the second insulating film is a silica film containing impurities of the same conductivity type as impurities of the semiconductor substrate.

〔Example〕

The details of the present invention will be explained below with reference to the drawings. 1st
The figure is a sectional view showing each step of an embodiment of the present invention. The present invention is carried out through the following steps. Here, the semiconductor substrate is of P type.

(1) Silicon oxide (Sin) on the semiconductor substrate 1
After forming the film 2, the above-mentioned S10. Film 2 is selectively etched. Furthermore, the above S10. The semiconductor substrate 1 is coated with chlorine (a) using the film 2 as a mask.
t) Vertically etching with R process E using gas of 0
．． A groove 5 of 5 to 2 μm is formed. (Figure 1(a)-Irradiation (2)) Next, a silica film film 4 containing boron (B) is formed by a coating method. In this case, a silica film containing boron at a concentration of about 20 mol% is used. A film is preferable.For the formation, for example, an organic solution containing an organosilanol Rn81(OH)4-s as a silicon compound, a boron compound as an additive, and ethanol as a main solvent is applied to the entire surface of the substrate using a spinner for 2,000 to 6,000 mL. rpm
After coating, bake at 500°C for about 1 hour. In this case, the silica film 4 formed by the coating method is formed thickly on the stepped portions and thinly on the flat portions, so that it can be formed in a shape that fills the grooves 3 as shown in FIG. 1Cb).

Further, at 1000°C in a nitrogen atmosphere.

A heat treatment is performed for about 30 minutes to diffuse boron from the silica film 4 and form a field reversal prevention region 5 on the side wall 5α and bottom 5b of the groove. (Figure 1(b)
(8) The silica film membrane 4 and S10. Remove membrane 2. (1st
See Figure (C) (4) Hereinafter, 810, similar to the method described in the conventional technology
By etching back the film 6 and the resist film, the groove 3 is
10. Fill with membrane 6. (Not particularly shown.) As described above, a semiconductor device according to the present invention is obtained.
(See Figure Cd)) As shown in the above embodiment, according to the present invention, after forming a groove in a semiconductor substrate, a silica film containing impurities for preventing field reversal is formed by a coating method. It is possible to form a field reversal prevention region on the side wall portion 3α and the bottom surface 5b of the trench by filling the silica film with heat treatment and diffusing impurities from the silica film into the semiconductor substrate. The test was performed at 1000°C for about 50 minutes, but this was done using a four-gen lamp annealing furnace at 1000-1150°C for 5-50 minutes.
There is no problem even if the heat treatment is performed at a high temperature for a short time of about 20 seconds.

〔Effect of the invention〕

As described above, according to the manufacturing method of the present invention, the groove 0
Since the field reversal prevention region can be easily formed on the JII wall, it is possible to increase the reversal voltage at both ends of the channel width of the fine transistor formed there, which improves the subthreshold characteristics of the transistor. This has the effect that a hump can be removed and a semiconductor device having high inter-element insulation isolation ability can be realized.

Although the above embodiment has been described as a method for insulating and separating between elements of a MOf9 transistor, the present invention is also effective as a method for insulating and separating between elements of a Bibo 2 transistor.

[Brief explanation of drawings]

FIGS. 1(α) to (d) are cross-sectional views showing steps for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2(α) to (d) are
d) is a step-by-step sectional view showing a conventional method for manufacturing a semiconductor device, and FIG. 3 is a subthreshold characteristic diagram of a transistor for explaining the conventional example. 1... Semiconductor substrate 2.6... Insulating film 5... Groove 3α inside the semiconductor substrate...
...Groove side wall 3b...Groove bottom 4...Silica film membrane 5...
... Impurity diffusion region or higher

Claims (2)

[Claims] (1) forming a first insulating film on the semiconductor substrate;
selectively removing the first insulating film and the semiconductor substrate to form a groove inside the semiconductor; forming a second insulating film on the entire surface; and removing the second insulating film from the second insulating film by heat treatment. The steps include diffusing impurities into the semiconductor substrate to form an impurity diffusion region, and removing the first and second insulating films, and then forming a third trench inside the semiconductor.
A method of manufacturing a semiconductor device, comprising the step of filling with an insulating film. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the second insulating film is a silica film containing impurities of the same conductivity type as impurities of the semiconductor substrate.