JPH0685051A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the number of manufacturing processes and to lower the cost, relating to manufacture of semiconductor devices. CONSTITUTION:1) The entire surface of semiconductor substrate is coated with a polishing-resistant insulation film 6, and a isolation grove is formed. And then the isolation groove is filled up, and the substrate is coated with a polycrystalline semiconductor film or an insulation film 6. With the polishing- resistant insulation film used as a polishing stopper, the polycrystalline semiconductor film or the insulation film is polished so that the polycrystalline semiconductor film or the insulation film remains within the isolation groove, for the first layer conductive film formed on the polishing-resistant insulation film. 2) An oxidation-resistant insulation film 4 is formed on the semiconductor substrate, and with the oxidation-resistant insulation film used as a mask, a field oxidation film 5 is formed, so that the first layer conductive film is formed on the oxidation-resistant insulation film and the field oxidation film. 3) The first layer conductive film is formed on the composit film of the oxidation- resistant insulation 4, for forming a field oxidation film, and the polishing- resistant insulation film 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of simplifying a wafer process used for a high speed integrated circuit.

Along with the development of the advanced information processing society, there is a demand for faster computers, faster semiconductor integrated circuits, and high-speed transistors that are components of these semiconductor integrated circuits. On the other hand, simplification of the process is required for miniaturization, high reliability, and cost reduction of high-speed semiconductor integrated circuits.

[0003]

2. Description of the Related Art FIGS. 4 (A) to 4 (E) and FIGS. 5 (F) to 5 (H) are sectional views for explaining a conventional manufacturing method.

This figure shows a U-groove isolation process for a high speed bipolar transistor (the transistor may of course be a MOS type). In FIG. 4 (A), an n ⁺ -Si layer 2 is formed as a buried collector layer on the p-type silicon (p-Si) substrate 1 by thermal diffusion of impurities, and then an n ⁺ -Si layer is formed as an element formation layer.
^- the -Si layer 3 is epitaxially grown.

Next, a silicon nitride (Si ₃ N ₄ ) film 4 is grown as an oxidation resistant film on the entire surface of the substrate by a vapor phase epitaxy (CVD) method, and Si is formed on the element formation region by a normal lithography process.
₃ N ₄ Membrane 4 is left.

In FIG. 4B, the Si ₃ N ₄ film 4 is used as a mask to perform thermal oxidation to form a field oxide film 5. In FIG. 4C, the Si ₃ N ₄ film 4 is removed using hot phosphoric acid.

In FIG. 4 (D), a Si ₃ N ₄ film 6 and a phosphosilicate glass (PSG) film 7 are grown on the entire surface of the substrate to form a resist film 8 having an opening for forming a U groove, and the resist film 8 is formed. The PSG film 7 and the Si ₃ N ₄ film 6 are etched using the mask as a mask.

In FIG. 4E, the field oxide film 5 and the n-Si layer 3 are etched by using the patterned resist film 8, PSG film 7 and Si ₃ N ₄ film 6 as a mask to form a U groove. . The resist film 8 is removed by this etching.

In FIG. 5 (F), PS left by hydrofluoric acid
The G film 7 is removed. Then, using the Si ₃ N ₄ film 6 as a mask, a thermal oxide film having a thickness of about 3000 Å is formed on the surface of the Si substrate exposed inside the U groove.

Next, a polysilicon film 8 is grown on the entire surface of the substrate, polishing is performed using the Si ₃ N ₄ film 6 as a mask, and the polysilicon film 9 is left only inside the U groove. Then,
Using the Si ₃ N ₄ film 6 as a mask, the polysilicon film above the U groove is thermally oxidized to form a SiO ₂ film 10.

In FIG. 5 (G), using hot phosphoric acid, Si
_{The 3} N ₄ film 4 is removed. In FIG. 5 (H), a CVD SiO ₂ film 11 is grown as a base insulating film of a conductive film on the entire surface of the substrate.

[0012]

In the conventional example, the first insulating film (CVD SiO ₂ film 11) under the first conductive film and the oxidation resistant film (Si ₃ N ₄ film 4) at the time of forming the field oxide film are formed. ), And U
The polishing stopper at the time of forming the groove and the inside of the U groove and the oxidation resistant film (Si ₃ N ₄ film 6) at the time of upper oxidation were formed separately.

Therefore, the conventional example has many steps, and
The production yield and reliability were reduced accordingly, resulting in higher costs. It is an object of the present invention to reduce the number of manufacturing steps of a high speed integrated circuit and reduce the cost.

[0014]

Means for Solving the Problems To solve the above-mentioned problems, 1) a step of depositing a polishing resistant insulating film 6 on the entire surface of a semiconductor substrate and forming an isolation groove in an element isolation region; A polycrystalline semiconductor film or an insulating film 9 is embedded and deposited on the semiconductor substrate, and the polycrystalline semiconductor film or the insulating film is polished by using the polishing-resistant insulating film as a polishing stopper to form a polycrystalline semiconductor in the separation groove. A step of leaving a film or an insulating film, and 1 on the polishing-resistant insulating film.
A method for manufacturing a semiconductor device, which includes a step of forming a second conductive film, or 2) forming an oxidation resistant insulating film 4 on an element formation region of a semiconductor substrate, and using the oxidation resistant insulating film as a mask, the semiconductor substrate A method of manufacturing a semiconductor device having a step of forming a field oxide film 5 thereon and a step of forming a first conductive film on the oxidation resistant insulating film and the field oxide film, or 3) element formation of a semiconductor substrate A step of forming an oxidation resistant insulating film 4 on the region and forming a field oxide film 5 on the semiconductor substrate using the oxidation resistant insulating film as a mask; and a polishing resistant insulating film 6 on the entire surface of the semiconductor substrate. And forming an isolation trench in the element isolation region, and filling the isolation trench with a polycrystalline semiconductor film or insulating film 9 on the semiconductor substrate and polishing the polishing-resistant insulating film. Stopper And then polishing the polycrystalline semiconductor film to leave the polycrystalline semiconductor film or the insulating film in the isolation trench, and conducting the first conductive layer on the composite film of the oxidation resistant insulating film and the polishing resistant insulating film. This is achieved by a method for manufacturing a semiconductor device, which has a step of forming a film.

[0015]

The present inventor has found that the above-described base insulating film (CVD SiO ₂ film 1
It is confirmed that there is no problem even if the insulating film (Si ₃ N ₄ film 4) of 1) or the insulating film (Si ₃ N ₄ film 6) of 2) is used together, and there is no problem. It is possible to reduce

[0016]

EXAMPLE 1 FIG. 1 is a sectional view of Example 1 of the present invention. In this example, the above insulating film is also used as the insulating film.

The Si ₃ N ₄ film 6 of FIG. 5 (F) of the conventional example is left without being removed and is used in place of the CVD SiO ₂ film 11 of FIG. 5 (H). 2 (A) to 2 (C) are sectional views of a second embodiment of the present invention.

In this example, the above insulating film is also used as the insulating film. The Si ₃ N ₄ film 4 of the conventional example shown in FIG. 4 (B) is left without being removed, and the Si ₃ N ₄ film 6 of the polishing stubber of FIG. 4 (D) and the CVD SiO ₂ film 11 of FIG. 4 (H) are removed. Use instead.

In FIG. 2 (A), Si ₃ N is formed on the device formation region.
_{The 4} film 4 is formed, and thermal oxidation is performed using the Si ₃ N ₄ film 4 as a mask to form the field oxide film 5. PSG all over the board
A film 7 is grown, and a resist film 8 having a U groove forming portion opened is formed on the film 7.

In FIG. 2B, the resist film 8 and PS
Using the G film 7 as a mask, the field oxide film 5 and n ⁻
-Si layer 3 is etched to form a U-groove. Then, the resist film 8 and the PSG film 7 are removed.

In FIG. 2C, a polysilicon film 9 is grown on the entire surface of the substrate, polishing is performed using the Si ₃ N ₄ film 4 as a mask, and the polysilicon film 9 is left only inside the U groove.
Next, the Si ₃ N ₄ film 6 is used as a mask to thermally oxidize the polysilicon film 9 above the U groove to form a SiO ₂ film 10.

Remains as a base insulating film under the conductive film
The Si ₃ N ₄ film 4 is used. In this embodiment, since the Si ₃ N ₄ film 4 for forming the field oxide film is used instead of the CVD SiO ₂ film 11 of the conventional example, the element isolation is not necessarily U.
The groove may not be formed.

3 (A) to 3 (C) are sectional views of a third embodiment of the present invention. This is an example in which the above insulating film is also used as a composite insulating film. Leaving without removing the Si ₃ N ₄ film 4 of FIG conventional example 4 (B), growing the Si ₃ N ₄ film 6 polishing stopper of FIG. 4 (D) thereon, and the Si ₃ N ₄ film 4 A composite film of Si ₃ N ₄ film 6 is used instead of the CVD SiO ₂ film 11 of FIG. 4 (H).

In FIG. 3 (A), Si ₃ N is formed on the device formation region.
_{The 4} film 4 is formed, and thermal oxidation is performed using the Si ₃ N ₄ film 4 as a mask to form the field oxide film 5. A Si ₃ N ₄ film 6 of PSA and a PSG film 7 are sequentially grown on the entire surface of the substrate, and a resist film 8 having a U groove forming portion opened is formed on the Si ₃ N ₄ film 6 and the PSG film 7.

In FIG. 3B, the resist film 8 and PS
Field oxide film 5 and n-Si using G film 7 as a mask
Layer 3 is etched to form U-grooves. Then, the resist film 8 and the PSG film 7 are removed.

In FIG. 3C, a polysilicon film 9 is grown on the entire surface of the substrate, polishing is performed by using the Si ₃ N ₄ film 6 as a mask, and the polysilicon film 9 is left only inside the U groove.
Then, using the Si ₃ N ₄ films 6 and 4 as a mask, the polysilicon film 9 above the U groove is thermally oxidized to form a SiO ₂ film 10.

Instead of the CVD SiO ₂ film 11 of FIG. 5H, the Si ₃ N ₄ film 6 and the Si ₃ N ₄ remaining as the underlying insulating film under the conductive film are formed.
A composite membrane of ₄ membranes 4 is used. After the steps of these examples,
For example, a high speed bipolar transistor is formed in the element forming region by the process described in Japanese Patent Application Laid-Open No. 62-183558 filed by the present inventor. Alternatively, a MOS FET may be formed.

It is also possible to use an insulating film such as a CVD SiO ₂ film in place of the polysilicon film 9 used in the above embodiment.

[0029]

According to the present invention, the number of manufacturing steps of a high speed integrated circuit can be reduced and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view of a first embodiment of the present invention.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 is a sectional view of a third embodiment of the present invention.

FIG. 4 is a sectional view of a conventional example (1)

FIG. 5 is a sectional view of a conventional example (2)

[Explanation of symbols]

1 Semiconductor substrate p-Si substrate 2 Embedded collector layer n ⁺ -Si layer 3 Element formation layer n-Si epitaxial layer 4 Oxidation resistant insulating film Si ₃ N ₄ film 5 Field oxide film thermally oxidized SiO ₂ film 6 Polishing resistant insulating film 7 Si ₃ N ₄ film 7 PSG film 8 Resist film 9 Polysilicon film or insulating film CVD SiO ₂ film 10 Polysilicon oxide film 11 Underlayer insulating film CVD SiO ₂ film

Claims (3)

[Claims] 1. A process of depositing a polishing resistant insulating film (6) on the entire surface of a semiconductor substrate to form an isolation groove in an element isolation region, and filling the inside of the isolation groove with a polycrystalline semiconductor on the semiconductor substrate. A step of depositing a film or an insulating film (9), polishing the polycrystalline semiconductor film or the insulating film by using the polishing resistant insulating film as a polishing stopper, and leaving the polycrystalline semiconductor film or the insulating film in the separation groove; A method for manufacturing a semiconductor device, comprising a step of forming a first conductive film on the polishing resistant insulating film. 2. A step of forming an oxidation resistant insulating film (4) on an element formation region of a semiconductor substrate and forming a field oxide film (5) on the semiconductor substrate using the oxidation resistant insulating film as a mask. And 1 on the oxidation resistant insulating film and the field oxide film.
A method of manufacturing a semiconductor device, comprising a step of forming a second conductive film. 3. A step of forming an oxidation resistant insulating film (4) on an element formation region of a semiconductor substrate, and forming a field oxide film (5) on the semiconductor substrate using the oxidation resistant insulating film as a mask. And a polishing-resistant insulating film (6) on the entire surface of the semiconductor substrate.
And forming an isolation groove in the element isolation region, and filling the inside of the isolation groove with a polycrystalline semiconductor film or an insulating film (9) on the semiconductor substrate to form the polishing resistant insulating film. Polishing the polycrystalline semiconductor film as a stopper to leave the polycrystalline semiconductor film or the insulating film in the isolation trench, and one layer on the composite film of the oxidation resistant insulating film and the polishing resistant insulating film. A method of manufacturing a semiconductor device, comprising the step of forming an eye conductive film.