JP4549039B2 - Manufacturing method of semiconductor integrated circuit - Google Patents

Description

  The present invention relates to a method of manufacturing a semiconductor integrated circuit in which active elements such as transistors and passive elements are integrated. In particular, a deep groove for insulation isolation is formed between adjacent element regions of a silicon substrate, and The present invention relates to a method for manufacturing a semiconductor integrated circuit in which element isolation is performed by covering an upper surface (upper surface of a deep groove forming portion) with an insulating film.

  In order to electrically isolate conventional semiconductor devices (hereinafter referred to as element regions) of bipolar or BiCMOS semiconductor integrated circuits mainly used for high frequency, the element region on the silicon substrate is partially made of a silicon nitride film. A so-called partial silicon oxide method (Local Oxidation of Silicon (LOCOS)) for forming a partial silicon oxide film between element regions not covered with the silicon nitride film by thermal oxidation after covering with the element region; A so-called deep trench isolation method (DTI) is used in which a deep groove is formed around the inner surface of the trench, an inner wall of the deep groove is covered with an insulating film, and a polysilicon film is embedded in the deep groove. Many.

  In this case, since the process of performing the DTI process after the LOCOS process and the process of performing the LOCOS process after the DTI process are performed, the superiority and inferiority of both are compared. Considering the formation of a polysilicon electrode on the element isolation step, it is necessary to cover the upper surface of the polysilicon film buried in the deep groove with an insulating film. In simple terms, it is preferable to oxidize the polysilicon film after embedding the polysilicon film and etching back the whole. However, in the process of performing the DTI process after the LOCOS process, the oxidation time is added to the oxidation time of the LOCOS process. However, there is a problem that impurities in the silicon substrate introduced before the element isolation step diffuse and deviate from the initial target impurity distribution.

  On the other hand, in the case of performing the LOCOS process after the latter DTI process, in the DTI process, only the polysilicon is buried in the deep groove and etched back, and the upper part of the polysilicon film is oxidized at the time of oxidation in the LOCOS process. This is effective in suppressing the redistribution of impurities in the silicon substrate.

  However, when the process of performing the LOCOS process after the DTI process is employed, a serious problem may occur. This problem will be described with reference to FIG. 3A to 3C are views showing a cross section of an element isolation process in which a LOCOS process is performed after the DTI process. 3A to 3C, 11 is a silicon substrate, 12A and 12C are silicon oxide films, 13 is a partially oxidized silicon film, 14 is a silicon nitride film, 15 is a deep groove, 16 is a polysilicon film, and 17 is an element. Region 18 is a Bard's Beak.

  First, the deep groove 15 is formed in the silicon substrate 11, the upper surface including the inner wall of the deep groove 15 is oxidized to form the silicon oxide films 12A and 12C, and then the polysilicon film is deposited from the upper surface. Then, the polysilicon film on the surface side is etched back to leave the polysilicon film 16 only in the deep groove 15. Next, when the silicon nitride film is deposited and then the other silicon nitride film is removed while leaving the silicon nitride film 14 only in the element region with a mask, the structure shown in FIG. 3A is obtained.

  Next, the silicon substrate 11 is oxidized in a high-temperature oxygen / hydrogen mixed gas to form a partial silicon oxide film (LOCOS film) 13 in a region not covered with the silicon nitride film 14 (FIG. 3B). ). Finally, when the silicon nitride film 14 and the underlying silicon oxide film 12A are removed, an element isolation structure is formed in which the element region 17 is exposed and insulated from the other element regions (FIG. 3C).

Here, when the LOCOS film in FIG. 3B is oxidized, not only the silicon substrate 11 and the polysilicon film 16 exposed on the surface are oxidized, but oxygen is also oxidized along the inner wall of the deep groove 15. In order to diffuse through the silicon film 12C, the adjacent silicon substrate 11 and polysilicon film 16 are oxidized, and so-called bird's beaks 18 grow perpendicularly to the silicon substrate 11 along with the oxidation. Since this oxidation is accompanied by an increase in volume, a large force is applied to the silicon substrate 11. This force increases as the bird's beak 18 is larger or as the oxidation temperature is lower, and when the force applied to the silicon substrate 11 reaches a limit, a crystal defect is generated (Non-patent Document 1). In addition, Patent Documents 1 to 3 describe that the element region is insulated and separated from the other by the deep groove.
F. Yang et al., “Characteristics of Collector-Emitter Leakage in Self-Aligned Double Polybipolar Junction Transistors”, Journal of Electrochemical Society, Vol. 140, No. 10, pp. 3033-3037, 1993 (F. Yang et al, “Characterization of Collector-Emitter Leakage in Self-Aligned Double-Poly Bipolar Junction Transistors” Journal of the Electrochemical Society, 140, 10, pp. 3033-3037 (1993)). JP 2002-190514 A Japanese Patent Laid-Open No. 2002-076109 Japanese Patent Laid-Open No. 06-232248

  In order to prevent this, it is effective to reduce the thickness of the silicon oxide film 12C on the inner wall of the deep groove 15 or raise the oxidation temperature. However, reducing the thickness of the silicon oxide film 12C on the inner wall of the deep groove 15 lowers the breakdown voltage of element isolation, and increases the isolation capacitance, leading to deterioration of high frequency characteristics. Further, when the oxidation temperature is raised, impurities in the silicon substrate 11 introduced before the element isolation step diffuse and deviate from the initial target impurity distribution, thereby reducing the original advantages of this process.

  The present invention has been made in order to solve the above-mentioned problems, and crystal defects can be generated without impairing the feature that the heat redistribution time, which is the advantage of performing the LOCOS process after the DTI process, is small and the redistribution of impurities can be suppressed. An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit for device isolation that can suppress the above-described problem.

In the manufacturing method according to the first aspect of the present invention, element isolation is performed by forming a deep groove for insulation isolation between adjacent element regions of a silicon substrate and forming an insulating film on the upper surface between the element regions. the method for manufacturing a semiconductor integrated circuit, said by the thermal oxidation of the first silicon nitride film covering the element region as a mask the silicon substrate, the first partial oxidation silicon film of less thickness than the required thickness as the insulating film Is formed on the silicon substrate, and a silicon oxide film is formed on the upper surface of the first silicon nitride film . After the first step, the silicon oxide film on the upper surface of the first silicon nitride film and the A second step of forming a second silicon nitride film so as to cover the first partial silicon oxide film; and after the second step, a mask for processing the deep groove on the second silicon nitride film. Forming a click, by etching the second silicon nitride film and the silicon substrate, and a third step of forming the deep groove on the silicon substrate, after the third step, the inner wall of the deep grooves A fourth step of filling the deep groove with a polysilicon film after forming an insulating film; and after the fourth step, the first oxide film on the upper surface of the first silicon nitride film is used as a mask to form the first groove with boiling phosphoric acid . A fifth step of removing the silicon nitride film; and after the fifth step, a silicon oxide film is further formed on the first partial silicon oxide film by thermal oxidation using the first silicon nitride film as a mask, and the insulation dividing a sixth step of forming a second partial oxidation silicon film of the required thickness as film, after the sixth step, the silicon oxide film and the first silicon nitride film of the first silicon nitride film top Characterized by comprising a seventh step of, a.

  By using the manufacturing method of the present invention, it is possible to overcome the trade-off between suppression of crystal defects and prevention of redistribution of impurities when manufacturing an element isolation structure using a deep groove and a partially oxidized silicon film. As a result, higher performance semiconductor integrated circuits can be manufactured.

  In the present invention, a part of the LOCOS oxidation is performed first, the second silicon nitride film is formed with the first silicon nitride film used for the selective oxidation being left as it is, and a deep groove is formed using the second silicon nitride film as a mask. After oxidizing the inner side wall of the deep groove, a polysilicon film is buried in the deep groove and etched back, and then the second silicon nitride film is removed. For this removal, boiling phosphoric acid is used. If the boiling phosphoric acid is kept in the best condition, the silicon oxide film is hardly etched in this solution. Since a thin silicon oxide film is grown on the surface of the first silicon nitride film by the first LOCOS oxidation, the first silicon nitride film is not etched even after the second silicon nitride film is removed using this as a mask. Remains on the surface. Therefore, the remaining LOCOS oxidation is performed using this as a mask to obtain a desired insulating film on a silicon substrate that does not become an element region. At this time, since the polysilicon film buried in the deep groove is also oxidized, the upper surface of the polysilicon film is covered with an insulating film, and electrical insulation can be performed between the polysilicon film formed on the upper surface after the next step.

  By this method, the length of LOCOS oxidation (remaining LOCOS oxidation) time including oxidation of the polysilicon film in the deep groove in the DTI process can be arbitrarily set, so that the inner wall of the deep groove is maintained while maintaining a predetermined LOCOS oxide film thickness. In addition, the bird's beak that grows in the vertical direction can be suppressed to a level that does not lead to crystal defects. Therefore, it is possible to increase the oxide film thickness of the inner wall of the deep groove, or to reduce the redistribution of impurities by lowering the oxidation temperature.

  Hereinafter, the manufacturing process (element isolation process) of the present invention will be described in detail with reference to FIGS. 1 (a) to 1 (c) and FIGS. 2 (d) to 2 (e) are cross-sectional views showing an example of the manufacturing process of the first embodiment of the present invention. In FIGS. 1A to 1C and FIGS. 2D to 2E, 11 is a silicon substrate, 12A, 12B and 12C are silicon oxide films, 13A is a first partial silicon oxide film, and 13B is a second part. A silicon oxide film (final partial silicon oxide film), 14A is a first silicon nitride film, 14B is a second silicon nitride film, 15 is a deep groove, 16 is a polysilicon film, and 17 is an element region.

First, a thin thermally oxidized silicon film 12A and a first silicon nitride film 14A are formed on the silicon substrate 11 that has been subjected to the steps before the element isolation step. Here, a silicon nitride film having a thickness of 200 nm was deposited on the thermally oxidized silicon film 12A by a reduced pressure chemical vapor deposition method using SiH ₂ Cl ₂ and NH ₃ gas on the film thickness of 56 nm. Next, a mask is applied so as to leave a part of the element region, and the silicon nitride film in the other part is removed to leave the first silicon nitride film 14A.

  Thereafter, the first partial silicon oxide film 13A is grown on the portion not covered with the first silicon nitride film 14A by LOCOS thermal oxidation (first step) (FIG. 1A). In the first step, the entire required silicon oxide film thickness is not formed on the silicon substrate 11 but stopped halfway. Here, the first partial silicon oxide film 13A having a thickness of 200 nm was grown in a mixed gas of oxygen and hydrogen at a temperature of 950 ° C. At this time, the surface of the first silicon nitride film 14A is also oxidized thinly, and the first silicon nitride film 14A is covered with the silicon oxide film 12B. The thickness of the silicon oxide film 12B is about 3% of the thickness of the first partial silicon oxide film 13A grown on the silicon. Here, the silicon oxide film 12B having a thickness of about 6 nm is grown.

  Next, a second silicon nitride film 14B is formed (second step). In the second step, the second silicon nitride film 14B having a thickness of 100 nm was deposited using the same chemical vapor deposition method. This second silicon nitride film 14B is used as a mask for deep groove etching in the DTI process, and is necessary for preventing oxidation of the surface other than the deep groove during oxidation of the inner wall of the deep groove after the deep groove etching.

Next, a deep groove mask is applied on the deposited second silicon nitride film 14B to etch the second silicon nitride film 14B, and the silicon substrate 11 is etched using the second silicon nitride film 14B as a mask to form deep grooves 15. (Third step). In this third step, the groove width of the deep groove 15 is 800 nm, and the second silicon nitride film 14B is etched by a reactive ion etching method using CF ₄ and CHF ₃ as etching gases. The deep groove 15 was etched by a depth of 5 μm by a reactive ion etching method using a mixed gas of HBr, SiF ₄ and O ₂ .

Thereafter, in order to electrically insulate the deep groove 15, the inner wall of the deep groove 15 is oxidized and covered with the silicon oxide film 12C. Here, a silicon oxide film 12C having a film thickness of 100 nm was grown in a mixed gas of oxygen and hydrogen at a temperature of 950 ° C. Then, a polysilicon film is deposited so that the deep groove 15 is filled. The film thickness of this polysilicon film must be at least thicker than half the deep groove width in order to fill the deep groove 15, and here, the polysilicon film of 800 nm, which is the same as the groove width, is subjected to reduced pressure chemistry using SiH ₄ gas. Deposited using a chemical vapor deposition method. Further, this entire polysilicon film is etched to leave the polysilicon film 16 only in the deep groove 15 (fourth step) (FIG. 1B).

Here, the reactive ion etching method using a mixed gas of Cl ₂ and O ₂ is used for this etching, and the film thickness is set to an etching time longer than that for etching, so that the polysilicon surface in the deep groove 15 is etched. Even if the height is maximum, it is made to coincide with the upper surface of the first partially oxidized silicon film 13A that is oxidized first. Thus, after the LOCOS oxidation including the next deep trench polysilicon film 16, the silicon oxide film on the upper surface of the polysilicon film 16 protrudes excessively from the surface of the first partial silicon oxide film 13A, and the flatness deteriorates. It was prevented.

  Next, after cleaning the silicon substrate 11 and dilute hydrofluoric acid treatment, the second silicon nitride film 14B is removed with a boiling phosphoric acid solution (fifth step). Here, the first silicon nitride film 14A appears on the surface after the removal of the second silicon nitride film 14B, but the surface is covered with the silicon oxide film 12B that has grown thinly during the first LOCOS thermal oxidation. Since the silicon oxide film 12B is hardly etched by boiling phosphoric acid, the first silicon nitride film 14A remains without being removed even after the boiling phosphoric acid solution treatment (FIG. 1 (c)). Here, etching was performed at a temperature of 150 ° C. for 30 minutes using a phosphoric acid solution with adjusted water concentration. At this time, the etching rate of the second silicon nitride film 14B was 4 nm / min, and the first silicon nitride film 14A was not etched at all in this process.

  Next, using this first silicon nitride film 14A as a mask, LOCOS thermal oxidation is performed again to finally obtain a second partial silicon oxide film 13B having a required film thickness (sixth step) (FIG. 2 (d)). . Here, a 400 nm silicon oxide film was further grown in a mixed gas of oxygen and hydrogen at a temperature of 950 ° C., and finally a second partial silicon oxide film thickness 13B of 600 nm was obtained.

  Finally, after removing the silicon oxide film 12B on the first silicon nitride film 14A with dilute hydrofluoric acid, etching is performed with boiling phosphoric acid solution to remove the first silicon nitride film 14A to expose the element region 17, The element isolation step is finished (seventh step) (FIG. 2 (e)).

  In the above, in order to obtain the second silicon oxide film 13B having a thickness of 600 nm, the LOCOS oxidation is performed by dividing into 200 nm and 400 nm twice, but the ratio of this division can be arbitrarily changed. A process problem related to this division is a tradeoff between securing the final thickness of the partial silicon oxide film on the polysilicon film 16 in the deep groove 15 and crystal defects. If there is a concern about crystal defects due to the film thickness of the silicon oxide film 12C on the inner wall or the temperature restriction during LOCOS thermal oxidation, the film thickness of the first partial silicon oxide film 13A in the first LOCOS thermal oxidation may be increased. However, the film thickness due to the second LOCOS thermal oxidation decreases, and the second partial silicon oxide film thickness 13B on the polysilicon film 16 in the deep groove 15 decreases. However, compared with the process restrictions of the conventional process, the restrictions are greatly reduced and the degree of freedom of the process is greatly increased.

(a)-(c) is sectional drawing which shows the element isolation process of Example 1. FIG. (d)-(e) is sectional drawing which shows the element isolation process of Example 1. FIG. (a)-(c) is sectional drawing which shows the conventional element isolation process.

Explanation of symbols

11: silicon substrates 12A, 12B, 12C: silicon oxide film 13: partial silicon oxide film 13A: first partial silicon oxide film 13B: second partial silicon oxide film 14: silicon nitride film 14A: first silicon nitride film 14B: first Silicon nitride film 15: Deep groove 16: Polysilicon film 17: Element region 18: Bead bark

Claims (1)

In a method for manufacturing a semiconductor integrated circuit in which element isolation is performed by forming a deep groove for insulation isolation between adjacent element regions of a silicon substrate and forming an insulating film on an upper surface between the element regions.
By the thermal oxidation of the first silicon nitride film covering the element region as a mask on the silicon substrate, to form the insulating layer first portion silicon oxide film of less thickness than the required thickness as the silicon substrate And a first step of forming a silicon oxide film on the upper surface of the first silicon nitride film ;
After the first step, a second step of forming a second silicon nitride film so as to cover the silicon oxide film and the first partial silicon oxide film on the upper surface of the first silicon nitride film;
After the second step, to form a mask for processing of the deep groove on the second silicon nitride film, by etching the second silicon nitride film and the silicon substrate, the deep groove on the silicon substrate A third step of forming
After the third step, a fourth step of filling the deep groove with a polysilicon film after forming an insulating film on the inner wall of the deep groove;
After the fourth step, a fifth step of removing the second silicon nitride film with boiling phosphoric acid using the silicon oxide film on the upper surface of the first silicon nitride film as a mask ;
After the fifth step, by using the first silicon nitride film as a mask, a silicon oxide film is further formed on the first partial silicon oxide film by thermal oxidation, and a second partial silicon oxide film having a necessary thickness as the insulating film is formed. A sixth step of forming a film;
After the sixth step, a seventh step of removing the silicon oxide film and the first silicon nitride film on the upper surface of the first silicon nitride film ;
A method for manufacturing a semiconductor integrated circuit, comprising:

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