JPS6225339A - In-circuit emulator - Google Patents

Abstract

PURPOSE:To reduce bus connection lines in number by sampling queue fetch information in a trace memory while using a bus for emulation as a transfer bus for the queue fetch information on time-division basis at the nonactive timing of bus fetch operation. CONSTITUTION:A microprocessor fetches data from a memory through a bus in a section A. An in-circuit emulator sends data to the microprocessor through a bus 11 from an emulation memory 20 and also stores the data in a sample memory through a latch 31 in a period A wherein the memory space is assigned to the emulation memory. In a section B, queue fetch information generated by the instruction pre-fetch tracing circuit 12' in a personal module 10 is transferred to the sample memory 32 and sampled.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to in-circuit emulators, and more particularly to improved emulation sample trace functionality.

<Prior Art> A large number of devices A'''I products to which a microprocessor (hereinafter referred to as μP) is applied have been appearing in the past.

While these devices and products have diversified functions, simplified installation, and reduced the number of production steps, inspection and
Maintenance, troubleshooting, etc. are becoming increasingly difficult. This is due to the intervention of software, the conversion of circuits to LSI,
Furthermore, since software and hardware are intricately intertwined and operate, it has become difficult to detect the cause of a failure.

Recently, 8ff is suitable for analyzing the operation of such μP applied equipment.
In-circuit emulators have emerged as one of the i. , an in-circuit emulator connects the target microprocessor LS from the IC socket on the board under test.
I can be removed and a probe can then be connected to emulate that microprocessor.

Among these in-circuit emulators, those that override the microprocessor υ that performs prefetching (prefetching instruction codes) are conventional bus emulators.
The conventional method used was to separate trace data and queue trace data, sample them separately using data latches, and then write them to the trace memory. FIG. 3 is a configuration diagram showing an example of a circuit portion having a sample trace function in such an in-circuit emulator.

In the figure, 10 is a personal module created according to the target microprocessor, which has an instruction prefetch tracking circuit 12 for pre-fetching instruction codes on a bus 11 connected to the target microprocessor.

20 is an emulation memory.

21 and 22 are buses, respectively.

30 is a trace module, which includes data latches 31 and 32 that latch bus trace data and queue trace data, respectively, and bus trace data taken into the data latches.
It has a sample memory 33 that stores trace data and queue trace data.

(Problems to be Solved by the Invention) In such a conventional emulator, buses 21 and 22 for bus tracing and queue tracing are provided separately and independently, which is uneconomical.

In view of the above points, an object of the present invention is to - provide two independent buses;
An object of the present invention is to provide an in-circuit emulator having a sample trace function capable of performing brief-fetch-compatible tracing on one bus without having to provide an in-circuit emulator.

(Means for solving the problem) In order to achieve such an object, the present invention pre-fetches an instruction, determines whether or not the instruction has been executed, and outputs the result to the emulation bus. An instruction preemption tracking circuit configured for emulation, an emulation memory connected to an emulation bus, and a sample memory connected to the emulation bus for sampling and storing queue fetch information. The present invention is characterized in that the bus is used as a transfer bus for queue fetch information in a time-division manner at inactive timings of bus fetch operations, and the queue fetch information is sampled in the trace memory.

(Example) The present invention will be described in detail below using the drawings. FIG. 1 is a block diagram of the main parts of an in-circuit emulator according to the present invention. Parts equivalent to those in Figure 3 are given the same symbols. In the personal module 10, 13 is a buffer;
Is it a bidirectional buffer? It is. Bidirectional buffer 14
The control (directional control) is controlled by a control signal from a central processing unit (host CPU) not shown. The output of the buffer 13 is OR-coupled with the bidirectional buffer side and connected to one bus 23. This bus 23 is connected to data latches 31 of trace module 30.

The operation in such a configuration will be explained next.

An example of a microprocessor is the 8-bit microcomputer G303 series (ROM) manufactured by Hitachi.

It is a 0MO8 type one-chip microcomputer with RAM, and has assembly level program compatibility with Motorola's 6803 microprocessor. )
Take the example of a microprocessor.

FIG. 2 shows the operation of the bus of this microprocessor. In section A, the microprocessor is actually taking in data from the memory via the bus. The in-circuit emulator sends data from the emulation memory 20 to the microprocessor via the bus 11 during this period A when the memory space is allocated to the emulation memory, and also sends this data to the sample memory 32 via the latch 31. Remember.

In the present invention, the timing of section B is further utilized to generate queue fetch information (logic circuit output for determining whether or not a brief-etched instruction has been executed) generated by the instruction prefetch tracking circuit 12- in the personal module 10.
is transferred to the sample memory 32 and zumbled.

(Effects of the Invention) As explained below, according to the present invention, the conventional method of preparing two sets of independent buses and tracing the briffet data is changed to a single bus method. The number of bus connection lines can be reduced and an economical system can be realized.

Note that the in-circuit emulator of the present invention is not limited to 6303 series microprocessors, but can also be applied to synchronous briffet type microprocessors.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of main parts showing an example of an in-circuit emulator according to the present invention, Fig. 2 is a time chart for explaining the operation, and Fig. 3 is a conventional in-circuit emulator!・・・
FIG. 2 is a configuration diagram showing an example of a main part of an emulator. 10... Parts Nord Module, 11.23...
Bus, 12.12'...Instruction preemption tracking circuit, 20...
- Emulation memory, 30... Trace module, 31... Data latch, 32... Sample memory.

Claims (1)

[Claims] An instruction prefetch tracking circuit configured to prefetch an instruction, determine whether the instruction has been executed, and output the result to an emulation bus; and an emulation device connected to the emulation bus. a sample memory connected to the emulation bus for sampling and storing queue fetch information; and a sample memory connected to the emulation bus for sampling and storing queue fetch information. An in-circuit emulator characterized in that it is configured to be used as a transfer bus and sample queue fetch information in a trace memory.