JPS622530A - Impurity thermal diffusion into semiconductor substrate - Google Patents

Impurity thermal diffusion into semiconductor substrate

Info

Publication number
JPS622530A
JPS622530A JP14077185A JP14077185A JPS622530A JP S622530 A JPS622530 A JP S622530A JP 14077185 A JP14077185 A JP 14077185A JP 14077185 A JP14077185 A JP 14077185A JP S622530 A JPS622530 A JP S622530A
Authority
JP
Japan
Prior art keywords
diffusion
semiconductor substrate
film
substrate
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14077185A
Other languages
Japanese (ja)
Inventor
Tetsuya Yagi
哲哉 八木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14077185A priority Critical patent/JPS622530A/en
Publication of JPS622530A publication Critical patent/JPS622530A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a III-V Group compound semiconductor substrate from decompos ing even if the pressure of the V Group element is not applied to the semiconductor substrate at the time of thermal diffusion of an impurity and to enable stable thermal diffusion of the impurity by a method wherein a film; having a large diffusion coeffi cient and a small diffusion coefficient is provided on the substrate. CONSTITUTION:A wafer 1 is constituted of a III-V Group compound semiconductor substrate 2, diffusion masks 4 and a film 3. The film 3 has a large diffusion coefficient of diffusing substance 7 and small diffusion coefficient of the substrate-constituting element. An SiO2 film, for example, is used for the film 3. For the diffusion masks 4, an Si3N4 film, for example, is used. The wafer 1 is vacuum-sealed in a quartz ampul 6 along with a diffusing substance, such as the Zn 7, and when a heat treatment is performed, such as impurity as the Zn is diffused in the semiconductor substrate in the parts where the Si3N4 diffusion masks are not provided, because the diffusion coefficient of the Zn is large in the SiO2 film. However, the volatilization of the V Group element handly generate from the semiconductor substrate because the diffusion coefficient of the V Group element in the SiO2 film is small. As a result, the substrate can be prevented from being decomposed.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は半導体基板への不純物熱拡散方法に関し、特
に、■−v族化合物半導体基板たとえばGaAS基板へ
のZnD熱拡散方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for thermally diffusing impurities into a semiconductor substrate, and particularly relates to a method for thermally diffusing ZnD into a ■-v group compound semiconductor substrate, such as a GaAS substrate.

[従来の技術] 第2図は不純物が部分的に熱拡散される従来のウェハを
示す断面図であり、第3図は第2図に示したウェハに不
純物の熱拡散を行なうための真空アンプルを示す概念図
である。
[Prior Art] Fig. 2 is a sectional view showing a conventional wafer in which impurities are partially thermally diffused, and Fig. 3 is a vacuum ampoule for thermally diffusing impurities into the wafer shown in Fig. 2. FIG.

第2図において、ウェハ5は■−v族化合物半導体基板
2と拡散マスク4とから構成される。■−V族化合物半
導体基板2は半導体素子の材料であり、その中に不純物
が拡散される。■−v族化合物半導体基板2はたとえば
Ga As基板である。
In FIG. 2, a wafer 5 is composed of a ■-v group compound semiconductor substrate 2 and a diffusion mask 4. As shown in FIG. (2)-V group compound semiconductor substrate 2 is a material for a semiconductor element, and impurities are diffused into it. (2)-V group compound semiconductor substrate 2 is, for example, a GaAs substrate.

拡散マスク4は不純物を部分的に基板中に拡散させる目
的で基板表面に設けられる膜であり、基板中に拡散させ
るべき拡散物質の拡散係数がその膜については小である
ような物質が用いられる。
The diffusion mask 4 is a film provided on the surface of the substrate for the purpose of partially diffusing impurities into the substrate, and a material is used such that the diffusion coefficient of the diffusion substance to be diffused into the substrate is small for that film. .

第3図において、真空アンプル6には、第2図に示した
ウェハ5のほか、拡散物質7とV族元素の物質8とが密
封される。真空アンプル6の一例は石英アンプルであり
、不純物源である拡散物質としてはたとえばZnが用い
られ、V族元素としてはたとえばASが用いられる。
In FIG. 3, in addition to the wafer 5 shown in FIG. 2, a diffusion material 7 and a substance 8 of group V elements are sealed in a vacuum ampoule 6. An example of the vacuum ampoule 6 is a quartz ampoule, for example, Zn is used as the diffusion substance serving as an impurity source, and AS is used as the V group element.

次に、第2図および第3図を参照して、従来のウェハに
不純物を部分的に熱拡散する場合の拡散方法について説
明する。
Next, a conventional diffusion method for partially thermally diffusing impurities into a wafer will be described with reference to FIGS. 2 and 3.

まず第1のステップとして、Ga As I板2上の所
定の領域を拡散マスク4でマスクする。拡散マスク4と
してはたとえばSt 3 N4が用いられる。次に、第
2ステツプとして、拡散マスク4でマスクしたウェハ5
を、拡散物質7およびV族元素の物質8とともに石英ア
ンプル6に真空密封し、所定の炉内で熱処理を加える。
First, as a first step, a predetermined region on the GaAs I plate 2 is masked with a diffusion mask 4. As the diffusion mask 4, for example, St 3 N4 is used. Next, as a second step, the wafer 5 masked with the diffusion mask 4 is
is vacuum-sealed in a quartz ampoule 6 together with a diffusion material 7 and a group V element material 8, and heat-treated in a predetermined furnace.

この処理により、拡散物質7はウェハ5のマスクされて
いない領域から半導体基板内に拡散する。この処理にお
いて、石英アンプル6に同封したASなどのV族元素の
物質8は高温の熱処理による半導体基板2からのV族元
素の揮発を防止して、I板の分解を防ぐ作用をする。次
に、第3ステツプとして、熱拡散が終了した侵、石英ア
ンプル6を炉内から取出して急冷する。
This process causes the diffusion material 7 to diffuse into the semiconductor substrate from the unmasked areas of the wafer 5. In this process, the substance 8 of group V elements such as AS enclosed in the quartz ampoule 6 serves to prevent the volatilization of the group V elements from the semiconductor substrate 2 due to the high temperature heat treatment, thereby preventing decomposition of the I plate. Next, as a third step, the quartz ampoule 6, which has undergone thermal diffusion, is taken out of the furnace and rapidly cooled.

[発明が解決しようとする問題点] 従来の熱拡散方法は上述のように基板の分解を防ぐため
にV族元素を同封しなければならず、拡散終了後の石英
アンプル急冷時にV族元素が基板表面に付看して基板を
汚染するという欠点があった。また、拡散物質の拡散状
態はV族元素の圧力に強く依存するため、拡散の制御性
が悪いという欠点もあった。
[Problems to be solved by the invention] As mentioned above, in the conventional thermal diffusion method, it is necessary to enclose a group V element in order to prevent the substrate from decomposing. There was a drawback that the substrate was contaminated by markings on the surface. Furthermore, since the diffusion state of the diffusing substance strongly depends on the pressure of the group V element, there is also a drawback that the controllability of diffusion is poor.

それゆえに、この発明は上述のような従来方法の問題点
を解消するためになされたもので、真空アンプル中へV
族元素を同封しないで、■−v族化合物半導体基板へ不
純物を熱拡散する方法を提供することを目的とする。
Therefore, the present invention was made to solve the problems of the conventional method as described above.
It is an object of the present invention to provide a method for thermally diffusing impurities into a semiconductor substrate of group (1)-v group without enclosing group elements.

[問題点を解決するための手段] この発明は、基板を構成する元素の拡散係数が小さく、
かつ不純物の拡散係数が大きい膜をm−V族化合物半導
体基板の表面に設けた後に、不純物の熱拡散を行なうも
のである。
[Means for Solving the Problems] The present invention has a structure in which the elements constituting the substrate have a small diffusion coefficient;
In addition, after a film having a large impurity diffusion coefficient is provided on the surface of the m-V group compound semiconductor substrate, the impurity is thermally diffused.

[作用] この発明では、不純物の熱拡散を行なう際に、V族元素
の物質を真空アンプル中に同封しなくても、半導体基板
が分解することはない。
[Function] In the present invention, when performing thermal diffusion of impurities, the semiconductor substrate does not decompose even if the substance of group V element is not enclosed in a vacuum ampoule.

〔実施例〕〔Example〕

第1図はこの発明の一実施例の半導体基板への不純物熱
拡散方法が適用されるウェハ1の断面を示す図である。
FIG. 1 is a diagram showing a cross section of a wafer 1 to which a method of thermally diffusing impurities into a semiconductor substrate according to an embodiment of the present invention is applied.

ウェハ1は、■−v族化合物半導体基板2と拡散マスク
4と113とから構成される。
The wafer 1 is composed of a ■-v group compound semiconductor substrate 2 and a diffusion mask 4 and 113.

ウェハ1は従来のウェハ5に比べると、半導体基板2と
拡散マスク4との間にl113が挿入された構成である
。ここにおいて、ll[3は拡散物質7の拡散係数が大
きく、基板を構成する元素の拡散係数が小さい躾であり
、たとえば810.膜が用いられる。また、拡散マスク
4には、たとえば5lsN4111が用いられる。
Compared to the conventional wafer 5, the wafer 1 has a structure in which l113 is inserted between the semiconductor substrate 2 and the diffusion mask 4. Here, ll[3 is an index in which the diffusion coefficient of the diffusing substance 7 is large and the diffusion coefficient of the element constituting the substrate is small; for example, 810. A membrane is used. Further, for the diffusion mask 4, for example, 5lsN4111 is used.

次に、この発明の一実施例について説明する。Next, one embodiment of the present invention will be described.

まず、第1図に示すようなウェハ1を準備し、このウェ
ハ1を拡散物質たとえばZn7とともに石英アンプル6
中に真空封入し、熱処理を行なう。
First, a wafer 1 as shown in FIG.
It is vacuum sealed inside and heat treated.

この場合には、V族元素の物質を石英アンプル6中に同
封する必要はない。
In this case, there is no need to enclose the group V element substance in the quartz ampoule 6.

znなどの不純物はSt Oz中の拡散係数が大きいた
めに、5isN<拡散マスクが設けられていない部分で
は、半導体基板内に拡散される。しかし、半導体基板か
らのV族元素の揮発は5I02中のV族元素の拡散係数
が小さいためにほとんどなく、基板の分解を防ぐことが
できる。
Since impurities such as zn have a large diffusion coefficient in StOz, they are diffused into the semiconductor substrate in areas where 5isN<diffusion mask is not provided. However, volatilization of group V elements from the semiconductor substrate is almost non-existent because the diffusion coefficient of group V elements in 5I02 is small, and decomposition of the substrate can be prevented.

なお、上述の実施例では、封管法の場合について説明し
たが、シリコンデバイスの製造に用いられているような
開管法で拡散を行なってもよい。
In the above-mentioned embodiments, the sealed tube method was described, but the diffusion may be performed by an open tube method such as that used in the manufacture of silicon devices.

この際にも、V族元素の揮発を防止するためのガス、た
とえばA s Hsなどを流す必要はない。
Also at this time, there is no need to flow a gas such as A s Hs to prevent the volatilization of the V group element.

また、上述の実施例では、拡散物質の拡散係数が大きく
かつ基板構成元素の拡散係数の小さな模3を半導体基板
2と拡散マスク4との間に挿入したが、この膜を拡散マ
スク4上に付暑させても全く同様の効果が得られる。
Furthermore, in the above embodiment, the film 3 having a large diffusion coefficient of the diffusion substance and a small diffusion coefficient of the substrate constituent elements was inserted between the semiconductor substrate 2 and the diffusion mask 4. Exactly the same effect can be obtained by adding heat.

[発明の効果] 以上のように、この発明によれば、不純物の拡散を行な
)にあたって、■−v族化族化合物半纏根基板上純物の
拡散係数が大きくかつ基板構成元素の拡散係数が小さい
膜を設けているので、不純物の熱拡散時にV族元素の圧
力を半導体基板に加えなくても半導体基板の分解は生じ
ず、安定した拡散が行なえる。
[Effects of the Invention] As described above, according to the present invention, when diffusing impurities, the diffusion coefficient of the pure substance on the semi-integrated root substrate of the -V group compound is large and the diffusion coefficient of the substrate constituent elements is large. Since the film is provided with a small value, the semiconductor substrate does not decompose even if the pressure of group V elements is not applied to the semiconductor substrate during thermal diffusion of impurities, and stable diffusion can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例のI−V族化合物半導体基
板への不純物熱拡散方法が適用されるウェハの断面を示
す図である。第2図は従来のウェハを示す断面図である
。第3図は第2図に示した従来のウェハに不純物の熱拡
散を行なうための真空アンプルを示す概念図である。 図において、1はウェハ、2は半導体基板、3は膜、4
は拡散マスク、6は石英アンプル、7は拡散物質を示す
FIG. 1 is a diagram showing a cross section of a wafer to which a method of thermally diffusing impurities into a group IV compound semiconductor substrate according to an embodiment of the present invention is applied. FIG. 2 is a sectional view showing a conventional wafer. FIG. 3 is a conceptual diagram showing the conventional vacuum ampoule shown in FIG. 2 for thermally diffusing impurities into the wafer. In the figure, 1 is a wafer, 2 is a semiconductor substrate, 3 is a film, and 4
indicates a diffusion mask, 6 indicates a quartz ampoule, and 7 indicates a diffusion substance.

Claims (2)

【特許請求の範囲】[Claims] (1)III−V族化合物半導体基板への不純物熱拡散方
法であって、 前記半導体基板を構成する元素の拡散係数が小さく、か
つ前記半導体基板中に拡散すべき不純物の拡散係数が大
きい膜を前記基板上に設けた後、不純物の熱拡散を行な
うことを特徴とする半導体基板への不純物熱拡散方法。
(1) A method for thermally diffusing impurities into a III-V compound semiconductor substrate, comprising: forming a film in which the diffusion coefficient of an element constituting the semiconductor substrate is small and the diffusion coefficient of an impurity to be diffused into the semiconductor substrate is large; A method for thermally diffusing impurities into a semiconductor substrate, the method comprising thermally diffusing impurities after being provided on the substrate.
(2)前記膜はSiO_2膜である特許請求の範囲第1
項記載の半導体基板への不純物熱拡散方法。
(2) Claim 1, wherein the film is a SiO_2 film.
The method for thermally diffusing impurities into a semiconductor substrate as described in Section 1.
JP14077185A 1985-06-27 1985-06-27 Impurity thermal diffusion into semiconductor substrate Pending JPS622530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14077185A JPS622530A (en) 1985-06-27 1985-06-27 Impurity thermal diffusion into semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14077185A JPS622530A (en) 1985-06-27 1985-06-27 Impurity thermal diffusion into semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS622530A true JPS622530A (en) 1987-01-08

Family

ID=15276364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14077185A Pending JPS622530A (en) 1985-06-27 1985-06-27 Impurity thermal diffusion into semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS622530A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5506186A (en) * 1988-06-27 1996-04-09 U.S. Philips Corporation Method of manufacturing an optoelectronic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5506186A (en) * 1988-06-27 1996-04-09 U.S. Philips Corporation Method of manufacturing an optoelectronic device

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