JPS62247403A - Electronic controller - Google Patents

Electronic controller

Info

Publication number
JPS62247403A
JPS62247403A JP9092986A JP9092986A JPS62247403A JP S62247403 A JPS62247403 A JP S62247403A JP 9092986 A JP9092986 A JP 9092986A JP 9092986 A JP9092986 A JP 9092986A JP S62247403 A JPS62247403 A JP S62247403A
Authority
JP
Japan
Prior art keywords
input
port
controlled
output
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9092986A
Other languages
Japanese (ja)
Inventor
Takanori Fujimoto
藤本 高徳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9092986A priority Critical patent/JPS62247403A/en
Publication of JPS62247403A publication Critical patent/JPS62247403A/en
Pending legal-status Critical Current

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  • Control By Computers (AREA)

Abstract

PURPOSE:To minimize the power loss of a control element and to attain the direct control even with a heavy load by programming the port of the control element into an application for input when the control element is controlled at a high level. CONSTITUTION:When a transistor TR4 is controlled at a high level, an output buffer 2a is set at a high impedance by an input/output switching signal and a port is programmed into an application for input. As a result, no current flows from the buffer 2a. Furthermore no current flows to an input buffer 2b since this buffer is also set at a high impedance. Therefore no current flows virtually from an element 1. Thus the current flowing to the TR4 is decided only by a resistance 7 connected to a power supply. While the port of the element 1 is programmed into an application for output in case the TR4 is controlled at a low level.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は車両に用いられるソレノイドや各種アクチュ
エータ等を制御する電子制御装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electronic control device for controlling solenoids, various actuators, etc. used in vehicles.

〔従来の技術〕[Conventional technology]

第2図は従来の電子制御装置の構成を示す等価回路図で
ある。図において、1は出力バッファ2および図示省略
した入カパツファ′を有するポートを入力用、出力用に
プログラム可能な素子で、3はその内部バスである。ま
九4はこの素子1で制御される制御素子としてのトラン
ジスタで、そのペースが電流制限用の抵抗5を介して素
子1に接続され、コレクタは負荷であるソレノイド6f
、介してバッテリに接続され、エミッタは接地されてい
る。更に7は一端が電源に接続され他端が素子1と抵抗
5との間に接続されtプルアップ抵抗である。なお、こ
こでは負荷としてソレノイドを例にとつ九が、この他に
も機関のインジェクタや各種アクチュエータ、電磁バル
ブ等がある。
FIG. 2 is an equivalent circuit diagram showing the configuration of a conventional electronic control device. In the figure, numeral 1 denotes an element whose port having an output buffer 2 and an input buffer 'not shown can be programmed for input or output, and numeral 3 denotes its internal bus. A transistor 4 is a control element controlled by this element 1, and its pace is connected to the element 1 via a current limiting resistor 5, and its collector is a solenoid 6f which is a load.
, and the emitter is grounded. Further, 7 is a pull-up resistor whose one end is connected to the power supply and the other end is connected between the element 1 and the resistor 5. Here, a solenoid is taken as an example of a load, but there are other loads such as engine injectors, various actuators, electromagnetic valves, etc.

このように構成され九制御装置において、トランジスタ
4を索子1で制御する場合そのポートは出力用にプログ
ラム固定し、トランジスタ4をハイレベルで制御する場
合は出力にハイ、ローレベルで制御する場合はローを出
力していた。
In the nine control device configured in this way, when transistor 4 is controlled by wire 1, the port is programmed to be fixed for output, and when transistor 4 is controlled at high level, the output is high, and when controlled at low level. was outputting low.

ところで上記素子1の一般的な出力レペル′−圧は、例
えば電源電圧が5vの場合、ローレベル電圧は1.6 
mAの負荷電流吸込において約0.5vと小さい値であ
るが、ハイレベル電圧は100〜200μAの負荷電流
でも2.5v程度と低い電圧値となってしまう。このた
めハイレベル時の負荷電流を上記の値以上必要な場合は
図に示すように電源と出力間に抵抗7を接続し、この電
流IRで素子1の出力電流l0)iの不足分を補ってい
た。
By the way, the general output level voltage of the element 1 is, for example, when the power supply voltage is 5V, the low level voltage is 1.6.
Although this is a small value of about 0.5 V when a load current of mA is absorbed, the high level voltage becomes a low voltage value of about 2.5 V even when a load current of 100 to 200 μA is drawn. Therefore, if the load current at high level is required to exceed the above value, connect a resistor 7 between the power supply and the output as shown in the figure, and use this current IR to compensate for the shortfall in the output current l0)i of element 1. was.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の電子制御装置は上記のように構成されているが、
素子1に電流IOHが流れる定め素子1内部でl0HX
(電源電圧−ハイレベル電圧VCII )の電力損失が
発生する。従ってこれは負荷が重い場合は大きな素子発
熱となシ、ある程度以上の負荷は制御が不可能となる。
Conventional electronic control units are configured as described above, but
The current IOH flows through element 1, and l0HX inside element 1.
A power loss of (power supply voltage - high level voltage VCII) occurs. Therefore, when the load is heavy, the element generates a large amount of heat, and it becomes impossible to control the load above a certain level.

ま九更に負荷の重い制御素子を制御する場合は制御素子
の前設に入力インピーダンスの高い索子e−N追加する
ことすら必要となる等の問題があった。
Moreover, when controlling a control element with a heavy load, there is a problem in that it is even necessary to add a cable e-N having a high input impedance to the front of the control element.

この発明は上記の問題点を解決する九めになされ友もの
で、素子の電力損失が最小限に抑えられ、かつ重負荷で
も直接η1制御が可能な電子制御装置を得ることを目的
とする。
This invention is a ninth step in solving the above-mentioned problems, and aims to provide an electronic control device in which the power loss of the elements can be minimized and which can directly control η1 even under heavy loads.

〔問題点全解決する九めの手放〕[Ninth let go to solve all problems]

この発明に係る電子制御装置は、制御素子をハイレベル
で制御する場合は素子のポートを入力用に、ローレベル
で制御する場合は素子のポートを出力用にプログラムす
るようにしたものである。
In the electronic control device according to the present invention, when controlling a control element at a high level, the port of the element is programmed for input, and when controlling the control element at a low level, the port of the element is programmed for output.

〔作 用〕[For production]

この発明においては、制御素子をハイレベルで制御する
場合は素子の出力バッファをハイインピーダンスにして
ポートを入力用にプログラムするため、素子からの電流
はほとんど流れず、負荷に流れる電流は電源に接続され
た抵抗のみによって決定される。
In this invention, when controlling a control element at a high level, the output buffer of the element is set to high impedance and the port is programmed for input, so almost no current flows from the element, and the current flowing to the load is connected to the power supply. determined only by the resistance applied.

〔実施例〕〔Example〕

第1図はこの発明の一実施例による電子制御装置の構成
を示す回路図である。図中、2aは出力バッファ、2b
は入カパッファであシ、他の各構成は第2図の従来装置
と同様である之め対応する部分に同一符号を付してその
説明を省略する。
FIG. 1 is a circuit diagram showing the configuration of an electronic control device according to an embodiment of the present invention. In the figure, 2a is an output buffer, 2b
2 is an input buffer, and the other configurations are the same as those of the conventional device shown in FIG. 2, so corresponding parts are given the same reference numerals and their explanation will be omitted.

かかる構成の電子制御装置において、トランジスタ4を
ハイレベルで制御する場合、出力バッファ2a′1に入
出力切換信号でハイインピーダンスとしポートを入力用
釦プログラムする。こうすることによって出力バッファ
2aからfcc流は流れず、また人カパツファ2bもハ
イインピーダンスであるため/F!L流は流れず、素子
1から電流はほとんど流れない。従ってトランジスタ4
へ流れる電流は電源に接続されt抵抗7のみによって決
定される。
In the electronic control device having such a configuration, when controlling the transistor 4 at a high level, the output buffer 2a'1 is set to high impedance by the input/output switching signal, and the port is programmed as an input button. By doing this, the fcc current does not flow from the output buffer 2a, and since the human capacitor 2b also has high impedance, /F! The L current does not flow, and almost no current flows from element 1. Therefore transistor 4
The current flowing to is determined only by the t resistor 7 connected to the power supply.

なお、トランジスタ4tローレベルで制御する場合は素
子1のポートを出力用にプログラムするのは従来と同様
である。
Note that when the transistor 4t is controlled at a low level, the port of the element 1 is programmed for output as in the conventional case.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、制御素子をハイレベル
で制御する場合素子のポートを入力用にプログラムする
よう構成したので、素子rCはとんど電流を流さずに制
御が行え、従って素子の電力損失を最小限に抑えること
ができ、ま九従来では直接制御できなかった重い負荷で
も直接制御が可能となる。しかも従来装置では、I/、
!であった電子から流れ出る電流を制限する几めの抵抗
も不要となる等の効果がある。
As described above, according to the present invention, when the control element is controlled at a high level, the port of the element is programmed for input, so the element rC can be controlled without passing current, and therefore the element power loss can be minimized, making it possible to directly control even heavy loads that could not be directly controlled in the past. Moreover, in the conventional device, I/,
! This has advantages such as eliminating the need for a tight resistor that limits the current flowing out from the electrons.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による電子制御装置の回路
図、第2図は従来の電子制御装置の回路図である。 1・・・素子、2a・・・出力バッファ、2b・・・入
カパツファ、4・・・制御素子(トランジスタ)、6・
・・ソレノイド、7・・・抵抗。 なお、図中同一符号4同一を几は相当部分を示す。
FIG. 1 is a circuit diagram of an electronic control device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional electronic control device. DESCRIPTION OF SYMBOLS 1... Element, 2a... Output buffer, 2b... Input buffer, 4... Control element (transistor), 6...
...Solenoid, 7...Resistance. Note that the same reference numerals 4 and 4 in the drawings indicate corresponding parts.

Claims (1)

【特許請求の範囲】[Claims]  入力バツフア、出力バツフアを有するポートを備え、
このポートを入力用、出力用にプログラム可能な素子と
、この素子にて制御される制御素子と、この制御素子と
前記素子との間より該素子をバイアスする電源に接続さ
れる抵抗とから構成され負荷を制御する電子制御装置に
おいて、前記制御素子をハイレベルで制御する場合は前
記素子のポートを入力用に、ローレベルで制御する場合
は出力用にプログラムすることを特徴とする電子制御装
置。
Equipped with a port with input buffer and output buffer,
Consisting of an element that can program this port for input or output, a control element controlled by this element, and a resistor connected to a power source that biases the element between this control element and the element. An electronic control device for controlling a load, characterized in that a port of the control element is programmed for input when the control element is controlled at a high level, and for output when the control element is controlled at a low level. .
JP9092986A 1986-04-18 1986-04-18 Electronic controller Pending JPS62247403A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9092986A JPS62247403A (en) 1986-04-18 1986-04-18 Electronic controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9092986A JPS62247403A (en) 1986-04-18 1986-04-18 Electronic controller

Publications (1)

Publication Number Publication Date
JPS62247403A true JPS62247403A (en) 1987-10-28

Family

ID=14012129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9092986A Pending JPS62247403A (en) 1986-04-18 1986-04-18 Electronic controller

Country Status (1)

Country Link
JP (1) JPS62247403A (en)

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