JPH05274065A - Pull-up voltage supply method - Google Patents

Abstract

PURPOSE:To reduce the power consumption of an apparatus with a microcomputer by turning on a gate circuit by an output port to supply a pull-up voltage only during the period when it is necessary for an input port to read an input signal by the instruction of a central processing unit. CONSTITUTION:When a central processing unit 1 instructs an output port 3 to turn on a transistor Q, the TR Q as the gate circuit is turned on, and a pull-up voltage Vp is supplied, and respective input terminals of an input port 2 are stabilized to low and high levels corresponding to turning-on/off of switches S. Low and high levels of terminals of the input port 2 are read. Next, the output port 3 is instructed to turn off the TR Q. At this time, the pull-up voltage is outputted and a current flows only in the period when this voltage is necessary, but the pull-up voltage is not supplied and the current does not flow in the other period; and therefore, the current consumption due to the pull-up voltage is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pull-up voltage supply method for microcomputer application equipment.

[0002]

2. Description of the Related Art FIG. 3 is a circuit diagram for explaining a conventional pull-up voltage supply method. As shown in FIG. 3, in order for the central processing unit 1 of the microcomputer application device to read the on / off state of the switch S from the input port 2, for example, each input of the input port 2 corresponding to each switch S is input. It is necessary to set the terminal to Low / High state corresponding to the ON / OFF state of each switch S and then read. Therefore, a pull-up voltage V _p and a pull-up (may be pull-down) resistor R are required.

Further, when the central processing unit 1 reads, for example, the on / off state of the switch S from the input port 2, the central processing unit 1 does not continuously read the input port 2 but another work. While executing the above, the input port 2 is intermittently accessed and read as needed between the intervals.

[0004]

By the way, there is an urgent need to reduce the current consumption of the microcomputer application equipment due to the rapid increase of the microcomputer application equipment in recent years and the necessity of energy saving. However, in the conventional pull-up voltage supply method, the pull-up voltage is continuously supplied regardless of the period during which the central processing unit 1 accesses the input port 2 to execute the read or not. The current consumption for the up voltage is always consumed and is useless,
There is also a problem that it is disadvantageous from the viewpoint of improving the power failure compensation time of the power failure compensation power supply at the time of power failure.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a pull-up voltage supply method capable of reducing the current consumption of a microcomputer application device.

[0006]

In order to solve the above problems, the present invention provides a pull-up voltage supply method for reading an input signal processed by a pull-up voltage from an input port by an instruction of a central processing unit. An output port instructed by the central processing unit, a gate circuit for turning on / off the supply of the pull-up voltage at the output port, and turning on the gate circuit only for a predetermined period including a read timing period of the input signal. And a pull-up voltage supply timing means for giving the instruction to the output port, and the pull-up voltage is supplied only when the input signal is read.

[0007]

With the above configuration, the output port is gated by the command of the central processing unit only for a predetermined period required for reading the input signal processed by the input port with the pull-up voltage by the command of the central processing unit. The circuit is turned on and the gate circuit supplies the pull-up voltage.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the pull-up voltage supply method according to the present invention will be described in detail with reference to FIGS. 1 is a circuit diagram illustrating a pull-up voltage supply method, FIG. 2 is a timing diagram illustrating a pull-up voltage supply method, and FIG.
2A shows the timing at which the pull-up voltage is supplied, and FIG. 2B shows the timing at which the input port reads in response to an instruction from the central processing unit.

In the pull-up voltage supply method shown in FIG. 1, the input port 2 instructed by the central processing unit 1, the output port 3 instructed by the central processing unit 1, and the pull-up voltage at the output port 3 are used. It is composed of a transistor Q corresponding to a gate circuit for turning on / off the supply of V _p , and pull-up voltage supply timing means which is software of the central processing unit 1.

The input port 2, the output port 3 and the transistor Q are connected to the switch S, which is the purpose of reading the state, as follows. That is, each input terminal of the input port 2 is connected to one side of each switch S and is also connected to the emitter of the transistor Q via each pull-up resistor R. The other of each switch S is grounded. The collector of the transistor Q is connected to the pull-up voltage V _p, and the base of the transistor Q is connected to the output terminal of the output port 2.

Further, the pull-up voltage supply timing means which is software of the central processing unit 1 is programmed as follows.

That is, in the program step immediately before accessing the input port 2 to read the on / off state of each switch S, the central processing unit 1 instructs the output port 3 to turn on the transistor Q ( The output port 3 is programmed to execute a command for setting the output terminal connected to the base of the transistor Q to be High.

For the next program step,
The transistor Q turns on and the pull-up voltage V _pIs supplied and input
The input terminals of port 2 are turned on and off of switch S.
Weight that only stabilizes in the Low / High state according to the
Is programmed to be taken by the central processing unit 1.
It

In the next program step, the central processing unit 1 is programmed to execute an instruction for the input port 2 to read the Low / High state of each input terminal of the input port 2.

In the next program step, the central processing unit 1 instructs the output port 3 to turn off the transistor Q (instruction to set the output terminal connected to the base of the transistor Q of the output port 3 to Low). ) Is programmed to run.

Therefore, the relationship between the on / off timing of the transistor Q and the read timing of the input port 2 when the pull-up voltage supply timing means, which is the software described above, is executed by the central processing unit 1 is shown in FIG. As shown in. 2A shows the on / off timing of the transistor Q, and T ₁ is the on period of the transistor Q corresponding to a predetermined period including the read timing period. 2B shows the read timing of the input port 2, and T ₂ is the read timing period. Note that FIG. 2 shows the case where the pull-up voltage supply timing means is executed twice.

As is apparent from the above description, the pull-up voltage is output only during the period when the pull-up voltage is necessary and the current for the pull-up voltage flows, but during the other unnecessary periods, the pull-up voltage remains unchanged. The supply is turned off and no current flows for the pull-up voltage.

The present invention is not limited to the above embodiment, and the switch S may be an open collector transistor driven by an output signal from another device, and the input port 2 is a gate circuit. It goes without saying that the supply of the pull-up voltage of the output port of the other device connected to may be turned on / off.

[0019]

Since the pull-up voltage supply method of the present invention is the above-described method, the pull-up voltage is not always supplied as in the conventional case, but is supplied only for a necessary period. The effect that the current consumption due to the pull-up voltage can be reduced, the current consumption of the microcomputer application device can be reduced, the energy saving required by the times can be achieved, and the pull-up voltage supply method that also improves the power failure compensation time can be provided. Play.

[Brief description of drawings]

FIG. 1 is a circuit diagram illustrating an embodiment of a pull-up voltage supply method of the present invention.

FIG. 2 is a timing diagram illustrating an embodiment of the pull-up voltage supply method of the present invention.

FIG. 3 is a circuit diagram illustrating a conventional pull-up voltage supply method.

[Explanation of symbols]

1 central processing unit 2 input port 3 output port Q gate circuit V _p pull-up voltage T ₁ predetermined period including read timing period T ₂ read timing period

Claims (1)

[Claims] 1. A pull-up voltage supply method for reading an input signal processed by a pull-up voltage from an input port according to an instruction of a central processing unit, the output port being instructed by the central processing unit, and the output. A gate circuit for turning on / off the supply of the pull-up voltage at the port; and a pull-up voltage supply timing means for giving an instruction to turn on the gate circuit only for a predetermined period including a read timing period of the input signal to the output port. A pull-up voltage supply method, wherein the pull-up voltage is supplied only when the input signal is read.