JPS62243343A - Multilayer interconnection electrode film structure semiconductor device - Google Patents
Multilayer interconnection electrode film structure semiconductor deviceInfo
- Publication number
- JPS62243343A JPS62243343A JP8649386A JP8649386A JPS62243343A JP S62243343 A JPS62243343 A JP S62243343A JP 8649386 A JP8649386 A JP 8649386A JP 8649386 A JP8649386 A JP 8649386A JP S62243343 A JPS62243343 A JP S62243343A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode film
- wiring electrode
- semiconductor device
- interlayer insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 239000011229 interlayer Substances 0.000 claims abstract description 14
- 239000012535 impurity Substances 0.000 claims abstract description 8
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 4
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052802 copper Inorganic materials 0.000 abstract description 4
- 239000010949 copper Substances 0.000 abstract description 4
- 229910052742 iron Inorganic materials 0.000 abstract description 4
- 239000010410 layer Substances 0.000 abstract description 4
- 229910052749 magnesium Inorganic materials 0.000 abstract description 4
- 239000011777 magnesium Substances 0.000 abstract description 4
- 229910052759 nickel Inorganic materials 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、多層配線電極膜構造を有する半導体装置に関
する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device having a multilayer wiring electrode film structure.
従来の技術
これまで、多層配線電極膜構造を有する半導体装置は、
概略、第２図に示す断面形状をもった構成である。上部
配線電極膜６と下部配線電極膜７は、層間絶縁膜３と直
接、接触していることが多い。そして、この層間絶縁膜
３によって、上部２２ヘーノ
と下部４の配線電極膜が絶縁されている。Conventional technology Up until now, semiconductor devices having a multilayer wiring electrode film structure have been
The structure has a cross-sectional shape roughly shown in FIG. The upper wiring electrode film 6 and the lower wiring electrode film 7 are often in direct contact with the interlayer insulating film 3. The interlayer insulating film 3 insulates the upper wiring electrode film 22 and the lower wiring electrode film 4.
発明が解決しようとする問題点
従来の技術で述べたように、層間絶縁膜（たとえば、プ
ラズマシリコンナイトライド膜（以下Ｐｔ−８ｉＮＩｌ
ｌｊと書く））と上部、あるいは下部配線電極膜たとえ
ば、アルミニウム（Ａｔ）膜とは、直接、接触している
ため、以後の半導体製造プロセスにおいて、たとえば、
層間絶縁膜（Ｐｔ−３ｉＮ膜）や配線電極膜（Ａｔ膜）
のシンターなどの熱処理工程を経た際に層間絶縁膜（Ｐ
ｔ−８ｉＮ膜）と配線電極膜（Ａｔ膜）の熱膨張率の違
いから生じた応力によって、配線電極膜が断線し、デバ
イスを不良に至らしめる結果となる。本発明は、このよ
うな問題点を解消することを目的としている。Problems to be Solved by the Invention As described in the prior art, interlayer insulating films (for example, plasma silicon nitride films (hereinafter referred to as Pt-8iNIl)
Since the upper or lower wiring electrode film (written as lj)) is in direct contact with the aluminum (At) film, in the subsequent semiconductor manufacturing process, for example,
Interlayer insulation film (Pt-3iN film) and wiring electrode film (At film)
The interlayer insulating film (P
The stress generated from the difference in thermal expansion coefficient between the wiring electrode film (t-8iN film) and the wiring electrode film (At film) causes the wiring electrode film to break, resulting in a defective device. The present invention aims to solve these problems.
問題点を解決するだめの手段
上記の問題点を解決するため本発明は、配線電極膜が層
間絶縁膜と同−又は近似の熱膨張率を有する事を特徴と
する多層配線電極膜構造半導体装置を提供する。Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a multilayer wiring electrode film structure semiconductor device characterized in that the wiring electrode film has the same coefficient of thermal expansion as or similar to that of the interlayer insulating film. I will provide a.
作 用
３ペーノ
配線電極膜中の不純物又は新たに導入した不純物の種類
、不純物の量を調整することによって、層間絶縁膜の熱
膨張率と同一、あるいは、より遅配線電極膜が断線する
というデバイスの致命的な不良を排除することが出来る
。Effect 3 By adjusting the type and amount of impurities in the wiring electrode film or newly introduced impurities, a device is created in which the wiring electrode film is disconnected at a coefficient of thermal expansion that is the same as or slower than that of the interlayer insulating film. can eliminate fatal defects.
実施例
第１図に、本発明実施例を説明する多層配線電極膜の断
面概略図を示す。下層配線電極膜４として、銅０．８〜
０．９％ 、マグネシウム１％、ニッケル２〜２．５％
、ケイ素（シリコン）１４％、鉄１チを不純物として含
むＡｔ膜を形成した後、層間絶縁膜３として、Ｐ７−８
ｉＮ膜を成長させる。その後、上層配線膜２として、下
層配線電極膜４と同一組成のＡｔＷＬすなわち、銅０．
８〜０．９％、マクネシウム１ｑ６．ニッケル２〜２．
５％、シリコン１４％、鉄１％を不純物として含むＡｔ
膜を形成し、通常の半導体製造プロセスを経て、デバイ
スを製作する。このように、半導体製造プロセスを経て
、熱処理工程を通過した後に、電気的検査。Embodiment FIG. 1 shows a schematic cross-sectional view of a multilayer wiring electrode film for explaining an embodiment of the present invention. As the lower wiring electrode film 4, copper is 0.8~
0.9%, magnesium 1%, nickel 2-2.5%
, after forming an At film containing 14% silicon and 1% iron as impurities, P7-8 was formed as the interlayer insulating film 3.
Grow an iN film. Thereafter, the upper wiring film 2 is made of AtWL having the same composition as the lower wiring electrode film 4, that is, copper 0.
8-0.9%, magnesium 1q6. Nickel 2-2.
At containing 5%, silicon 14%, and iron 1% as impurities
A film is formed and a device is manufactured through normal semiconductor manufacturing processes. Thus, after going through the semiconductor manufacturing process and passing through the heat treatment process, the electrical inspection.
光学顕微鏡等による外観検査を行なったが、配線電極膜
の断線による不良の発生は、検知出来なかった。Although the appearance was inspected using an optical microscope, no defects due to disconnection of the wiring electrode film could be detected.
発明の効果
本発明で配線電極膜として用いた銅０．８〜０．９係、
マグネシウム１％、ニッケル２〜２．６％、シリコン１
４チ、鉄１％の不純物を含んだＡｔ膜の熱膨張係数は、
〜２０（１０−６・（℃）−’：］である。Effects of the invention Copper used as a wiring electrode film in the present invention has a ratio of 0.8 to 0.9,
Magnesium 1%, Nickel 2-2.6%, Silicon 1%
4. The thermal expansion coefficient of an At film containing 1% iron impurity is:
~20(10-6·(°C)-':]).
これに対し、純Ａｔ膜の熱膨張係数は、〜２９（１０’
−６・（℃）−’） であり、層間絶縁膜として用い
たＰ−８ｉＮ膜の熱膨張率（７） −４（１ｏ−６（ｃ
）−１）と比較すると、本発明で用いた不純物を含んだ
Ｍ電極膜の方が、純Ａ７膜よりも層間絶縁膜の熱膨張率
に近い。そのだめ、熱処理工程を通過する際又は、通過
した後に生じる応力を緩和減少させ、結果として、配線
電極膜の断線を防止することが出来た。これによって、
半導体デバイス製造の歩留を高め、品質の向上を計るこ
とが出来た。On the other hand, the thermal expansion coefficient of pure At film is ~29 (10'
-6・(℃)-'), and the thermal expansion coefficient of the P-8iN film used as the interlayer insulating film (7) -4(1o-6(c)
)-1), the impurity-containing M electrode film used in the present invention has a coefficient of thermal expansion closer to that of the interlayer insulating film than the pure A7 film. As a result, the stress generated during or after passing through the heat treatment process was alleviated and reduced, and as a result, it was possible to prevent disconnection of the wiring electrode film. by this,
We were able to increase the yield of semiconductor device manufacturing and improve quality.
６ページ
第１図は、本発明実施例を説明する多層配線電極膜の断
面概略図を示ｔ、第２図は、従来例を説明する断面概略
図（ｔシ。
１・・・・・・表面保護膜、２・・・・・・上層配線電
極膜、３・・・・・・層間絶縁膜、４・・・・・・下層
配線電極膜、６・・・・・・半導体基板、６・・・・・
・従来の上層配線電極膜、７・・・・・・従来の下層配
線電極膜。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名５・
−千１杆販
７−ｐ４ ″Page 6, FIG. 1 shows a schematic cross-sectional view of a multilayer wiring electrode film for explaining an embodiment of the present invention, and FIG. 2 shows a schematic cross-sectional view for explaining a conventional example. Surface protective film, 2... Upper wiring electrode film, 3... Interlayer insulating film, 4... Lower wiring electrode film, 6... Semiconductor substrate, 6・・・・・・
- Conventional upper layer wiring electrode film, 7... Conventional lower layer wiring electrode film. Name of agent: Patent attorney Toshio Nakao and 1 other person5.
- 1,000 yen sales 7-p4 ″
Claims (2)
張率を有する事を特徴とする多層配線電極膜構造半導体
装置。(1) A semiconductor device with a multilayer wiring electrode film structure, wherein the wiring electrode film has a coefficient of thermal expansion that is the same as or similar to that of the interlayer insulating film.
請求の範囲第１項記載の多層配線電極膜構造半導体装置
。(2) A multilayer wiring electrode film structure semiconductor device according to claim 1, wherein the wiring electrode film contains a predetermined amount of a desired impurity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8649386A JPS62243343A (en) | 1986-04-15 | 1986-04-15 | Multilayer interconnection electrode film structure semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8649386A JPS62243343A (en) | 1986-04-15 | 1986-04-15 | Multilayer interconnection electrode film structure semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62243343A true JPS62243343A (en) | 1987-10-23 |
Family
ID=13888507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8649386A Pending JPS62243343A (en) | 1986-04-15 | 1986-04-15 | Multilayer interconnection electrode film structure semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62243343A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03148131A (en) * | 1989-10-25 | 1991-06-24 | American Teleph & Telegr Co <Att> | Semiconductor element and its manufacture |
| US5523625A (en) * | 1993-10-22 | 1996-06-04 | Nec Corporation | Semiconductor integrated circuit device having partially constricted lower wiring for preventing upper wirings from short-circuit |
-
1986
- 1986-04-15 JP JP8649386A patent/JPS62243343A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03148131A (en) * | 1989-10-25 | 1991-06-24 | American Teleph & Telegr Co <Att> | Semiconductor element and its manufacture |
| US5523625A (en) * | 1993-10-22 | 1996-06-04 | Nec Corporation | Semiconductor integrated circuit device having partially constricted lower wiring for preventing upper wirings from short-circuit |
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