JPH0237723A - Stress migration prevention method - Google Patents
Stress migration prevention methodInfo
- Publication number
- JPH0237723A JPH0237723A JP18697588A JP18697588A JPH0237723A JP H0237723 A JPH0237723 A JP H0237723A JP 18697588 A JP18697588 A JP 18697588A JP 18697588 A JP18697588 A JP 18697588A JP H0237723 A JPH0237723 A JP H0237723A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- stress migration
- stress
- heated
- frequency heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005012 migration Effects 0.000 title claims abstract description 12
- 238000013508 migration Methods 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 title claims description 7
- 230000002265 prevention Effects 0.000 title 1
- 238000010438 heat treatment Methods 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 239000000463 material Substances 0.000 claims abstract description 5
- 239000012535 impurity Substances 0.000 claims abstract description 3
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 2
- 238000005468 ion implantation Methods 0.000 claims description 2
- 238000001465 metallisation Methods 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract description 2
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000011084 recovery Methods 0.000 abstract 1
- 238000001953 recrystallisation Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はLSI、特に、VLSIの配線に生じ得るスト
レスマイグレーシコンを防【ヒする方法に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for preventing stress migration from occurring in the wiring of an LSI, particularly a VLSI.
(従来の技術)
従来、大規模集積回路(LSI)において、種々の半導
体装置を所望のように形成する際、その種々の半導体領
域間の相互配線、及び外部装置への接続配線にΔl配線
を用いる場合が殆どである。近年I、S+及び超大規模
集積回路(VLSI)の高密度化及び寸法の微細化が進
むにつれて、多層配線構造が採用されるようになり、配
線自体の断面積も小さくなす、エレクトロマイグレーシ
ョン及びストレスマイグレーションと称される不所望な
現象の生じる問題が発生してきた。(Prior Art) Conventionally, when forming various semiconductor devices as desired in a large-scale integrated circuit (LSI), Δl wiring is used for mutual wiring between the various semiconductor regions and connection wiring to external devices. It is used in most cases. In recent years, as the density and size of I, S+ and very large scale integrated circuits (VLSI) have increased, multilayer wiring structures have been adopted, and the cross-sectional area of the wiring itself has become smaller, resulting in electromigration and stress migration. A problem has arisen in which an undesirable phenomenon called .
(発明が解決しようとする課題)
かかるAI配線においては、アルミニウム(AQ)配線
を行った後、層間絶縁膜として5iOy膜を蒸着するが
、蒸着時の温度上昇は約400℃にも達する。(Problems to be Solved by the Invention) In such AI wiring, a 5iOy film is deposited as an interlayer insulating film after aluminum (AQ) wiring, but the temperature rise during deposition reaches about 400°C.
又、AIの蒸着温度はほぼ200’Cである。従って、
ΔlとS+O,の線熱膨張係数の相違(A I、 23
.5 : 5ift。Further, the deposition temperature of AI is approximately 200'C. Therefore,
Difference in linear thermal expansion coefficient between Δl and S+O (A I, 23
.. 5: 5ift.
0.6(IF’℃−1))により、冷却後、Δlには引
張応力が残留したままとなる。従って、長期に亘って使
用するに従い、AI配線の一部に応力集中が発生し、こ
れが断線の原因になっていた。特に、この傾向は、サブ
ミクロン中位の半導体装置等Af配線が細(なる場合に
著しく広る。0.6(IF'°C-1)), tensile stress remains in Δl after cooling. Therefore, as the AI wiring is used for a long period of time, stress concentration occurs in a portion of the AI wiring, which causes wire breakage. In particular, this tendency becomes more pronounced when the Af wiring becomes thin, such as in a semiconductor device of medium submicron size.
本発明は、上述した点に鑑みなされたもので、LS1製
造後に生じ得るストレスマイグレーションを防止する方
法を提供することを目的とする。The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a method for preventing stress migration that may occur after LS1 manufacturing.
(課題を解決するための手段)
本発明は、半導体基板上に、材料堆猜又は成長、材料除
去、不純物のイオン注入及び拡散、加熱、金属化等の処
理を施して集積回路を形成し、最終段階のAI配線を終
了した時点で、全体に高周波加熱処理を施して、金属化
層に生じていた残留応力を緩和し得るようにしたことを
特徴とするものである。(Means for Solving the Problems) The present invention forms an integrated circuit by subjecting a semiconductor substrate to processes such as material deposition or growth, material removal, impurity ion implantation and diffusion, heating, metallization, etc. This is characterized in that when the final stage of AI wiring is completed, the entire structure is subjected to high-frequency heat treatment to relieve residual stress generated in the metallized layer.
又、本発明はAI配線のみならず、Au配線等の金属配
線にも適用し得ることは勿論である。Furthermore, it goes without saying that the present invention can be applied not only to AI wiring but also to metal wiring such as Au wiring.
(作用)
高周波加熱を行うことによって、Afは導体であるから
加熱されるが、Sin、は絶縁物であるため殆ど加熱さ
れず、従って、A/配線のみが膨張し、周囲が固定され
ていることにより塑性変形を起こし、更に加熱すること
により回復し、再結晶するため、AI配線の残留引張応
力が緩和されるようになり、その後のストレスマイグレ
ーションをも防止することができる。(Function) By performing high-frequency heating, Af is heated because it is a conductor, but Sin is hardly heated because it is an insulator, so only the A/wiring expands and the surrounding area is fixed. As a result, plastic deformation occurs, which is recovered and recrystallized by further heating, so that residual tensile stress in the AI wiring can be alleviated, and subsequent stress migration can also be prevented.
(実施例)
第2図は、LSI基板(例えばシリコン基板)1上に約
400°Cの温度で設けられた絶縁物(Sin、膜)2
及び4並びに200℃の温度で設けられたAt配線3の
一般的に構成されたLSI装置を断面で示す。この構成
から明らかなように、At配線3はS+Ot膜2及び4
によって剛固に固着されている。この状態は、Sin、
膜2及び4の熱処理温度が400℃であり、At配線3
の熱処理温度が200°Cであるため、加熱中に夫々の
線熱膨張係数で熱膨張し、その後の冷却によりAt配線
3に引張応力が残存している。これが長期の使用に従っ
てその一部分に応力集中を生ぜしめ、第3図に示すよう
に、AI配線にくびれが生じる。このくびれ部分5にさ
らに応力集中が生じ、断線へと発展するようになる。(Example) Figure 2 shows an insulator (Sin, film) 2 provided on an LSI substrate (for example, a silicon substrate) 1 at a temperature of about 400°C.
4 and 4, and a generally configured LSI device with At wiring 3 provided at a temperature of 200° C. is shown in cross section. As is clear from this configuration, the At wiring 3 is connected to the S+Ot films 2 and 4.
It is firmly fixed by. This state is Sin,
The heat treatment temperature of films 2 and 4 is 400°C, and the At wiring 3
Since the heat treatment temperature is 200°C, the At wires 3 undergo thermal expansion according to their respective linear thermal expansion coefficients during heating, and tensile stress remains in the At wire 3 due to subsequent cooling. As a result of long-term use, stress concentration occurs in a portion of the wiring, resulting in a constriction in the AI wiring, as shown in FIG. Stress concentration further occurs in this constricted portion 5, leading to wire breakage.
従って、第1図に示すように、LSI又はyt、s+装
置の完成後、全体を高周波加熱装置により高温に加熱す
ると、Δl配線のみ加熱され、絶縁膜であるSiO2及
び半導体層は加熱されない。従って、Δl配線は膨張し
ようとするが、周りをSin、で固定されているため、
膨張できず、塑性変形を起こす。従って、そのまま加熱
を続けることにより回復し、再結晶し、その結果、残留
引張応力を緩和することができる。Therefore, as shown in FIG. 1, when an LSI or yt, s+ device is completed and the entire device is heated to a high temperature using a high frequency heating device, only the Δl wiring is heated, and the insulating film SiO2 and the semiconductor layer are not heated. Therefore, the Δl wiring tries to expand, but since it is surrounded by Sin,
It cannot expand and undergoes plastic deformation. Therefore, by continuing to heat it, it recovers and recrystallizes, and as a result, the residual tensile stress can be alleviated.
(実験例)
本発明による高周波加熱を行ったLSIと、高周波加熱
を行っていない1.SIとのストレスマイグレーション
の発生数を比較したところ、次の通りであった。(Experimental example) LSIs subjected to high frequency heating according to the present invention and 1. LSI not subjected to high frequency heating. A comparison of the number of stress migration occurrences with SI was as follows.
(発明の効果)
丘述したように、本発明によれば、高周波加熱によりA
tのみが加熱され、絶縁膜であるSio、は加熱されな
い。従って、へl配線は膨張しようとするが、周りをS
in、で固定されているため、膨張できず、塑性変形を
起こす。従って、そのまま加熱を続けることにより回復
し、再結晶し、残留引張応力を緩和することができる。(Effects of the Invention) As described above, according to the present invention, A
Only t is heated, and the insulating film Sio is not heated. Therefore, although the Tol wiring tries to expand, the surrounding S
Since it is fixed in, it cannot expand and undergoes plastic deformation. Therefore, by continuing to heat it, it recovers, recrystallizes, and relieves the residual tensile stress.
第1図は本発明によるストレスマイグレーションの防止
方法によって製造された集積回路の一部分を示す断面図
、
第2図は、集積回路の基板」二に設けられたAI配線及
び層間絶縁層を示す断面図、
第3図は同じくその従来例を示す断面図である。
半導体基板(シリコン基板)
絶縁層(S102膜)
A!配線
絶縁層(シリコン基板)
幅狭部分FIG. 1 is a cross-sectional view showing a part of an integrated circuit manufactured by the method for preventing stress migration according to the present invention. FIG. 2 is a cross-sectional view showing AI wiring and interlayer insulation layers provided on the integrated circuit substrate. , FIG. 3 is a sectional view showing the conventional example. Semiconductor substrate (silicon substrate) Insulating layer (S102 film) A! Wiring insulating layer (silicon substrate) narrow part
Claims (1)
純物のイオン注入及び拡散、加熱、金属化等の処理を施
して集積回路を形成した後、全体に高周波加熱処理を施
して、金属化層に生じていたストレスマイグレーション
を緩和するようにしたことを特徴とするストレスマイグ
レーションの防止方法。1. After forming an integrated circuit on a semiconductor substrate by performing processes such as material deposition or growth, material removal, ion implantation and diffusion of impurities, heating, and metallization, the whole is subjected to high-frequency heat treatment to metallize it. A method for preventing stress migration, characterized in that stress migration occurring in a layer is alleviated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18697588A JPH0237723A (en) | 1988-07-28 | 1988-07-28 | Stress migration prevention method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18697588A JPH0237723A (en) | 1988-07-28 | 1988-07-28 | Stress migration prevention method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0237723A true JPH0237723A (en) | 1990-02-07 |
Family
ID=16198001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18697588A Pending JPH0237723A (en) | 1988-07-28 | 1988-07-28 | Stress migration prevention method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0237723A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009142739A (en) * | 2007-12-13 | 2009-07-02 | Panasonic Corp | Apparatus and method for removal of nitrogen oxide |
-
1988
- 1988-07-28 JP JP18697588A patent/JPH0237723A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009142739A (en) * | 2007-12-13 | 2009-07-02 | Panasonic Corp | Apparatus and method for removal of nitrogen oxide |
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