JPS62237746A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce in size an IC chip by forming a groove on a substrate, and forming insulating films on the inner surface of the groove and the substrate, and forming the groove along the groove on the insulating film in a power source wiring structure having a width wider than a buried groove to reduce the width without increasing the raised height from wiring forming surface. CONSTITUTION:After a groove (a) is formed on a substrate 1, an insulating film 3 is formed, the material of wirings 4 is deposited by a normal method until the surface height of the raised portion 4a is obtained, and may be then patterned. The wirings 4 are formed in a structure that the portion of the groove 1a formed on the substrate 1 is integrated with the buried portion 4b in a sectional shape in the width of the inside from the width of the raised portion 4a corresponding to the conventional structure inside the width of the raised portion 4a along the groove 1a. In other words, the film 3 is insulated in the groove 1a between the substrate 1 and the wirings 4. when the sectional area of the wirings 4 is equalized to the conventional wirings, the width of the wirings 4, i.e., the width of the raised portion 4a becomes smaller than the conventional wirings.

Description

[Detailed Description of the Invention] [Summary] In power supply wiring provided on a semiconductor substrate on which integrated circuit elements are formed, the groove is buried along a groove provided on the surface of the substrate to form a wiring wider than the groove. By doing so, the width can be reduced without increasing the height raised from the wiring formation surface.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit, and particularly to the structure of power supply wiring provided on a substrate.

As the speed of electronic computers increases, the semiconductor integrated circuits (ICs) used therein, such as HEMT, GaAsM
In ICs that aim for high speed by incorporating ESFET, St bipolar transistors, etc., an increase in power consumption is unavoidable, and it is necessary to reduce the resistance of the power supply wiring.

[Prior art and problems to be solved by the invention] FIG. 2 is a side sectional view showing a conventional power supply wiring structure in an IC.

In the figure, l is gallium arsenide (GaAs) or silicon (Si) on which the elements constituting the IC circuit are formed.
A semiconductor substrate such as 2 is made of a metal such as gold (Au) or aluminum (A1), and 2 is a power supply wiring provided on the substrate 1 to supply power to the above-mentioned elements. 3 is between the metal l and the wiring 2. An insulating film such as silicon dioxide (SiO2) that insulates the

The wiring 2 is placed on the insulating film 3 and has a flat plate-like structure, and has a thickness of, for example, about 0.5 to 1 μm, and a width that is set so as to provide a resistance that does not interfere with current flow. It is determined according to the size of

Therefore, since the wiring 2 is used for the above-mentioned power supply, its width becomes large, and may reach a width of about 50 to 100 μm in the above-mentioned IC aiming at high speed.

In this case, even the area occupied by the power supply wiring 2 alone becomes larger than the area occupied by the elements on the substrate 1, resulting in a problem in which the IC chip constituting the IC has to be made larger.

One way to reduce the width of such wiring 2 is to increase its thickness in order to secure its cross-sectional area, but since this thickness rises from the surface of the insulation lll1!3, the wiring It is undesirable to increase the size beyond the point where an insulating film covering the top of the second layer is formed.

[Means for solving the problem] The above-mentioned problem is that a groove is provided on the surface of the substrate, an insulating film is provided on the inner surface of the wire groove and the surface of the substrate, and a wire groove is formed on the insulation crotch along the wire groove. This problem is solved by the present invention, in which the power supply wiring structure is made wider than the buried line trench.

[Effect]

The aforementioned problem of semiconductors becoming larger is due to the fact that the area occupied by wiring becomes larger than the area occupied by elements on the substrate.

Therefore, there are regions on the substrate where no elements are formed. Therefore, by arranging the elements so that the groove can be placed in that region, it is possible to provide a power supply wiring having the above structure.

If this wiring has the same resistance as the corresponding conventional wiring, that is, the cross-sectional area, the width will be the same as that of the conventional wiring even if the height raised from the wiring formation surface, that is, from the surface of the insulating film on the top surface of the substrate, is the same. This makes it possible to make the size of the rc chip smaller than before.

〔Example〕

Embodiments of the present invention will be described below with reference to the side sectional view of FIG. The same reference numerals refer to the same objects throughout the design.

In the figure, reference numeral 4 indicates a power supply wiring corresponding to the conventional power supply wiring 2.

The wiring 4 has a cross section in which a raised part 4a corresponding to the conventional structure and a buried part 4b filled in the groove 1a formed in the substrate 1 with a width inside the width of the raised part 4a are integrated. It has a structure along the groove 1a in shape. Needless to say, the insulating film 3 also insulates the substrate l and the wiring 4 in the groove 1a portion.

Therefore, since the cross-sectional area of the wiring 4 is the sum of the cross-sectional area of the depressed portion 4a and the cross-sectional area of the buried portion 4b, when the cross-sectional area of the wiring 4 is made equal to that of the conventional wiring 2, the wiring 4 , that is, the width of the raised portion 4 a is smaller than that of the conventional wiring 2 .

For example, if the width of the conventional wiring 2 is 80 μm and the thickness is 1 μm, if the width of the buried portion 4b is 20 μm and the thickness is 2 μm, even if the thickness of the raised portion 4a is 1 μm, the width of the wiring 4 is the same as that of the conventional wiring. It becomes 40 μm, which is 1/2 of 2.

On the other hand, in the 1c chip, it is usually not possible to provide an element where the buried portion 4b is provided, so the wiring 4
The dimensions may be determined while taking into consideration the arrangement of elements when designing the layout of the IC chip.

From this, this power supply wiring structure has
It is effective to apply this method to the case where the width of the power supply wiring 2 of the conventional structure becomes large enough to increase the area where the elements are not arranged, and the IC
Chips can be made smaller. Moreover, since the thickness of the raised portion 4a does not need to be larger than that of the conventional wiring 2, there is no difference from the conventional wiring 2 in terms of formation of an insulating film covering the wiring 4, etc.

This power supply wiring 4 can be manufactured as follows.

That is, after forming a groove 1a in a substrate 1, a film 3 is formed on the insulation 1, and the material for the wiring 4 is deposited on it by the usual method until the surface height of the hollow part 4a is secured. , and then butter it. A beam lift-off method may be used for patterning.

At this time, if the thickness of both sides of the raised portion 4a is larger than the desired thickness, it is sufficient to apply a resist on top and remove the excessively thick portion by active ion etching (RIE) or the like to flatten the area. By dividing the above deposit into two parts and buttering each time, the embedded part 4
It is also possible to form the raised portion 4a on top of the portion b.

〔Effect of the invention〕

As explained above, according to the configuration of the present invention, it is possible to reduce the width of a power supply wiring provided on a semiconductor substrate on which integrated circuit elements are formed without increasing the height of the wiring from the surface where the wiring is formed. For example, it has the effect of making it possible to miniaturize IC chips that aim for high speed performance.

[Brief explanation of drawings]

FIG. 1 is a side sectional view showing an embodiment of the present invention, and FIG. 2 is a side sectional view showing a conventional wiring structure. In the figure, l is a substrate, 1a is a groove, 2.4 is a power supply wiring, 3 is an insulating film, 4a is a raised part of 4, and 4b is a buried part of 4.

Claims (1)

[Claims] A groove is provided on the surface of a semiconductor substrate on which an integrated circuit element is formed, an insulating film is provided on the inner surface of the groove and the surface of the substrate, and the groove is buried on the insulating film along the groove. A semiconductor integrated circuit characterized by a wide power supply wiring.