JP3064476B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and, more particularly, to a structure of an aluminum wiring portion arranged on an outer peripheral portion of a semiconductor chip.

[0002]

2. Description of the Related Art In a conventional semiconductor device, the structure of an aluminum wiring portion arranged on an outer peripheral portion of a semiconductor chip is as shown in FIG. That is, the passivation film 6 is disposed on the silicon substrate 1 so as to cover the aluminum wiring layer 5 via the field insulating film 2 and the interlayer insulating film 4.

Here, the adhesion between the aluminum wiring layer 5 and the interlayer insulating film 4 is not very good. Therefore, when an external force having a component in a direction parallel to the chip plane is applied to the aluminum wiring layer 5, the comparison is made. Easily aluminum wiring layer 5
Movement occurs.

[0004]

In the structure of the aluminum wiring portion arranged on the outer peripheral portion of the semiconductor chip in the above-described conventional semiconductor device, the aluminum wiring is formed by a stress caused by a difference in thermal expansion coefficient between the package resin and the silicon substrate when the temperature changes. The movement of the wiring layer occurs. For this reason, there has been a problem that the active elements and wirings connected to or disposed in the aluminum wiring layer are destroyed and reliability is reduced.

[0005]

According to the present invention, there is provided a semiconductor device comprising:
An aluminum wiring layer is provided on a predetermined insulating layer in the outer peripheral portion of the semiconductor chip, and a polycrystalline silicon film is provided below and in contact with the aluminum wiring layer.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1A is a plan view of a semiconductor chip showing one embodiment of the present invention, and FIG. 1B is a sectional view taken along line XX of FIG. 1A. First, a field insulating film 2 is formed on a silicon substrate 1 and a polycrystalline silicon film 3 having a thickness of about 0.4 μm is patterned into a rectangular shape (width 6 to 20 μm, length about 100 μm) to form an interlayer insulating film 4. Next, the interlayer insulating film 4 is selectively removed by etching only in the region where the aluminum wiring layer 5 is formed on the outer peripheral portion of the semiconductor chip. Subsequently, an aluminum wiring layer 5 (such as a ground wiring) having a thickness of about 0.4 μm and a width of 60 to 100 μm is formed, and a passivation film 6 is formed thereon.

With such a structure, when a force is applied to the aluminum wiring layer 5 in a direction parallel to the plane of the chip 7 and in a direction perpendicular to the longitudinal portion of the wiring 5 due to a temperature change,
First, since the polycrystalline silicon film 3 has very high adhesion to the interlayer insulating film 2 and the aluminum wiring layer 5 and the polycrystalline silicon film 3 are in contact with each other, aluminum and silicon react with each other in the melting portion to form an alloy. And the thickness of the aluminum wiring layer 5 is about 1 μm.
On the other hand, when the thickness of the polycrystalline silicon film is about 0.4 μm or the like, when the aluminum wiring layer 5 tries to move, the polycrystalline silicon film 3 shows a very large resistance, To prevent.

FIG. 2A is a plan view of a semiconductor chip showing a second embodiment of the present invention, and FIG.
It is an X-ray sectional view. In this embodiment, the pattern shape of the polycrystalline silicon film 3 is circular (about 30 to 50 μm in diameter). By doing so, the polycrystalline silicon film 3 exhibits a large resistance to a force in any direction in the plane direction of the semiconductor chip 7 and prevents the aluminum wiring layer 5 from moving.

In the above description, the term aluminum wiring layer means a wiring layer formed of not only pure aluminum but also an aluminum alloy containing components such as Si and Cu.

[0011]

As described above, according to the present invention, since the polycrystalline silicon film is disposed in contact with the aluminum wiring layer disposed on the outer peripheral portion of the semiconductor chip in contact with the aluminum wiring layer, when the temperature changes, the package resin and the silicon The aluminum wiring layer does not move even if it receives a force in the direction of the chip plane due to the stress generated due to the difference in the coefficient of thermal expansion of the substrate, which has the effect of improving the reliability of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a plan view (FIG. 1) showing a first embodiment of the present invention;
(A)) and sectional drawing (FIG.1 (b)).

FIG. 2 is a plan view (FIG. 2) showing a second embodiment of the present invention;
(A)) and sectional drawing (FIG. 2 (b)).

FIG. 3 is a plan view (FIG. 3A) and a cross-sectional view (FIG. 3B) showing a conventional example.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate 2 field insulating film 3 polycrystalline silicon film 4 interlayer insulating film 5 aluminum wiring layer 6 passivation film 7 semiconductor chip

Claims (2)

(57) [Claims] 1. A field isolation formed on a semiconductor substrate.
Edge film and interlayer insulation formed on the field insulating film
A film and the field insulating film formed on the interlayer insulating film
An opening exposing a part of the side wall of the interlayer insulating film;
The one on the field insulating film exposed by the opening
A polycrystalline silicon film formed in
In contact with the crystalline silicon film and the side wall of the interlayer insulating film
And a formed aluminum wiring layer. (2) The polycrystalline silicon film has a pattern shape
2. The semiconductor device according to claim 1, wherein the shape is circular.
Place.