JPS62233088A - Controller for capstan motor - Google Patents

Abstract

PURPOSE:To reduce the fluctuation of the rotating speed on a large scale caused by the fluctuation of the tension of a reel, by providing a memory storage to store rotation errors in a compensating means. CONSTITUTION:An AC signal (a) of a rotation sensor 2 is inputted into a speed detector 3 and a digital detection signal (b) is outputted. A compensator 4 outputs a control signal (c) based on the detection signal (b) and drives a capstan motor 1 through a power amplifier 8. A computing element 5, a memory storage 6 and a D/A converter 7.re provided to the compensator 4. The computing element 5 is provided With a rotation error detecting means to find a rotation error from the detection signal (b), a memory output productive meana, a memory updating and storing means to update and store the memory values in sequence corresponding to the operation of memory output values and rotation errors, a control signal productive means to produce control signals by the operation and aynthesization of the memory output values and rotation errors, and a reel cycle correspondently moving means to increase or decrease the number of memory values treated by the memory updating and storing means and the memory output productive means in accordance with the rotating cycle of the reel.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a control device for a capstan motor. Conventional technology A capstan motor control device that detects the rotational speed of a capstan motor using a speed detector and controls the power supplied to the capstan motor based on the detection signal is used in magnetic tape running devices such as video tape recorders. It is widely used (for example, the patent application proposed by the applicant in 1983)
However, such control devices only perform proportional, integral, and differential control, which have been used in the past, and do not sufficiently compensate for fluctuations in rotational speed caused by fluctuations in load torque. I couldn't control it. In order to solve such problems, the applicant has filed a patent application filed in 1983.
In Japanese Patent Application No. 0-229143 and Japanese Patent Application No. 60-229144, we proposed a high-performance motor speed control device that is highly resistant to load torque fluctuations. In other words, the patent application 1986-
In No. 2291443 and Japanese Patent Application No. 60-229144,
A rotation sensor that generates an alternating current signal with a period corresponding to the rotational speed of the motor, a speed detection means that performs detection multiple times per rotation of the motor based on the alternating current signal of the rotation sensor, and a detection signal based on the detection signal of the speed detection means. A speed control system is constituted by a compensating means for calculating and storing a control signal, and a power amplifying means (driving means) for supplying electric power to the motor according to the control signal of the compensating means. Further, rotation error detection means for obtaining a rotation error in response to the detection signal of the speed detection means;
From NxL (?3 [several]) memory value group h[0]? 1
A memory means for storing (NxL-1), and a composite value calculation means (memory output value creation means), update storage means for substantially sequentially updating and storing the memory value of the memory means with an update value corresponding to the value obtained by calculating and combining the resultant value of the resultant value calculation means and the rotational error of the rotational error detection means; A high-performance motor speed control device is realized by using a compensation means having a control signal generation means for generating a control signal by calculating and combining the composite value of the value calculation means and the rotation error of the rotation error detection means. There is. Problems to be solved by the invention Japanese Patent Application No. 60-229143 and Japanese Patent Application No. 60-22914
It has been found that when the motor speed control device shown in No. 4 is used as a capstan motor control device, it is necessary to make some improvements. For example, the cab of a video tape recorder. In the case of stun motors, it has been found that fluctuations in the tension from the take-up reel (or supply reel) are greatly affected, causing rotational speed fluctuations. Furthermore, the frequency of tension fluctuations from the reel changes with its winding diameter. Therefore, with the configurations of Japanese Patent Application No. 60-229143 and Japanese Patent Application No. 60-229141, it was not possible to reduce the fluctuations in rotational speed due to the influence of these tension fluctuations. The present invention takes these points into consideration and provides a capstan motor control device that sufficiently reduces the influence of tension fluctuations from the reel. Means for Solving the Problems The present invention includes a rotation sensor that generates an alternating current signal with a period corresponding to the rotational speed of the capstan motor, and a plurality of detections per rotation of the capstan motor based on the alternating current signal of the rotation sensor. a speed detection means for performing the above, and a compensation means for generating a control signal based on the detection signal of the speed detection means;
The compensation means includes a drive means for driving the capstan motor according to a control signal of the compensation means, and the compensation means includes a rotation error detection means for obtaining a rotation error in response to a detection signal of the speed detection means, and four or more rotation error detection means. memory means for storing memory values of at least one memory value stored in said memory means;
memory output value creation means for creating a memory means value using the memory values of the memory output value creation means; update storage means for substantially sequentially updating and storing memory values in the memory means; and a control signal for generating the control signal by calculating and combining the memory output value of the memory output value creation means and the rotation error of the rotation error detection means. The above-mentioned problem can be solved by configuring it to include a creation means and a reel cycle response means that increases or decreases the number of memory values handled by the update storage means and the memory output value creation means according to the rotation cycle of the reel. It is resolved. Operation The present invention realizes a high-performance capstan motor control device by adopting the above-mentioned configuration. That is, Japanese Patent Application No. 60-229143 and Japanese Patent Application No. 60-2291
The improvement of the control characteristics of the motor speed control device as shown in No. 44 has been devised so that it always corresponds to the frequency of tension fluctuation from the detection reel. Embodiment FIG. 2 shows a basic configuration diagram of a tape running system of a video tape recorder. A magnetic tape 10 fed out from a supply reel Ilb is wound around a cylinder motor 21 by more than 180 degrees by impedance rollers 22 and 23. The video information registered on the cylinder motor 21 is recorded on a magnetic tape. The magnetic tape 10 to be reproduced is pressed against the capstan motor 1 by the pinch roller 24, runs at a predetermined speed proportional to the rotational speed of the capstan motor 1, and is wound around the take-up reel lla. The rotational speed of the capstan motor 1 fluctuates due to tension fluctuations in the magnetic tape 10 caused by the take-up reel lla and the supply reel llb, causing fluctuations in the magnetic tape running speed (wow, etc.).
flutter) was occurring. Since the frequency of tension fluctuation is proportional to the rotational speed of the reel, it changes depending on the amount of winding of the magnetic tape 10 on each reel, and occurs over a fairly wide frequency range from the beginning of tape winding to the end of winding. do. In particular, the take-up reel
The rotational speed of the capstan motor 1 tends to fluctuate greatly due to the influence of la. FIG. 3 shows a configuration diagram representing an embodiment of the present invention. In FIG. 3, the rotation sensor 2 is connected to the capstan motor l.
As the motor rotates, an alternating current signal a is generated Zq times per revolution (Zq is an integer of 2 or more; in a capstan motor of a video tape recorder, normally Zq = 357).
The AC signal a of the rotation sensor 2 is input to the speed detector 3,
A digital signal corresponding to the period of the alternating current signal a is obtained. A specific example of the configuration of the speed detector 3 is shown in FIG. The AC signal a is waveform-shaped by a waveform shaping circuit 31,
A shaped signal g is obtained. The shaped signal g is directly input to the AND circuit 33 and the first differentiation circuit 3G, and is also input to the second differentiation circuit 38 via the inverter circuit 37. The first differentiation circuit 36 generates a minute width differentiation pulse i at the rising edge of the shaping signal g, and this pulse resets the internal state of the counter circuit 34. The second differentiating circuit 38 generates a differential pulse K of minute width at the rising edge of the shaping signal g, loads (inputs, holds) the digital signal J of the counter circuit 34 into the latch circuit 39, and also loads (inputs and holds) the digital signal J of the counter circuit 34 into the latch circuit 39. 40
Set the output of . The clock pulse p of the oscillation circuit 32 and the overflow output signal W of the counter circuit 34 are also input to the input side of the AND circuit 33 . The oscillation circuit 32 is composed of a crystal oscillator, a frequency divider, etc., and generates a clock pulse p (approximately 500 kHz) that has a considerably higher frequency than the frequency of the shaped signal. The counter circuit 34 is a 12-bit amplifier counter that counts and amplifies the contents of the output pulse h of the AND circuit 33 every time it arrives. Further, the overflow output signal W is "H" when the count content of the counter circuit 34 is less than a predetermined value, and when the count content of the counter circuit 34 exceeds a predetermined value, W becomes 'L'.
(here, "H" represents a high potential state and "L" represents a low potential state), the data input type flip-flop 40 receives the shaped signal g.
At the falling edge of , the "H" input to the data input terminal is taken in and the output Q is set to "H" (
When q=“H゛)” and the slope signal r from the compensator 4 becomes “■]”, the internal state of the clip-flop 40 is reset (q=“L”).Next, as shown in FIG. The operation of the speed detector 3 will be explained. Now, it is assumed that the flip-flop 40 is reset by the reset signal r. When the output signal g of the waveform shaping circuit 31 changes from "L" to "H", first, The first differentiation circuit 36 generates a differentiation pulse i and resets the counter circuit 34. Then, the clock pulse p of the oscillation circuit 32 is output as the output signal of the AND circuit 33, and the counter circuit 34 counts the output signal and changes its internal state. Next, when the output signal g of the waveform shaping circuit 31 changes from "H" to "L", the output signal g of the AND circuit 33 becomes "L", and the counter circuit 34 maintains its internal state. Further, the second differentiation circuit 38 outputs a differentiation pulse k, loads the state signal j of the counter circuit 34 into the latch circuit 39, and changes the output signal q of the flip-flop 40 from "L" to "".
Change it to H. Therefore, the digital signal S of the launch circuit 39 has a value proportional to the (half) cycle length of the AC signal a of the rotation sensor 2, and is inversely proportional to the rotation speed of the capstan motor 1. A compensator 4, which will be described later, looks at the output signal q of the flip-flop 40, and when q becomes "H", inputs the digital signal of the launch circuit 39, and then sets the reset signal r to "H" for a predetermined short period of time. ” to reset the flip-flop 40 to its initial state. Note that when the rotational speed of the capstan motor 1 is too slow, the internal state of the counter circuit 34 exceeds a predetermined value because the period of the output signal g of the waveform shaping circuit 31 is long, and the overflow output signal W changes from "H1" to "H1". Changes to L'', AND circuit 33
In some cases, the output signal becomes "L" and the counter circuit 34 holds a predetermined large value. The reel rotation sensor 12 in FIG.
occurs. The reel rotation detector 13 obtains a digital signal 1 proportional to the period of the alternating current signal e. Its specific configuration example is the same as that of the speed detector 3 shown in FIG.
Flip-flop 40 is eliminated). The compensator 4 in FIG. 3 is composed of an arithmetic unit 5, a memory 6, and a D/A converter 7, and receives a digital signal from the speed detector 3 and a digital signal from the reel rotation detector 13. is input, and a control signal C is output after being calculated and processed by a built-in program which will be described later. The control signal C of the compensator 4 is input to a power amplifier 8 (driving means), and the power amplified drive signal d (current proportional to the control signal C) is supplied to the capstan motor 1. Therefore, a speed control system is constituted by the capstan motor 1, rotation sensor 2, speed detector 3, compensator 4, and power amplifier 8 (driving means), and the rotation speed of the capstan motor 1 is controlled to a predetermined value. The memory 6 of the device 4 includes a ROM area (ROM: read-only memory) in which predetermined programs and constants are stored, and a RAM area (RAM) in which necessary values are stored at any time.
: random access memory). The arithmetic unit 5 performs predetermined operations and calculations according to a program in the ROM area. FIG. 1 shows a specific flowchart of the program.Next, its operation will be explained in detail. (1) <Rotation error detection means> First, the arithmetic unit 5 is connected to the flip-flop 40 of the speed detector 3.
It inputs the output signal q of , and waits for the signal q to become "H". In other words, the speed detector 3 detects (half) the AC signal a.
It detects the period and monitors the output of a new digital signal. When q becomes “■(”, speed detector 3
reads the digital signal S and converts it into a speed detection value S (digital value) corresponding to the digital signal S,
The flip-flop 40 of the speed detector 3 is reset by setting the reset signal r to "H" for a predetermined period of time. Predetermined reference value 5
Subtract the speed detection value S from ref, multiply that value by R (here, R is a predetermined positive integer), and calculate the current rotational error E of the capsun motor 1 (E=R・(Sref -3) ). (2) <Control signal generation means> Memory output value Vo by memory output value generation means described later
and the current rotation error E to a predetermined ratio D:1 (here,
D is a constant O<D≦1, preferably D=1), and the control signal value Y is calculated (Y-E+D-V
O), the control signal value Y is output to the D/A converter 7 and converted into a DC voltage (control signal) corresponding to the value of Y. (3) <Counting means> Nx-L (Generally, Nx is an integer, L is an integer of 4 or more, and here it is preferable that N is an integer of 2 or more, so such a case will be described below. ) to 5hod
(Law) as new. Each time the detection value S is obtained, the count variable ■ is counted up, that is, after setting it to I-1+1, ■-Nx
If it is L, reset I to 0. If such an operation is performed, l will be an integer between 0 and NxL-1. Note that the initial value of ■ is NxLI, and the initial value of L is a predetermined large integer. Further, the value of L is changed at any time by a reel cycle responsive means, which will be described later. (4) (Memory output value creation means) Integer J equal to ■ [J - r) NX memory value groups M [J - nL (mod
Using NxL)) (n = 1.--, NX), create a memory output value ■0 using the following equation.・・・・・・(1) Here, the value of ratio Wn is 0<Wn< 2/Nx (n= 1. ・・・−, N
x)...(2), and furthermore, NX Σ Wn=1...(3
) has been standardized. Specifically, in the case of NX upper 2, Wn= 1 /Nx(n ” 1 s'・'・, Nx
)−・−・・−(41, equation (1) is the memory value group M[J−nL(mod Nx L) ) (n =
1, =·=·, Nx) are simply added and combined and then divided by Nx (an integer), which makes the calculation very simple. (5) <Update storage means> Calculate an update value by calculating and combining the memory output value VO and rotation error E by the memory output value creation means at a ratio of 1=1,
The memory value M (if updated, M(1)=E+VO) in the RAM area corresponding to the count variable I is stored and saved until the next update. (6) <Reel cycle response means> Inputs the digital signal l of the reel rotation detector 13, and calculates the reel rotation detection value corresponding to the signal l (digital value).
get. Here, Ld is a 0th order proportional to the rotation period of the reel, and the value of the above-mentioned basic memory length is converted into a reel rotation detection value and d. After that, the operation returns to (1). If configured in this way, the detection reel 11 (winding-
The rotation speed of the capstan motor 1 hardly changes with respect to the tension fluctuation that occurs on the supply reel 11b or the supply reel 11b. This is because the basic memory length is changed at any time to a value proportional to the rotation period of the detection reel by the reel cycle response means, and the number of memories NxL handled by the update storage means and memory output value creation means changes, resulting in improved control characteristics. This is because the frequency that appears can always be matched to the frequency that corresponds to the rotation period of the detection reel (
For the effect of improving control characteristics, see the first patent), that is, the control characteristics (disturbance suppression characteristics) of the capstan motor at the frequency of tension fluctuation of the detection reel 11 are always improved regardless of the winding diameter of the detection reel 11. be able to. Therefore, even if the detection reel 11 generates a large tension fluctuation, the rotational speed of the capstan motor 1 will not fluctuate. Incidentally, since the capstan motor 1 was greatly affected by the tension fluctuation of the take-up reel 11, it is preferable to select the take-up reel 11 as the detection reel 11. FIG. 5 shows a flowchart of a program for the compensator 4 that takes into consideration the stability of the entire control system. Here, we have improved the method of calculating update values in the update storage means, the number of memory output values prepared in the memory output value creation means, and the way of using memory output values of the memory output value creation means in the control signal creation means. The 0th order of
The operation will be explained in detail (the overall configuration is the same as that in FIG. 3, so the explanation will be omitted). (7) <Rotation error detection means> First, the arithmetic unit 5 uses the flip-flop 40 of the speed detector 3.
It inputs the output signal q of , and waits for the signal q to become "H". In other words, the speed detector 3 detects (half) the AC signal a.
It detects the period and monitors the output of a new digital signal. When q becomes 1H'', the digital signal of the speed detector 3 is read, the speed detection value S (digital value) corresponding to the digital signal is changed, and the reset signal r is set to ``H'' for a predetermined period of time to detect the speed. The flip-flop 40 of the device 3 is reset to a predetermined reference value S.
Subtract the speed detection value S from ref, multiply that value by R (here, R is a predetermined positive integer), and calculate the current rotational error E of the capstan motor 1 (E-R・(Sref
-3) ) - (8) <Control signal creation means> Memory output value V(
Px) and the current rotational error E at a predetermined ratio D=1 to calculate the control signal value Y (Y = E + [)
-V(Px))-The control signal value Y is output to the D/A converter 7 and converted into a DC voltage (control signal) corresponding to the value of Y. (9) <Counting means> Using NX -L as mod, the count variable I is counted and amplified every time a new speed detection value S is obtained. 001 <Memory output value creation means> After sequentially transferring the contents of register variable y (m+1) to V (m) (m=o, 1....., Px-1)
, with NxL as shod, calculate the integer J by adding the count variable I to the count variable I (Px is an integer greater than or equal to 1 and less than or equal to 6, preferably Px = 3) [J = 1 +Px (+mod N
xL))6 Memory value group M in the RAM area [J −n
L (+aod NxL) )(n”1+・・・・・・
, Nx) and enter the latest memory output value calculated by the following formula into VCPx]. N, 1 (shod NxL) ) ・・
...(5) Here, the value of Wo is +21. +31 formula and (4) formula are satisfied. That is, VC+'x
) to [0] to obtain a group of consecutive PX+1 memory output values. At this time, ■ If the integer J in formula (5) when calculating [PX] is Jl, and the integer J in formula (5) when calculating V [0] is J2, then J, = J2 + Px. There is a relationship. 0υ <Update storage means> After sequentially transferring the contents of register variable X (m + l) to X (m) (m-0, 1, 2...2Kd-1), Here, Kd is an integer, preferably K = 3), the old memory output value v [0] created by the memory output value creation means and the rotation error E are calculated and combined at a ratio of 1:1. Enter the value (X (into 2) = E + v [0]), that is, K (2K
From d), an additional value of +1 (added value of memory output value and rotation error) is obtained for 2 consecutive to X[0]. Count variable with NxL as sod! Calculate the integer K by subtracting (K=I-, (sodN, L)
), then a predetermined positive ratio Cm (m=0
．． 1. ---. A new update value is obtained by adding and combining the values obtained by multiplying 2 by ) and stored as a memory value M (K) in the RAM area until the next update. In other words, let. Here, the ratio C0 has the following relationship. C,,1=C2Kd-,(m=o,l,"...+K
d) (7) Hitting reel cycle response means> Digital signal 1 of the reel rotation detector 13 is input, and the reel rotation detection value corresponding to the signal l is obtained as d (digital value).
get. Here, L is proportional to the rotation period of the reel. Next, the value of L is set to the basic memory length as described above, and then the operation returns to (7). As in this embodiment, a calculation for taking a weighted average may be inserted into the update storage means, or a predetermined deviation may be created between the second memory output value V [0] of the memory output value creation means used in the control signal creation means. It was confirmed that if (■ [PX3 is ahead of V [0]) is provided, the operation of the entire control system becomes stable. FIG. 6 shows a flowchart of another program for the compensator 4 that takes into consideration the stability of the entire control system. Here, improvements have been made in the method of calculating memory output values in the memory output value creation means and the number of memory output values to be prepared, as well as the way in which the memory output values of the memory output value creation means are used in the control signal creation means. Next, the operation will be explained in detail (the overall configuration is the same as that in FIG. 3, and the explanation will be omitted). Rotation Error Detection Means> First, the arithmetic unit 5 detects the rotation error detection unit 40 of the speed detector 3.
It inputs the output signal q of , and waits for the signal q to become "H". In other words, the speed detector 3 detects (half) the AC signal a.
It detects the period and monitors the output of a new digital signal. When q becomes "H", the digital signal of the speed detector 3 is read, the speed detection value S (digital value) corresponding to the digital signal is changed, and the reset signal r is set to "H" for a predetermined period of time to increase the speed. Reset the frisobfrop 40 of the detector 3. Predetermined reference value 5r
Subtract the speed detection value S from ef, multiply that value by R (here, R is a predetermined positive constant), and calculate the current rotational error E of the capstan motor l (E=R・(Sref -3) ). Qa <Control signal generation means> Memory output value vC by memory output value generation means described later
Px] and the current rotational error E at a predetermined ratio D:1 to calculate the control signal value Y (Y-E+D-V
(PX)) and outputs the control signal value Y to the D/A converter 7, which converts it into a DC voltage (control signal) corresponding to the value of Y. α9 Counting means> With NX-L as 5hod (modulus), count variable I is counted up every time a new speed detection value S is obtained. 01 <Memory output value creation means> After sequentially transferring the contents of register variable X(m+1) to X(m) (m=o, 1. 2.....2Kd-1), Calculate the integer J by adding PX + Kd (PX is an integer greater than or equal to 1 and less than or equal to 6, and Kd is an integer greater than or equal to 1) to the count variable ■ as l1Od [J
= T + PX + QX (IlodNxL)). A group of NX memory values MCJ-nL (modN
xL)] (n=1.....NX) using the following formula to calculate the calculated value as X[2K
d). (mod NxL) ) ...... (9) Here, the WoO value is f2), [which satisfies equations 31 and (4). That is, from X(2, ] to X[0]
2Kd+1 calculated values consecutive to (N separated by L intervals)
A calculated value obtained from X memory values is obtained. next,
After sequentially transferring the contents of register variable V(m+13 to V(m) (m=o. 1,----, PX-1), X(m)(m=0.1
゜・・・・・・, 2Kd) with a predetermined positive ratio CIIIC
Obtain the latest memory output value by adding and synthesizing the values multiplied by IIl=0°1, ..., 2Kd), and insert it into ■[PX3. Here, the ratio C,n is +71. There is a +81 relationship. That is, Px+1 consecutive from vCPx] to v[0]
memory output values are obtained. At this time, practically ■
When calculating PX3, let the integer J in formula (9) be Jl,
If the integer J in equation (9) when calculating v[0] is J2, then there is a relationship of Jl·J2+Px. That is, ■ There is a gap between [PX3 and v[0] corresponding to the integer Px. 0η Ku update storage means> The old memory output (direct V (Q) and rotational error E created by the memory output value creation means are calculated and combined at a ratio of 1:1 to calculate an updated value, and the updated value is stored in the count variable I. Update the memory value M(1) in the corresponding RAM area M(1)=E
+V [0]), stored and saved until the next update. (1m <Reel period response means> Input the digital signal ■ of the reel rotation detector 13 and obtain the reel rotation detection value corresponding to signal 1. (Obtain digital (direct). Here, Ld is the rotation period of the reel. Next, the value of Ld is set to the basic memory length as described above, and then the operation returns to a. As in this embodiment, the weighted average is taken in the memory output value creation means. The first memory output value v of the memory output value creation means used in the control signal creation means (PX3 and the memory output creation means used in the update storage means) is inserted by inserting calculations and calculations for preparing a plurality of memory output values. A predetermined difference between the second memory output value ■[0] (V(PX) is V[0]
]), the operation of the entire control becomes stable. Note that the calculations using the ratios Wn and C□ are not limited to the above forms, and may be any form that substantially realizes the contents of the above program, and various equivalent large changes are possible. Needless to say. Furthermore, when a new rotation error is obtained, the control signal generation means first outputs a new control signal, and then the memory output value generation means calculates the memory output value to be used at the next sampling point. If this is done, the calculation time of the memory output value creation means can be lengthened, and the time delay until the control signal is output can be shortened.
It is easy to ensure the stability of the control system. In each of the above embodiments, only the rotational speed of the capstan motor is detected by the speed detector, but in addition to this, the rotational phase of the capstan motor is detected by a well-known phase detector, and the two are combined. It goes without saying that this may be considered a rotation error and is included in the present invention. Also,
The output of the compensator may be a digital signal or a PWM signal (pulse width modulation signal), or the output signal of a power amplifier (driving means) may be a PWM signal. Further, a brushless DC capstan motor may be used as the capstan motor. Furthermore, the compensator may be constructed entirely from hardware such as a PLA (programmable logic array), and may perform the same operations as those performed by the program described above. Alternatively, analog arithmetic elements may be used. In addition, various modifications can be made without changing the gist of the present invention. Effects of the Invention In the capstan motor control device of the present invention, fluctuations in rotational speed due to fluctuations in reel tension are significantly reduced. Therefore, if a capstan motor control device for a video tape recorder is constructed based on the present invention, a high performance video tape recorder can be obtained.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing an example of the built-in program of the compensator shown in FIG. 3, FIG. 2 is a configuration diagram of a magnetic tape running system of a video tape recorder, and FIG. 3 is an overall control device for a capstan motor of the present invention. 4 is a specific configuration diagram of the speed detector shown in FIG. 3, and FIG. 5 is a flowchart showing another example of the built-in program of the compensator of the present invention. -+H+ - FIG. 6 is a flowchart showing another example of the built-in program of the compensator of the present invention. 1... Capstan motor, 2... Rotation sensor, 3... Speed detector, 4...
Compensator, 5th... arithmetic unit, 6... memory,
7...D/A converter, 8.Old...power amplifier,
10... Magnetic tape, 11... Detection reel, 11. ...Take-up reel, 11.・Old...
Supply reel, 12... Reel rotation sensor, 13
...Lee JL/rotation detector.

Claims (7)

[Claims] (1) a rotation sensor that generates an AC signal with a period corresponding to the rotational speed of the capstan motor; a speed detection means that detects the AC signal multiple times per rotation of the capstan motor based on the AC signal of the rotation sensor; and the speed Compensating means for generating a control signal based on the detection signal of the detecting means, and driving means for driving the capstan motor in accordance with the control signal of the compensating means, wherein the compensating means generates a control signal based on the detection signal of the speed detecting means. rotational error detection means for obtaining a rotational error in response to a detection signal; memory means for storing four or more memory values; and producing a memory output value using at least one memory value stored in the memory means. memory output value creation means, and substantially sequentially updating the memory values of the memory means with an update value corresponding to a value obtained by calculating and combining the memory output value of the memory output value creation means and the rotation error of the rotation error detection means; update storage means for storing; a control signal creation means for calculating and combining the memory output value of the memory output value creation means and the rotation error of the rotation error detection means to create the control signal; 1. A control device for a capstan motor, comprising update storage means and reel cycle response means for increasing or decreasing the number of memory values handled by the memory output value creation means. (2) The memory means stores N_xL (here, N_x is an integer of 1 or more, and L is an integer of 4 or more) memory value groups M[0] to M[N_xL-1], and the update storage means sequentially M
[0], M[1], ......, M[N_xL-1]
, and the reel cycle responsive means updates the L
Claim No. 1 characterized in that the value of (
The capstan motor control device according to item 1). (3) N_x≧2, and the memory output value creation means creates a memory value group M [J-nL (modN_xL)] (n=1,...
. . , N_x) (here, J is an integer), the memory output value substantially corresponding to the value obtained by calculating and combining the memory output values is calculated. Capstan motor control device. (4) The reel cycle response means detects the rotation cycle of the take-up reel or the supply reel, and sets a value of L that is proportional or approximately proportional to the detection cycle. The capstan motor control device according to item (2). (5) Memory output value creation is performed using N_x memory values M[J-nL (modN_xL)] (n=1, .
..., N_x) (here, J is an integer), and then calculate the value obtained by multiplying each of the plurality of consecutive calculated values with respect to the integer J by a predetermined ratio. 2. The capstan motor control device according to claim 2, wherein the memory output value is obtained by adding and combining the values. (6) The update storage means calculates an added value by adding the memory output value of the memory output value creation means and the rotational error of the rotational error detection means, and multiplies the plurality of consecutive added values by a predetermined ratio, respectively. 2. A capstan motor control device according to claim 2, wherein a value obtained by adding and combining the values is stored as a new updated value in a memory value of a memory means. (7) Claim No. 1, characterized in that the reel cycle response means detects the rotation cycle of the take-up reel.
A control device for a capstan motor as described in 2.