JPS62232053A - Operation speed controlling device for microcomputer - Google Patents

Abstract

PURPOSE:To heighten processing speed of a system as a whole by making switching control of a switching circuit by signals of a microcomputer according to operation speed of an IC device selected by the microcomputer. CONSTITUTION:A microcomputer 3 controls a switching circuit 14 according to operation speed of an IC device to be selected by signals of software. If an IC device of high operation speed is selected, the microcomputer selects a clock signal, and if an IC device of low operation speed is selected, selects a frequency dividing clock signal of low frequency. At the time of the microcomputer 3 makes internal processing at high speed, the switching circuit 14 is switched to the clock signal and controlled. In case of a microcomputer of CMOS type, etc., and a low power consumption mode is to be set, the switching circuit 14 is switched to one of frequency dividing signals to slow down processing speed and reduce power consumption.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to a microcomputer system equipped with a plurality of IC devices having different operating speeds.
The present invention relates to an operating speed control device for a microcomputer, which switches the operating speed of a microcomputer according to the operating speed of the device, and adjusts the processing speed of the entire system to an appropriate level.

(Prior Art) FIG. 2 shows a block circuit diagram of a conventional microcomputer system. In FIG. 2, clock generation circuit 1
A clock signal output from the microcomputer 3 is given to the microcomputer 3 via a clock signal line 2. This microcomputer 3 supplies address data to address data 5 via an address bus 4 at an operating speed according to a clock signal. Then, the address decoder 5 has multiple ICs.
Devices 6, 7.8 each connect chip select signal line 9.1
0. Connected via I+, microcomputer 3
The microcomputer 3 selectively controls any one of the plurality of IC devices 6.7.8 according to the address data output from the microcomputer 3, writes data to the selected tC device or reads data from the IC device. Processing is performed as appropriate.

(Problems to be Solved by the Invention) By the way, the operating speeds of the IC devices 6, 7, and 8 are various, and if the operating speed of the microcomputer 3 is too fast for the IC device with a slow operating speed, the IC device cannot write or read proper data. Therefore, the operating speed of the microcomputer 3 is determined according to the IC device with the slowest operating speed.
There was a problem in that the processing speed of the entire system was slow due to the inclusion of devices. Note that in order to increase the processing speed of the entire system, it is desirable that all the multiple IC devices have the same high operating speed, but generally speaking, IC devices with faster operating speeds are more expensive. This poses a problem in that the entire system becomes expensive.

An object of the present invention is to solve the problems of the conventional microcomputer system described above. An object of the present invention is to provide an operating speed control device for a microcomputer that can control the processing speed of the entire system by switching the speed of the microcomputer.

(Means for Solving the Problems) In order to achieve the above object, the microcomputer operating speed control device of the present invention includes a clock generation circuit that generates a clock signal, and a clock generation circuit that divides the frequency of this clock signal. A frequency dividing circuit that outputs a clock signal, a microcomputer, a switching circuit that switches between the clock signal and the frequency-divided clock signal and outputs it to the microcomputer, and a plurality of IC devices having different operating speeds. ,
The switching circuit is configured to control switching of the switching circuit by a signal from the microcomputer in accordance with the operating speed of the IC device selected by the microcomputer.

(Function) The switching circuit is controlled by a signal from the microcomputer according to the operating speed of the selected IC device, and either the clock signal or the frequency-divided clock signal is applied to the microcomputer to adjust the operating speed of the microcomputer. Even if IC devices with different operating speeds are included, when an IC device with a slower operating speed is selected, the microcomputer will also operate at a slower speed, and an IC device with a faster operating speed will be selected. When this happens, the microcomputer operates at high speeds, increasing the processing speed of the entire system.

Further, since the switching circuit is switched and controlled by the software signal of the microcomputer, the microcomputer can be operated at an appropriate processing speed.

(Description of Examples) Hereinafter, examples of the present invention will be described with reference to FIG. FIG. 1 is a block circuit diagram of a microcomputer system incorporating an embodiment of the microcomputer operating speed control device of the present invention.

In FIG. 1, a clock signal output from a clock generation circuit 1 is applied via a clock signal line 2 to two fixed frequency divider circuits 12 and 13 having different frequency division ratios and a switching circuit 14. Then, these fixed frequency divider circuits 12 and 13 output a frequency-divided clock signal obtained by dividing the clock signal into 1/2, 1/4, etc., and send it to the frequency-divided clock signal line 1.
5.16 to the switching circuit 14. This switching circuit 14 is supplied with a switching signal controlled by software from the microcomputer 3 via a switching circuit control line 17, and receives either a clock signal or a divided clock signal via a switching circuit output signal line 18. is given to microcomputer 3. Then, the microcomputer 3 provides the address data to the address decoder 5 via the address bus 4 at an operating speed corresponding to the clock frequency provided from the switching circuit 14, and similarly to the conventional device shown in FIG. , 7.8.

In such a configuration, the microcomputer 3 controls the switching circuit 14 according to the operating speed of the IC device to be selected using a software signal, and selects a clock signal if an IC device with a far operating speed is selected, and selects a clock signal when an IC device with a slower operating speed is selected. When selecting an IC device based on speed, a divided clock signal with a low frequency is selected.

When the microcomputer 3 performs internal processing at high speed, the switching circuit 14 is controlled to switch to a clock signal, and the CM
When a low power consumption mode is set for a microcomputer such as an O3 type, the switching circuit 14 is controlled to switch to one of the divided clock signals to achieve a slow processing speed and reduce power consumption.

In the above embodiment, the clock signal output from the clock signal generation circuit 1 is frequency-divided into 1/2 and 1/4 by two fixed frequency divider circuits 12 and 13 with different frequency division ratios. The present invention is not limited to this, and the number of fixed frequency dividing circuits may be one or more, and the frequency division ratio thereof may also be set appropriately.

(Effects of the Invention) As explained above, according to the microcomputer operating speed control device of the present invention, even if tC devices with different operating speeds are included, when an IC device with a slow operating speed is selected, The microcomputer also operates at a slow speed, and when an IC device with a high operation speed is selected, the microcomputer also operates at a high speed, so that the processing speed of the entire system can be increased. Further, since the switching circuit is switched and controlled by the software signal of the microcomputer, an excellent effect is achieved in that the microcomputer can be operated at an appropriate processing speed.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram of a microcomputer system incorporating an embodiment of the microcomputer operating speed control device of the present invention, and FIG. 2 is a block circuit diagram of a conventional microcomputer system. 1: Crop generator circuit, 2: Clock signal line, 3: Microcomputer, 6.7, 8: IC device, 12, 13: Fixed frequency divider circuit, 14: Switching circuit, 15, 1
6: Frequency division clock signal line, 17: Switching circuit control line, 18: Switching circuit output signal line. Figure 1

Claims (1)

[Claims] a clock generation circuit that generates a clock signal, a frequency divider circuit that divides the frequency of this clock signal and outputs a frequency-divided clock signal, a microcomputer, and the clock signal;
a switching circuit that switches the frequency-divided clock signal and outputs the frequency-divided clock signal to the microcomputer; and a plurality of IC devices having different operating speeds; An operating speed control device for a microcomputer, characterized in that the switching circuit is controlled by a signal from a computer.