JPS6223062A - Electronic counter control system for copying machine - Google Patents

Abstract

PURPOSE:To inhibit a counter from entering endless counting operation without decreasing a count index by stopping the counter on the basis of the decision result of full count using a microcomputer. CONSTITUTION:This system is provided with a means 13 which displays the contents of counting of the quantity of copies up to one sheet and a means 12 which decides a full-count state. This means 12 stores a flag for making a switch 19 ineffective in a RAM when the most significant digit bit changes from 9 to 0, and the flag is checked to make the function of the switch 19 effective or ineffective. Then, the means 12 detects the arrival of a count-up signal 200 at a connector 23 through an interface circuit 20 and checks the overflow of the counter; when the counter overflows, 9999999 is blinked for a certain time and the operation is finished without outputting an answer signal 201. When the counter is not in the overflow state, the signal 201 is outputted to the copying machine through an interface circuit 21.

Description

[Detailed description of the invention] (Technical field) The present invention relates to an electronic counter control system for a copying machine.

(Prior art) Office machines such as copying machines, facsimile machines, and line printers are equipped with talk counters that count the number of times the device is used, such as the number of copies, and charges are calculated based on the number of times the device is used, such as the number of copies. Often manages maintenance, parts replacement, etc. Therefore, it is necessary to ensure that the counter display accurately matches the actual usage frequency of the device.

Therefore, for example, for a 7-digit counter, 9,999.99
When the full count of 9 is reached, it would be a problem if the next copy returns to zero.

Therefore, in order to prohibit the conventional endless counter, a mechanism is known in which a special groove is provided in the gear 8 or 9 of the most significant digit to mechanically stop the gear, and a lever is dropped into the gear. In this case, if a special groove is provided on the gear with the highest digit number 9, the lever will operate and become inoperable, so the gear with the highest digit number 8 will be processed.

Therefore, there was a drawback that the index of the counter decreased.

(Objective) It is an object of the present invention to provide an electronic counter control method that eliminates the drawbacks of the conventional example described above and prohibits endless counting without reducing the index of the counter.

(Configuration) For this purpose, the present invention utilizes a microcomputer,
The present invention is characterized in that it determines a full count, stops counting based on the determination result, and displays this.

Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 is a schematic perspective view of an electronic copy counter of the present invention, and FIG. 2 is a block diagram thereof.

Symbol 12 is a one-chip μCPU that controls the counter, performs count-up, etc. For example, NEC's μPD7501G is suitable.

The μcpu 12 has 24 segment outputs, 4 common outputs, and 24 individual output lines that can directly drive the liquid crystal numeric display 13 (hereinafter referred to as LCD), a ROM that stores the control program for the flow shown in Figure 4, counters, operation flags, etc. This is a well-known CMOS one-chip μCPU consisting of RAM.

The LCD 13 has segment outputs SO to S of the μcpu 12.
23, is connected to the common outputs C0M0 to C0M2, and the timing pulse is generated by the oscillation circuit 14 using a well-known dynamic lighting method.

The control line 15 from the output terminal P60 of μcpul 2 is L
When the CD 13 is off, the oscillation circuit 14 is controlled to be stopped, reducing the consumption of the battery 16.

The battery 16 is a power source for holding the data of the counter 10 and driving all the circuits, and a lithium battery is suitable. According to experiments, μcpul
It can maintain functionality for about 5 years with 3V 150mAh in standby mode of 2.

The switch 17 is a switch for setting the conditions of the answer signal of the counter, and is a switch for setting the conditions of the answer signal of the counter.
It is connected to P43, and each switch has a pull-up resistor that is active at low level, and conditions such as the number and length of answer signals for checking are set by combination of switches for each copying machine model. . The structure is such that it is sealed with a cover when installed in a copying machine.

The switch 18 is a display switch for displaying the LCD 13 only when necessary, and when this switch is activated, the LCD 13 is displayed for 30 seconds. This switch is connected to the input terminal P11 of the μCPU 12, and the l and ow levels are activated by a pull-up resistor.

The switch 19 is a single reset switch,
Normally, the copy counter of a copier is zero at the time of delivery, minus 3.
It is set to a value between 000 and 5000. A rental contract or maintenance service contract becomes valid when the indicated value of the counter starts from zero, and a single reset function is required to set it to zero when the contract is established. That is, when the most significant digit changes from 9 to 0, a flag for disabling the switch is stored in the RAM of the μcpu 12, and the flag is checked to enable or disable the function of the switch 19.

The switch 19 is connected to the input terminal P12 of the μCPU 12, and has a pull-up resistor whose low level is active.

The photocoupler 20 is an interface circuit that receives and receives count-up signals from a PPC (plain paper copying machine), and is electrically insulated from the PPC. The signal from the PPC lights up the LED 2OA, the light switches the phototransistor 20B, and the output is sent to the μcpul.
The count-up signal is input to the second input terminal P50.

The photocoupler 21 is an interface for an answerback signal that detects the count-up signal and sends it back to the PPC, and drives the transistor 22 with the output signal from the output terminal P30 of the μcpul 2, turns on the LED 21A, and outputs the signal via the phototransistor 21B. and supplies it to PPC. This interface circuit is also electrically isolated from the PPC.

These signals are connected to the PPC via a connector 23.

In standby mode, the internal functions of the μCPU 12 are stopped to save power consumption. For example, NEC's μP
In the D7501G, when the 5TOP instruction is executed, the standby mode is entered, and by applying a signal to the interrupt terminal, the standby mode is canceled and the μCpu 12 is activated.

To cancel the standby mode, any of the count signal A connected to the circuit shown in FIG. When it becomes low level, N
The output of the AND gate becomes H3gh level, and the μcpu
l Interrupt pin INT for canceling standby mode of 2
O is activated and released.

Next, the operation of this counter 10 will be explained using the flows shown in FIGS. 3 to 6.

Step 100: This is an initial setting routine that is executed only when power from the battery 16 is applied to this counter.

This routine is executed only once, and its contents are as follows: (1) Resets the content counter and flags of the RAM of ucpul'l.

■ Turn off the display and set each input/output setting condition, such as the input/output setting of the I10 boat, to the initial condition.

Step 101: This is a routine for setting the μCPU 12 to standby mode after each operation in order to minimize consumption of the battery 16.

Its execution is based on a standby mode instruction such as a 3TOP instruction.

The μPD7501G of the μCPU 12 in the embodiment enters standby mode when the 5TOP instruction is executed.

It is released when each of the following external signals is active.

■When the display switch 8 is pressed, Step 102 ■When the single reset switch 19 is pressed, Step 1
03 ■When the count-up signal (Co) 200 comes from the copying machine, step 104 step 102
: When the display switch 18 is pressed, as shown in the circuit diagram of FIG. 2, the potential at the input point C of the connected NAND gate 26 becomes Low level, the output becomes High level, and the connected μCPU 12 Since the interrupt input for canceling standby mode becomes active, standby mode is canceled.

The process then proceeds to step 105 of the display processing routine.

Step 103: When the single reset switch 19 is pressed, the potential at the input point B of the connected NAND gate 26 becomes Low level, and the output becomes High level, as shown in the circuit diagram of FIG. The interrupt input for canceling the standby mode of μCPU12 becomes active.
Standby mode is canceled.

The process then proceeds to step 106 of the single reset processing routine.

Step 104: As shown in the circuit diagram of FIG. 2, a count signal (Co) 200 from the copying machine is applied to turn on the photocoupler 2OA through the connector 23, and the phototransistor 20B is connected to ogL. The potential at the input point A of the NAND gate 26 increases.

When the output becomes W level and the output becomes High level, the interrupt input for canceling the standby mode of the connected μCPU 12 becomes active, and the standby mode is canceled.

The process then proceeds to step 107 of the answerback countup processing routine.

Step 105: Display processing routine, the operation flow of which is shown in FIG.

When the display switch 18 is pressed, the standby mode is canceled in step 102, and a display time of 30 seconds is set and started using the built-in timer of the μCPU 12 (step 1).
05A) System? IIl! 15 to High level to start the oscillation of the display timing pulse oscillation circuit 14 (step 105B).

output the data to the LCD 13 and display it (step 1
05G) If a count-up signal arrives during display, it cannot be counted, so check it (Step 105D) Next, check the overtime of the 30 second timer (
Step 105E): If the time is not over, the display continues, but if the time is over, the display on the LCD 13 is turned off.Step 105F): The control line 15 is output to the l and ow levels to activate the display timing pulse oscillation circuit 14. Stop (step 105G) Return to standby mode (step 102) and enter standby mode.

Step 1O6: This is a single reset processing routine, and its operation flow is shown in FIG.

When the single reset switch 19 is pressed, step 102
The standby mode is released, and in the step 10 full routine, it is determined whether the counter contents are zero each time the count up (step 107G), and when it becomes zero, a flag is set in the RAM of the μCPU 12 to disable the single reset function. Therefore, first, it is checked whether or not this flag is set (step 106A).

If it is not set, it is set and the counter is reset (step 106B). Of course, if it is set, this single reset function is invalid, so step 1
Proceed to 02.

Step 107: Answer back count up processing routine,
The operation flow is shown in FIG.

Count-up signal (CO) 20 from the copying machine in Figure 7
When 0 comes to the connector 23, the μCPU 12 detects the count signal via the interface circuit 20 of FIG.

The μcpu 12 first checks whether the counter has overflowed (meaning 9,999.999 for a 7-digit counter) (step 107A). If the counter has overflowed, it keeps the display constant at 9,999,999. The process ends without outputting an answer signal by blinking the time (steps 107B and 107C).

If the counter does not overflow, step 10
Proceed to 7D and send the answer signal (AK) 201 in Figure 7 to μc.
pu12 to the copying machine, interface circuit 2 in Fig. 2
Output via 1.

In the embodiment, as shown in FIG. 7, the count-up signal (Co) 200 from the copying machine is Looms, and the answer signal (AK) 201 outputs two pulses of IQms after a delay time of 3Qms.

Note that T indicates the count-up timing.

That is, an answer signal is processed and output in response to a count up signal (counter step signal).

FIG. 8 shows an embodiment of a power supply circuit for controlling operation and non-operation of a copying machine.

The commercial power supply of AClooV is connected to the control power supply circuit 150 via the power switch, and then the relay switch (contact) S
Power is supplied to the driving power supply circuit 151 via R.

A control power supply circuit 150 supplies a DC1 source to the μCPU 152, various sensors, etc., while a drive power supply circuit 151 supplies a drive motor 153 for a photoreceptor drum, etc., a halogen lamp 154 for exposure, etc. AC power is supplied to the heater of the fixing device 155, etc.

Main relay RA is controlled by μcpu152. When the energization is released, turn off the relay switch SR.
Then, the power to the drive power supply circuit 151 is cut off, and the copying machine becomes in a state in which copying is disabled.

The μCPU 152 of the copying machine outputs the count-up signal CO from the connector 23 in FIG.
If the values of both signals at the timing of I are determined, and both signals Co and AK are output as shown in the correspondence diagram shown in FIG. 9, the answer signal is 30 m s with respect to the counter signal.
Since a predetermined number of outputs are being output due to the delay, it is determined to be normal, and main relay RA is kept on, and counter step signal 200 is maintained for the time indicated by the solid line in FIG.

If both signals Co and AK are not output as shown in Fig. 9, it is determined that there is an abnormality, and the main relay RA is turned off and the relay switch SR is turned off to make the copy impossible, and the count-up signal ( Co) 200 is immediately dropped as shown in the dotted line in Figure 7.

In step 107D, the count up signal is checked and the counter is incremented by one (step 107E), and in step 107G, it is determined whether the initial setting value has gone from minus to zero, and a single reset flag is set.

Then, the process returns to step 102 and waits.

This check program is the control μCPU 152 of the copying machine.
is stored in.

(Effects) The present invention is as described above, and according to the present invention, it is possible to count up to the full count index of the counter, so the number of digits can be reduced.

In addition, it is possible to stop counting at an arbitrary value instead of a full count, making it possible to apply one type of counter to copiers of different types with different numbers of copies.

[Brief explanation of drawings]

FIG. 1 is an external perspective view of an electronic counter according to the present invention, FIG. 2 is a block diagram thereof, and FIGS. 3 and 4. 5 and 6 are flowcharts showing the control operation,
FIG. 7 is a timing chart of the count-up signal and answer signal, FIG. 8 is a power supply circuit diagram of the copying machine, and FIG. 9 is a diagram showing the correspondence between each signal in FIG. 7 and the signal at a predetermined timing. . 10...Electronic counter, 12...μC for counter
pu, 152--pcpu for copying machine. Figure 1 I So 11:5 Kabuto Figure 9 Figure 8 IDjl I:)41)

Claims (1)

[Claims] An electronic copy counter for the total number of copies controlled by a microcomputer, which has means for counting the number of copies one by one, means for displaying the content, and means for determining a full count, and stops counting when the count is full. An electronic counter control method for a copying machine characterized by displaying a full count at the same time.