JPS61259382A - Electronic counter system for copying machine - Google Patents

Abstract

PURPOSE:To prevent a counter from being used illegally by outputting a check signal from a main body side to the counter side prior to a drive signal and then starting copying control on the basis of this signal and an answer signal which is shifted in phase. CONSTITUTION:When a count-up signal CO200 from a copying machine arrives at a connector 23, a micro-CPU 12 detects the count signal and outputs the answer signal AK201 to the copying machine. The signal 200 consists of the counter drive signal and check signal 200b and two check signal pulses are sent out before the drive signal; and it is checked whether or not the signal 201 is outputted in out-of-phase relation with them and when so, the drive signal is held for a time shown by a solid line. When the signals CO and AK are outputted at timing points t0 and t1 in opposite-phase relation as shown in a figure, the copying machine decides that they are outputted normally, and then holds a main relay on and also holds the counter drive signal for the time shown by the solid line. Consequently, the counter is prevented from being used illegally and driven illegally owing to its malfunction which accompanies no copying operation.

Description

[Detailed description of the invention] (Technical field) The present invention relates to an electronic counter control system for a copying machine.

(Prior Art) Maintenance service fees are paid not only when copying machines are rented or leased, but also when purchased. Therefore, since it is subject to billing, the operation of the counter is an important factor, and it is necessary to prevent unauthorized use.

Conventionally, a reed switch was wound around the coil of an electromagnetic counter or placed close to it, so that when the coil was energized by electricity, the switch was activated. Then, the switch signal is led to the control μCPU of the copying machine, and the counter is activated by checking the timing at which the switch is turned off immediately before driving the counter and the timing at which the switch is turned on immediately before turning off the power after driving. It has been determined that it is connected and operating normally.

The connection diagram is shown in FIG. Counter 1 is l of cpU
10 (e.g. I 10JIIIllL S I B25
5') is operated by transistor 2 which receives the output.

The switch 3 is excited by the coil of the counter 1 and connected to the input 4 of the CPU I/O, and the operating state of the switch 3 is checked at the timing to control the operation or stop of the copying machine. are doing.

However, in such a conventional example, counter 1 in the figure
, switch 3 is removed and the load resistance R of transistor 2 is
1. If, instead of the signal from switch 3, the counter drive voltage 24V is divided to a switch signal level of 5V using resistors R2 and R3 and applied to human power 4, the copying machine can operate even without counter 1, and the counter will continue to step. Unauthorized use is possible without permission.

Another problem with this method is that if voltage is applied to the counter by pressing the print button, the counter will increment even if the answer signal from the counter is not returned to the main unit due to some kind of malfunction. there were.

Furthermore, if this type of counter is an endless counter that returns to zero, accurate counting cannot be performed because only the counter counts and returns to zero.

It can also be used illegally.

On the other hand, since the time is counted only when the copier is copying, electronic counters with battery backup have the disadvantage that if they are kept running even when the copier is not in operation, the battery will be consumed significantly and the battery life will be shortened. .

(Objective) The present invention eliminates the drawbacks of the conventional example and provides an electronic counter control method for a copying machine that can connect the electronic counter to the copying machine main body and check its operation. The purpose is to

(Structure) Therefore, the present invention outputs a check signal from the main body side to the counter side before the step signal, instead of an answer signal corresponding to the step signal, and outputs an answer signal whose phase is shifted from this check signal. The present invention is characterized in that copy control is started based on .

An embodiment of the present invention will be described below based on the drawings.

FIG. 1 is a schematic perspective view of an electronic copy counter of the present invention, and FIG. 2 is a block diagram thereof.

Symbol 12 is a one-chip μCPU that controls this counter and holds count data. For example, NEC
The μPD7501G is passing through. μCpu 12 stores 24 segment outputs, 4 common outputs, and 24 person output lines that can directly drive the liquid crystal numeric display 13 (hereinafter referred to as LCD), and stores a control program for the flow shown in Figure 4.
This is a well-known CMOS one-chip μCpu that is composed of a ROM, a counter, an operation flag, and other RAM.

The LCD 13 has segment outputs SO to S of the μcpu 12.
23, is connected to the common outputs C0M0 to C0M2, and the timing pulse is generated by the oscillation circuit 14 using a well-known dynamic lighting method. Output terminal P of μcpu12
When the LCD 13 is off, the control line 15 from 60
The oscillation circuit 14 is controlled to be stopped, reducing the consumption of the battery 16.

The battery 16 is used for holding the data of the counter 1o and for driving all the circuits, and is preferably a lithium battery. According to experiments, μcpu1 (described later)
It can maintain functionality for about 5 years with 3V 150mAh in standby mode of 2.

The switch 17 is a switch that sets the conditions for the answer signal of the counter, and is connected to the input terminal P40- of the μcpu 12.
It is connected to P/13, and each switch has a pull-up resistor that is active at Low level, and conditions such as the number and length of answer signals for checking can be set by combination of switches for each copying machine model. Set. The structure is such that it is sealed with a cover when installed in a copying machine.

The switch 1B is a display switch for displaying the LCD 13 only when necessary, and when this switch is activated, the LCD 13 is displayed for 30 seconds. This switch is connected to the input terminal pH of the μCPU 12, and a pull-up resistor makes the Low level active.

The switch 19 is a single reset switch,
Normally, the copy counter of a copier is zero at the time of delivery, minus 3.
It is set to a value between 000 and 5000. A rental contract or maintenance service contract becomes valid when the indicated value of the counter starts from zero, and a single reset function is required to set it to zero when the contract is established. That is, when the most significant digit changes from 9 to 0, a flag for disabling the switch is stored in the RAM of the μCPU 12, and the flag is checked to enable or disable the function of the switch 19.

The switch 19 is connected to the input terminal P12 of the μCPU 12, and has a pull-up resistor that is activated at a low level.

The photocoupler 20 is an interface circuit that receives and takes count-up signals from a PPC (plain paper copying machine).
It is electrically isolated from the PC.

The LED 2OA is turned on by a signal from the PPC, the phototransistor 20B is switched by the light, and this output is taken into the input terminal P50 of the μcput2, and is used as a count-up signal.

The photocoupler 21 is an interface for an answerback signal that detects the count-up signal and sends it back to the PPC, and drives the transistor 22 with the output signal from the output terminal P30 of the μCPU 12 to light up the LED 21A, and the phototransistor 21B. via PI)
It is supplied to C. This interface circuit is also electrically isolated from the RPC.

These signals are connected to the PPC via a connector 23.

In standby mode, the internal functions of the μCPU 12 are stopped to save power consumption. For example, NEC's μP
In the D7501G, when the 5TOP instruction is executed, the standby mode is entered, and by applying a signal to the interrupt terminal, the standby mode is canceled and the μCPU 12 is activated.

To cancel the standby mode, either the count signal A8 display 5W18 activation signal B or the single reset SW19 activation signal C connected to the circuit shown in Figure 2 is activated.
When the input of the AND gate 26 becomes low level, the NA
The output of the ND gate becomes High level, and μcpu1
The interrupt terminal INTO for canceling the standby mode of No. 2 becomes active and cancels the standby mode.

Next, the operation of this counter 10 will be explained using the flows shown in FIGS. 3 to 6.

Step 100: This is an initial setting routine that is executed only when power from the battery 16 is applied to this counter.

This routine is executed only once, and its contents are as follows: (1) Resets the RAM contents counter and flags of the μCPU 12;

■ Turn off the display and set each input/output setting condition, such as the input/output setting of the I10 boat, to the initial condition.

Step 101: This is a routine for setting the μCPU 12 to standby mode after each operation in order to minimize consumption of the battery 16.

Its execution is based on standby mode instructions such as the 5TOP instruction.

p P D75 of μcpu12 in Example (IIG is 5T
When the OP instruction is executed, it enters standby mode.

It is released when each of the following external signals is active.

■ When the display switch 18 is pressed, Step 102 ■ When the single reset switch 19 is pressed, Step 103 ■ When the counter up signal (Co) 200 is received from the copying machine Step 104 Step 10
2: When the display switch 18 is pressed, as shown in the circuit diagram of FIG. 2, the potential at the input point C of the connected NAND gate 26 becomes the l,ow level, the output becomes the H1gh level, and the connection is established. Since the interrupt input for canceling standby mode of μCPU 12 becomes active, standby mode is canceled.

The process then proceeds to step 105 of the display processing routine.

Step 103: When the single reset switch 19 is pressed, as shown in the circuit diagram of FIG.
Since the interrupt input for canceling the standby mode of the μCpu 12 connected to the h level becomes inactive, the standby mode is canceled.

The process then proceeds to step 106 of the single reset processing routine.

Step 104: As shown in the circuit diagram of FIG. 2, a count signal (Co) 200 from the copying machine is applied to turn on the photocoupler 2OA via the connector 23, and the phototransistor 20B is turned on and connected. The potential at the input point A of the NAND gate 26 becomes Low level, and the output becomes High.
When the level is reached, the interrupt input for canceling the standby mode of the connected μCPU12 becomes active,
Standby mode is canceled.

The process then proceeds to step 107 of the answerback countup processing routine.

Step 105: Display processing routine, the operation flow of which is shown in FIG.

When the display switch 1 day is pressed, the standby mode is canceled in step 102, and a display time of 30 seconds is set and started using the built-in timer of the μCPU 12 (step 1).
05A).

Regulation? 1llf% 115 is output to High level to start oscillation of the display timing pulse oscillation circuit 14 (step 105B).

The counter data stored in the RAM of the μcpu 12 is output to the LCD 13 and displayed (step 105
).

If a count-up signal arrives during display, it will not be possible to count, so this is checked (step 105D).

Next, the overtime of the 30 second timer is checked (step 105E), and if the timer is not over, the display continues, but if the timer is over, the display on the LCD 13 is turned off (step 105F), and the control iWJ line 15 is set to low level. to stop the display timing pulse oscillation circuit 14 (step 105G).

The process returns to standby mode (step 102) and enters standby mode.

Step 106: Single reset processing routine, the operation flow of which is shown in FIG.

When the single reset switch 19 is pressed, step 102
The standby mode is released, and in the step 10 full routine, it is determined whether the counter contents are zero at each count up (step 107G), and when it becomes zero, a flag to disable the single reset function is stored in the RAM of the μcpu 12.
(Step 107H), first check whether this flag is set (Step 106A).
).

If it is not set, it is set and the counter is reset (step 106B). Of course, if it is set, this single reset function is invalid, so step 1
Proceed to 02.

Step 107: Answer back count up processing routine,
The operation flow is shown in FIG.

Count-up signal (CO) 20 from the copying machine in Figure 7
When 0 comes to the connector 23, the μCPU 12 detects the count signal via the interface circuit 20 of FIG.

The μcpu 12 first checks whether the counter has overflowed (meaning 9,999.999 for a 7-digit counter) (step 107A), and if the counter has overflowed, displays 9.999.999. It blinks for a certain period of time and ends without outputting an answer signal (steps 107B and 107C).

If the counter does not overflow, step IO
? Proceed to D and send the answer signal (AK) 201 in Figure 7 to μc.
pu12 is the interface circuit 21 in FIG. 2 to the copying machine.
Output via.

In the embodiment, as shown in FIG. 7, the count-up signal (Co) 200 from the copying machine is 100 ms, and the answer is
The signal (AK) 201 outputs two pulses of 10 m3.

To explain the count-up signal 200 in more detail, it consists of a counter step signal 200a and a check signal 200b. In this example, two check signal pulses are output before the sidewalk signal 200a, and the phase is It is checked whether or not the answer signal 201 is outputted after shifting, and if it is outputted, the step signal 200a is held for the time indicated by the solid line.

FIG. 8 shows an embodiment of a power supply circuit for controlling operation and non-operation of a copying machine.

The commercial power supply of AClooV is connected to the control power supply circuit 150 via the power switch, and then the relay switch (contact) S
Power is supplied to the driving power supply circuit 151 via R.

A control power supply circuit 150 supplies DC power to the μCPU 152 and various sensors, while a drive power supply circuit 151 supplies drive motors 153 . Exposure halogen lamp 154. The ACt source is supplied to the heater of the fixing device 155, etc.

Main relay RA is controlled by μcpu152. When the energization is released, turn off the relay switch SR.
Then, the power to the drive power supply circuit 151 is cut off, and the copying machine becomes in a state in which copying is disabled.

The μCPU 152 of the copying machine first outputs the check signal 200b from the connector 23 in FIG.
Input the signal AK and let the μcpu 152 judge the values of both signals at the timing of jll+tI in FIG. 7. If both signals Co and AK appear as shown in the correspondence diagram shown in FIG. 9, it is normal. It is determined that the main relay RA is kept on, and the counter step signal 200a is maintained for the time indicated by the solid line in FIG.

If both signals Co and AK are not output as shown in Fig. 9, it is determined that there is an abnormality, and the main relay RA is turned off and the relay switch SR is turned off to make the copy impossible, and the count-up signal ( GO) 200 is immediately dropped as shown by the dotted line in Figure 7.

In step 107D, the count up signal is checked and the counter is incremented by one (step 107E), and in step 107G, it is determined whether the initial setting value has gone from minus to zero, and a single reset flag is set.

Then, the process returns to step 102 and waits.

This check program is the control μCPU 152 of the copying machine.
is stored in.

(Effects) The present invention is as described above, and according to the present invention, it is possible to prevent unauthorized use of the counter, and to prevent the counter from malfunctioning without copying, which would be disadvantageous from the user's point of view. can be prevented.

[Brief explanation of the drawing]

FIG. 1 is an external perspective view of an electronic counter according to the present invention, FIG. 2 is a block diagram thereof, and FIGS. 3 and 4. 5 and 6 are flowcharts showing the control operation,
Fig. 7 is a timing chart of the count-up signal and answer signal, Fig. 8 is a power supply circuit diagram of the copying machine, Fig. 9 is a diagram showing the correspondence between each signal in Fig. 7 and the signal at a predetermined timing. FIG. 10 is a circuit diagram of a conventional counter. 10...Electronic counter, 12...μc for counter
pu, 152...μcpu for copying machine. Figure 1 Figure 8

Claims (1)

[Claims] In a copying machine controlled by a μCPU and equipped with an electronic counter for displaying the total number of copies, upon receiving a check signal from the main unit, the counter outputs an answer signal that is out of phase with this check signal. An electronic counter control system for a copying machine, characterized in that a counter increment signal is output from the main body side in response to an answer signal.