JPS6222543B2 - - Google Patents
Info
- Publication number
- JPS6222543B2 JPS6222543B2 JP55150795A JP15079580A JPS6222543B2 JP S6222543 B2 JPS6222543 B2 JP S6222543B2 JP 55150795 A JP55150795 A JP 55150795A JP 15079580 A JP15079580 A JP 15079580A JP S6222543 B2 JPS6222543 B2 JP S6222543B2
- Authority
- JP
- Japan
- Prior art keywords
- diffusion region
- type diffusion
- metal wiring
- type
- wiring layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000009792 diffusion process Methods 0.000 claims description 39
- 229910052751 metal Inorganic materials 0.000 claims description 27
- 239000002184 metal Substances 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 15
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 claims 1
- 239000013078 crystal Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】 この発明は、受光装置に関する。[Detailed description of the invention] The present invention relates to a light receiving device.
第１図は従来の受光装置の断面図であり、この
第１図において、１は第１の導電型の基板、２は
第１の導電型とは異なる層、３は表面保護のシリ
コン酸化膜、４は層２の電極である。 FIG. 1 is a cross-sectional view of a conventional light receiving device. In FIG. 1, 1 is a substrate of the first conductivity type, 2 is a layer different from the first conductivity type, and 3 is a silicon oxide film for surface protection. , 4 are the electrodes of layer 2.
また、第２図は第１図の使い方の等価回路図で
ある。この第２図において、Ｅは電源であり、こ
の電源Ｅの両極間に負荷抵抗RLと第１図の受光
装置PDが直列に接続されている。 Further, FIG. 2 is an equivalent circuit diagram of the usage of FIG. 1. In this FIG. 2, E is a power source, and a load resistor RL and a light receiving device PD of FIG. 1 are connected in series between both poles of this power source E.
このような従来の受光装置の動作は、Ｐ―Ｎ接
合を逆バイアスして、負荷抵抗RLを接続して用
いる。光が照射されると、3nA／mm2Lux程度の光
電流ＩLが流れるが、同時に50〜200pA／mm2程度
の暗電流Idと呼ばれる接合リーク電流が流れる。 Such a conventional light receiving device operates by reverse biasing the PN junction and connecting a load resistor RL. When light is irradiated, a photocurrent I L of about 3 nA/mm 2 Lux flows, but at the same time a junction leakage current called dark current Id of about 50 to 200 pA/mm 2 flows.
すなわち、（ＩL＋Id）が負荷抵抗RLに流れ
る。したがつて、光が弱い場合に、暗電流が無視
できなくなり、正確な光信号を得ることができな
くなる欠点があつた。その様子が第３図に示され
ている。 That is, (I L +Id) flows to the load resistance RL. Therefore, when the light is weak, the dark current cannot be ignored, making it impossible to obtain an accurate optical signal. The situation is shown in FIG.
また、暗電流は、周囲温度が30〜35℃上昇する
と、約１桁大きくなるので、上記欠点はより大き
くなると云う欠点があつた。 Further, the dark current increases by about one order of magnitude when the ambient temperature rises by 30 to 35°C, so the above-mentioned drawback becomes even greater.
この発明は、上記の点にかんがみなされたもの
で、暗電流を減少させかつ暗電流の温度特性にす
ぐれた受光装置を提供することを目的とする。 The present invention has been made in view of the above points, and an object of the present invention is to provide a light receiving device that reduces dark current and has excellent temperature characteristics of dark current.
以下、この発明の受光装置の実施例について図
面に基づき説明する。第４図はその一実施例の構
成を示す断面図である。この第４図において、５
はＮ型単結晶シリコン基板である。Ｎ型単結晶シ
リコン基板５に第1P型拡散領域６が形成されて
おり、この第1P型拡散領域６と離間して第2P型
拡散領域７が形成されている。 Embodiments of the light receiving device of the present invention will be described below with reference to the drawings. FIG. 4 is a sectional view showing the configuration of one embodiment. In this Figure 4, 5
is an N-type single crystal silicon substrate. A first P-type diffusion region 6 is formed in an N-type single crystal silicon substrate 5, and a second P-type diffusion region 7 is formed apart from the first P-type diffusion region 6.
第1P型拡散領域６には、第1N型拡散領域８、
オーミツクをとるためのＰ型コンタクト領域９が
形成されている。そして、Ｎ型単結晶シリコン基
板５、第1P型拡散領域６、第2P型拡散領域７の
上面には、第2P型拡散領域７上の第１開口部１
３、第1N型拡散領域８上の第２開口部１４、Ｐ
型コンタクト領域９上の第３開口部１５を除い
て、酸化物層１０が形成されている。 The first P-type diffusion region 6 includes a first N-type diffusion region 8,
A P-type contact region 9 is formed to provide ohmic contact. The upper surfaces of the N-type single crystal silicon substrate 5, the first P-type diffusion region 6, and the second P-type diffusion region 7 are provided with a first opening 1 on the second P-type diffusion region 7.
3. Second opening 14 on first N-type diffusion region 8, P
An oxide layer 10 is formed except for the third opening 15 over the mold contact region 9 .
第１開口部１３と第２開口部１４上には酸化物
層１０をまたぐようにして、第１金属配線層１１
により、第2P型拡散領域７と第1N型拡散領域８
が結線されている。また、第３開口部１５上には
第２金属配線層１２が形成されている。 A first metal wiring layer 11 is formed over the first opening 13 and the second opening 14 so as to straddle the oxide layer 10.
Accordingly, the second P-type diffusion region 7 and the first N-type diffusion region 8
is connected. Further, a second metal wiring layer 12 is formed on the third opening 15 .
これらの第１金属配線層１１、第２金属配線層
１２上および酸化物層１０上には、中間絶縁膜１
６が形成されている。この中間絶縁膜１６上にお
いて、受光窓１８を除いて光しやへい層１７が形
成されている。受光窓１８には入射光１９が入射
するようになつている。 An intermediate insulating film 1 is formed on the first metal wiring layer 11, the second metal wiring layer 12, and the oxide layer 10.
6 is formed. A light-shielding layer 17 is formed on the intermediate insulating film 16 except for the light-receiving window 18 . Incident light 19 is made to enter the light receiving window 18 .
次に、上述のような構造を有するこの発明の受
光装置の製造工程について概述する。まず、キヤ
リア密度1015／cm3程度の〈100〉Ｎ型単結晶シリ
コン基板５を用いて第1P型拡散領域６を10〜15
μｍの拡散深さに拡散する。 Next, the manufacturing process of the light receiving device of the present invention having the above-described structure will be outlined. First, using a <100> N-type single crystal silicon substrate 5 with a carrier density of about 10 15 /cm 3 , a first P-type diffusion region 6 is formed with 10 to 15
Diffuses to a diffusion depth of μm.
次に、第2P拡散領域７（P+層）を拡散すると
ともに、第1P型拡散領域６にＰ型コンタクト領
域９を２μ程度拡散する。そして、この第1P型
拡散領域６に第1N型拡散領域８（N+層）を２〜
３μ程度に拡散する。 Next, while diffusing the second P diffusion region 7 (P + layer), a P type contact region 9 of about 2 μm is diffused into the first P type diffusion region 6 . Then, a first N-type diffusion region 8 (N + layer) is placed in this first P-type diffusion region 6 .
Diffuses to about 3μ.
次に、金属膜とシリコン間にオーミツクをとる
ために、第2P型拡散領域７、第1N型拡散領域
８、Ｐ型コンタクト領域９上の酸化物層１０にそ
れぞれ第１ないし第３開口部１３〜１５を開口さ
せ、金属膜を１μ程度蒸着後、ホトリソ工程を経
て、第１金属配線層１１、第２金属配線層１２を
得る。第１金属配線層１１が受光装置の出力部に
なる。 Next, in order to establish an ohmic between the metal film and the silicon, first to third openings 13 are formed in the oxide layer 10 on the second P-type diffusion region 7, the first N-type diffusion region 8, and the P-type contact region 9, respectively. 15 are opened, a metal film is deposited to a thickness of about 1 μm, and then a photolithography process is performed to obtain a first metal wiring layer 11 and a second metal wiring layer 12. The first metal wiring layer 11 becomes the output part of the light receiving device.
次に、中間絶縁膜１６を0.5〜１μ程度形成
後、光しやへい層１７をたとえば、アルミニウム
を１μ程度蒸着し、受光窓１８を第2P型拡散領
域７上に開口する。また、第1P型拡散領域６と
第2P型拡散領域７の間隔は100μ程度離間する。 Next, after forming an intermediate insulating film 16 of about 0.5 to 1 μm, a light-shielding layer 17 of, for example, aluminum of about 1 μm is deposited, and a light-receiving window 18 is opened on the second P-type diffusion region 7 . Further, the distance between the first P type diffusion region 6 and the second P type diffusion region 7 is about 100 μm.
第５図は上述のように製造されたこの発明の受
光装置の動作例を示す等価回路図である。この第
５図において、２０はＮ型単結晶シリコン基板５
と第2P型拡散領域７とで構成される第１のダイ
オード（受光素子）であり、第４図におけるＮ型
単結晶シリコン基板５がカソードとなり、第１金
属配線層１１がアノードとなるものである。 FIG. 5 is an equivalent circuit diagram showing an example of the operation of the light receiving device of the present invention manufactured as described above. In this FIG. 5, 20 is an N-type single crystal silicon substrate 5.
and a second P-type diffusion region 7, the N-type single crystal silicon substrate 5 in FIG. 4 serves as a cathode, and the first metal wiring layer 11 serves as an anode. be.
また、２１は光しやへいされた第２のダイオー
ド（受光素子）であり、第４図における第1P型
拡散領域６と第1N型拡散領域８とで構成される
ものであり、カソードが第１金属配線層１１で、
アノードが第２金属配線層１２である。この第１
のダイオード２０と第２のダイオード２１はそれ
ぞれ逆バイアスされている。すなわち、第１のダ
イオード２０のカソード（Ｎ型単結晶シリコン基
板５）が第１の直流電源Ｅ１の正極に接続され、
同ダイオード２０のアノード（第１金属配線層１
１）が前記第１の直流電源Ｅ１の負極に接続され
ている。また、第２のダイオード２１のカソード
（第１金属配線層１１）が第２の直流電源Ｅ２の
正極に接続され、同ダイオード２１のアノード
（第２金属配線層１２）が前記第２の直流電源Ｅ
２の負極に接続される。そして、この第２の直流
電源Ｅ２の正極および第１の直流電源Ｅ１の負極
と第１のダイオード２０のアノードおよび第２の
ダイオード２１のカソード（第１金属配線層１
１）間には負荷抵抗RLが接続され、その両端が
出力outとして導出される。 Further, 21 is a second diode (light receiving element) which is shielded from light and is composed of the first P-type diffusion region 6 and the first N-type diffusion region 8 in FIG. 1 metal wiring layer 11,
The anode is the second metal wiring layer 12. This first
The diode 20 and the second diode 21 are each reverse biased. That is, the cathode (N-type single crystal silicon substrate 5) of the first diode 20 is connected to the positive electrode of the first DC power source E1,
The anode of the diode 20 (first metal wiring layer 1
1) is connected to the negative electrode of the first DC power source E1. Further, the cathode (first metal wiring layer 11) of the second diode 21 is connected to the positive electrode of the second DC power source E2, and the anode (second metal wiring layer 12) of the second diode 21 is connected to the second DC power source E2. E
Connected to the negative electrode of No.2. The positive electrode of the second DC power source E2, the negative electrode of the first DC power source E1, the anode of the first diode 20, and the cathode of the second diode 21 (the first metal wiring layer 1
1) A load resistor RL is connected between them, and both ends thereof are derived as an output.
第１のダイオード２０には、入射光１９が受光
窓１８を通して入射し、光電流ＩLと第１のダイ
オード２０の暗電流Id1が流れる。第２のダイオ
ード２１には、光しやへいされているため、光電
流は流れず、暗電流Id1のみが流れる。 Incident light 19 enters the first diode 20 through the light receiving window 18, and a photocurrent I L and a dark current Id 1 of the first diode 20 flow. Since the second diode 21 is shielded from light, no photocurrent flows, and only the dark current Id 1 flows.
第１のダイオード２０の光電流は3mA／mm2・
Lux程度であり、暗電流は50〜200PA／mm2であ
る。第２のダイオード２１の暗電流は拡散濃度な
どが第１のダイオード２０と異なるため、500〜
1000PA／mm2程度である。 The photocurrent of the first diode 20 is 3mA/mm 2
Lux, and the dark current is 50 to 200 PA/ mm2 . The dark current of the second diode 21 is different from that of the first diode 20 in terms of diffusion concentration, etc.
It is about 1000PA/ mm2 .
ここでは、暗電流はほぼ面積に比例するので、
Id1とId2をほぼ等しくするために、第２のダイオ
ード２１の面積を第１のダイオード２０の面積の
約1/5にしている。 Here, the dark current is approximately proportional to the area, so
In order to make Id 1 and Id 2 approximately equal, the area of the second diode 21 is made approximately 1/5 of the area of the first diode 20.
また、出力電圧Voutは｛（ＩL＋Id1）−Id2｝×Ｒ
Lに比例するので、Id1≒Id2としてあるため、出
力電圧VoutはＩLＲLにほぼ等しくなる利点を有
する。 Also, the output voltage Vout is {( IL + Id 1 ) − Id 2 }×R
Since it is proportional to L , Id 1 ≈Id 2 , so the output voltage Vout has the advantage of being approximately equal to I L RL .
さらに、第１のダイオード２０の暗電流と第２
のダイオード２１の暗電流の温度特性も約30〜35
℃程度上昇で、暗電流が１桁上昇するので、（Id1
−Id2）の値は非常に小さく、従来の場合の暗電流
Id1の増加傾向に比較し、軽減できるので、受光
装置の暗電流の温度特性にすぐれる利点を有す
る。 Furthermore, the dark current of the first diode 20 and the second
The temperature characteristic of the dark current of diode 21 is also about 30 to 35
As the dark current increases by an order of magnitude with an increase of approximately ℃, (Id 1
−Id 2 ) is very small, and the dark current in the conventional case
Since it can be reduced compared to the increasing tendency of Id 1 , it has the advantage of excellent temperature characteristics of the dark current of the light receiving device.
なお、この発明は第２のダイオードを有するこ
とにより、実効暗電流を小さくできるので、微弱
光の検知を広い温度範囲で検知できる利点があ
り、広いダイナミツクレンジの要求されるホトダ
イオードに利用できる。 Note that by including the second diode, the present invention can reduce the effective dark current, so it has the advantage of being able to detect weak light in a wide temperature range, and can be used for photodiodes that require a wide dynamic range.
以上のように、この発明の受光装置によれば、
第１および第２の受光素子を形成し、この各受光
素子を通して負荷に逆方向に電流を流し、第２の
受光素子は光しやへいして暗電流のみを流すこと
により、第１の受光素子で発生した不要な暗電流
は第２の受光素子の暗電流で差し引くようにした
ので、出力端における実効暗電流が非常に小さく
なるとともに、実効暗電流の温度特性も向上す
る。これにより、低照度の微弱光も広い温度範囲
で検知できる利点がある。 As described above, according to the light receiving device of the present invention,
By forming first and second light receiving elements, passing current in the opposite direction to the load through each light receiving element, and blocking light from the second light receiving element to allow only dark current to flow, the first light receiving element Since the unnecessary dark current generated is subtracted by the dark current of the second light-receiving element, the effective dark current at the output terminal becomes extremely small, and the temperature characteristics of the effective dark current are also improved. This has the advantage that even low-intensity, weak light can be detected over a wide temperature range.
第１図は従来の受光装置の構造を示す断面図、
第２図は第１図の受光装置の使い方の等価回路
図、第３図は従来の受光装置の照度対電流の特性
図、第４図はこの発明の受光装置の一実施例の構
造を示す断面図、第５図は第４図の受光装置の使
い方の等価回路図である。
５…Ｎ型単結晶シリコン基板、６…第1P型拡
散領域、７…第2P型拡散領域、８…第1N型拡散
領域、９…Ｐ型コンタクト領域、１０…酸化物
層、１１…第１金属配線層、１２…第２金属配線
層、１３…第１開口部、１４…第２開口部、１５
…第３開口部、１６…中間絶縁膜、１７…光しや
へい層、１８…受光窓、１９…入射光、２０…第
１のダイオード、２１…第２のダイオード、Ｅ１
…第１の直流電源、Ｅ２…第２の直流電源、RL
…負荷抵抗。
Figure 1 is a sectional view showing the structure of a conventional light receiving device.
Fig. 2 is an equivalent circuit diagram of how to use the light receiving device shown in Fig. 1, Fig. 3 is a characteristic diagram of illuminance versus current of a conventional light receiving device, and Fig. 4 shows the structure of an embodiment of the light receiving device of the present invention. The sectional view, FIG. 5, is an equivalent circuit diagram of how to use the light receiving device of FIG. 4. 5... N-type single crystal silicon substrate, 6... First P-type diffusion region, 7... Second P-type diffusion region, 8... First N-type diffusion region, 9... P-type contact region, 10... Oxide layer, 11... First Metal wiring layer, 12... Second metal wiring layer, 13... First opening, 14... Second opening, 15
... Third opening, 16... Intermediate insulating film, 17... Light-shielding layer, 18... Light-receiving window, 19... Incident light, 20... First diode, 21... Second diode, E1
...First DC power supply, E2...Second DC power supply, RL
…Load resistance.
Claims (1)
シリコン基板の表面の一部に形成された第1P型
拡散領域と、この第1P型拡散領域から所定の距
離を隔てて上記Ｎ型単結晶シリコン基板の表面に
形成され該Ｎ型単結晶シリコン基板とで第１の受
光素子を形成する第2P型拡散領域と、上記第1P
型拡散領域の表面の一部に形成され該第1P型拡
散領域とで第２の受光素子を形成する第1N型拡
散領域と、この第1N型拡散領域から所定の距離
離間して上記第1P型拡散領域の表面に形成され
たＰ型コンタクト領域と、上記第2P型拡散領域
の表面に第１開口部および上記第1N型拡散領域
の表面に第２開口部と上記Ｐ型コンタクト領域の
表面に第３開口部を配置するごとく上記Ｎ型単結
晶シリコン基板の表面に形成された酸化物層と、
上記第１開口部と第２開口部を電気的に結合する
ごとく上記酸化物層上に形成された第１の金属配
線層と、上記第３開口部から上記酸化物層上に形
成された第２の金属配線層と、上記酸化物層と第
１および第２の金属配線層上に形成された絶縁物
層と、上記第2P型拡散領域の上方に存在する上
記絶縁物層の表面以外の上記絶縁物層の表面に入
射光の透過を防止するごとく形成された光しやへ
い層と、上記第１の金属配線層に負極、上記Ｎ型
単結晶シリコン基板に正極が接続された第１の直
流電源と、上記第１の金属配線層に正極、上記第
２の金属配線層に負極が接続された第２の直流電
源と、この第２の直流電源の正極および上記第１
の直流電源の負極と上記第１の金属配線層間に挿
入された負荷とを具備してなる受光装置。1 an N-type single-crystal silicon substrate, a first P-type diffusion region formed on a part of the surface of this N-type single-crystal silicon substrate, and the above-mentioned N-type single crystal at a predetermined distance from this first P-type diffusion region. a second P-type diffusion region formed on the surface of the silicon substrate and forming a first light receiving element together with the N-type single crystal silicon substrate;
a first N-type diffusion region that is formed on a part of the surface of the first P-type diffusion region and forms a second light-receiving element with the first P-type diffusion region; a P-type contact region formed on the surface of the type diffusion region, a first opening on the surface of the second P-type diffusion region, a second opening on the surface of the first N-type diffusion region, and a surface of the P-type contact region. an oxide layer formed on the surface of the N-type single crystal silicon substrate such that a third opening is arranged;
A first metal wiring layer formed on the oxide layer so as to electrically couple the first opening and the second opening, and a first metal wiring layer formed on the oxide layer from the third opening. the second metal wiring layer, the insulating layer formed on the oxide layer and the first and second metal wiring layers, and the surface of the insulating layer existing above the second P-type diffusion region. a light-shielding layer formed on the surface of the insulating layer to prevent transmission of incident light; a first metal wiring layer having a negative electrode connected to the first metal wiring layer; and a positive electrode connected to the N-type single crystal silicon substrate. a second DC power source having a positive electrode connected to the first metal wiring layer and a negative electrode connected to the second metal wiring layer; a positive electrode of the second DC power source and the first DC power source;
A light receiving device comprising a negative electrode of a DC power source and a load inserted between the first metal wiring layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55150795A JPS5775469A (en) | 1980-10-29 | 1980-10-29 | Light receiving device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55150795A JPS5775469A (en) | 1980-10-29 | 1980-10-29 | Light receiving device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5775469A JPS5775469A (en) | 1982-05-12 |
| JPS6222543B2 true JPS6222543B2 (en) | 1987-05-19 |
Family
ID=15504593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55150795A Granted JPS5775469A (en) | 1980-10-29 | 1980-10-29 | Light receiving device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5775469A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0260856U (en) * | 1988-10-28 | 1990-05-07 | ||
| JPH0299341U (en) * | 1989-01-25 | 1990-08-08 |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07120767B2 (en) * | 1986-09-19 | 1995-12-20 | キヤノン株式会社 | Photoelectric conversion device |
| US5245203A (en) * | 1988-06-06 | 1993-09-14 | Canon Kabushiki Kaisha | Photoelectric converter with plural regions |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5272195A (en) * | 1975-12-12 | 1977-06-16 | Matsushita Electric Ind Co Ltd | Photoelectric converter |
-
1980
- 1980-10-29 JP JP55150795A patent/JPS5775469A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0260856U (en) * | 1988-10-28 | 1990-05-07 | ||
| JPH0299341U (en) * | 1989-01-25 | 1990-08-08 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5775469A (en) | 1982-05-12 |
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