JPS62224836A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To debug a circuit in a short time and to simulate trouble in a short time by providing the input or output part of a circuit block split as separate functions with a register exchanging a signal with a signal bus. CONSTITUTION:An integrated circuit device is configured with the circuit blocks B1-B8 divided as separate functions. The output parts of the circuit blocks B1-B8 are provided with the registers R1-R8 that independently take out respective output signals and set the output states from the outside. The registers R1-R8 exchange signals with respective signal buses to take out or set the output signals. Since input signals can be supplied or output signals can be fetched at every functional circuit block through the signal bus and the register, the circuit functions can be checked out in a short time.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to semiconductor integrated circuit technology and a semiconductor integrated circuit device equipped with a digital information processing circuit, and is used, for example, for debugging circuit functions or failure simulation. It is related to effective technology.

[Conventional technology]

2. Description of the Related Art Advances in semiconductor technology have led to miniaturization of elements, and it has become possible to provide more circuit functions to a single semiconductor integrated circuit device, such as an 1-chip microcomputer, for example. Regarding such a one-chip micro convenience store, for example, Hitachi, Ltd.
Hitachi Microcomputer Data Book Published in September 1981 There is an 8-bit single chip j.

[Problem that the invention seeks to solve]

As the circuit scale of the semiconductor integrated circuit devices described above increases, when designing circuits, it is necessary to perform circuit depacking to check whether the device has the desired operational function or not, and to analyze the results assuming a single failure. The time required to investigate and simulate failures is increasing exponentially. The reason for this is that the entire logic circuit in the semiconductor integrated circuit device is involved in a complex manner in response to some circuit defects or one failure assumption.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device with an added function that allows checking of various circuit functions in a short period of time.

The above and further objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this competition is as follows.

That is, a register that can be connected to the input or output part of a circuit block divided by function is provided, and the signal line connecting the blocks is disconnected according to a predetermined operation mode signal, and the register is connected to the corresponding circuit block. , and also allows signals to be exchanged between this register and a signal bus.

[For production]

According to the above-mentioned means, for each functional circuit block,
Since input signals can be supplied or output signals can be taken in via the signal bus and registers, circuit functions can be checked in a short time.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of a semiconductor integrated circuit device according to the present invention.

Each circuit block surrounded by a broken line in the figure is formed on a single semiconductor substrate such as single crystal silicon, although not particularly limited, by known semiconductor integrated circuit manufacturing techniques.

The semiconductor integrated circuit device of this embodiment is composed of circuit blocks B1 to B8 divided by circuit function in order to facilitate checking of the circuit functions. Although not particularly limited, the output sections of each of the circuit blocks B1 to B8 are provided with registers R1 to R8, respectively, for independently taking out the output signals or setting the output states from the outside. These registers R
1 to R8 take out the output signal or set the output signal by exchanging signals with a signal bus (not shown).

In FIG. 2, a unit circuit of the above-mentioned register is exemplarily shown. For example, a specific output signal Dout of the circuit block B1 is connected to each contact a in the normal operating state.
It is connected to the human input signal Din of the next stage circuit block B2 via switches s1 and 82 connected to the side.

The unit (1 bit) circuit URL of the register R1 is directly read to the output terminal side of the circuit block Bl through the contact side of the switch S1, and is read directly to the input terminal side of the circuit block B2 through the contact side of the switch s2. is combined with Also,
The unit circuit URL is configured to exchange signals with a specific signal line of the signal bus BUS.

For example, when checking the circuit function of circuit block B1, the input terminal of circuit block Bl that receives an input signal from an external terminal is supplied with a test turn signal from that external terminal, and the output signal from other circuit blocks is When a test pattern signal is written to a register provided at the output section of another corresponding circuit block, the test pattern signal is supplied from the register. That is, the register supplies the test bit signal to the input of the circuit block B1 when the switch corresponding to the switch S2 is brought into contact. The output signal or output pattern of the circuit block Bl for such a test pattern signal is connected to the contact S.
By connecting l to the contact side, resistor USR
1. The output cover signal thus taken in is outputted to the outside via the signal bus. As a result, it is possible to supply a test pattern signal and obtain an output signal for each circuit block divided according to one function, so it is possible to perform circuit depacking or failure simulation with a small number of test patterns (test steps). is made possible.

The above switches S1 and S2 are controlled by, for example, PLA
(programmable logic array) and ROM-R
When a circuit function is realized by a so-called microprogram method such as an AM method, it is performed according to the microprogram. That is, in the test mode (circuit depacking, failure simulation), the output format of each circuit block B1 to B8 is selectively changed as described above.

FIG. 3 shows the circuit block Bl and circuit block B2.
A block diagram of a specific embodiment of the invention is shown.

Circuit block B1 is a microprogram ROM. The microprogram R0M of this embodiment is a mask R
It consists of OM (Read Only Memory) and EEFROM (Electrical & Erasable Programmable ROM) which can be written and erased electrically.

This microprogram ROM is written with a program for digital information processing including the Tetos function described above. A register R1 is provided at the output section for checking the contents of this program. The microprogram itself can be output by reading the instruction word according to the program address signal to the signal bus BUS via the register R1. by this,
Since there is no need to indirectly check the quality of the program by executing it, a functional test can be performed in an extremely short time.

The control unit B2 is a control unit that decodes the commands and performs the following commands accordingly, for example.
The gate circuit is opened and closed to control the flow of signals to be processed, thereby executing desired information processing. By using a register R2 (not shown) provided in this circuit block B2, supplying a test pattern signal (fault assumption) that does not exist as the instruction word, and checking the output signal, the conventional fault simulation can be performed. During the run, it is possible to check for the occurrence of unexpected abnormal behavior that cannot be detected. As a result, it is possible to provide an information processing device with high (K In property).

1. EEFROM in the above microprogram ROM
By providing an electrically writable ROM such as ROM, operations using the register R1 can be made available to the user. That is, since the output signal of each circuit prong is independently taken out via the above register, 1. If a certain information processing is possible only with the function of a certain circuit block, it can be done by forming a signal path through the corresponding register as described above and essentially operating only that circuit function. This enables high-speed information processing.

The effects obtained from the above examples are as follows. In other words, (1) By dividing the circuit blocks according to function and providing registers for sending and receiving signals to and from the signal bus in the manual section or output section of each circuit, each circuit block can be
Since the input of the test pattern and the output signal corresponding to the test pattern can be directly taken out, it is possible to perform circuit depacking and failure simulation in a short time.

(2) Since the above +11 enables independent failure simulation for each circuit block, failure simulation can be performed using a combination of test pattern signals that cannot be created under normal operating conditions. This provides the advantage of being able to provide a highly reliable information processing device.

(3> In a microprogram type information processing device, it is possible to electrically write to a part of the ROM where the microprogram is written.) "Programmable RO"
By providing M, functional circuit blocks can be operated independently.

This provides the effect that specific information processing can be performed at high speed.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. For example, a register may be provided on the input side of each circuit block divided by CIt function, or a register may be provided on both the input and output. What is a register?
Any device with a memory function may be used. For example, it may be configured by combining a flip-flop circuit and a gate circuit. Also, the circuit function may be as follows.
In addition to the microprogram method, it may be realized by a so-called random logic circuit.

The present invention can be widely used in semiconductor integrated circuit devices having various digital information processing functions such as a one-chip microcomputer function.

〔Effect of the invention〕

By providing registers that send and receive signals to and from the signal bus in the manual section or output section of circuit blocks divided by function, test pattern input and corresponding output signals can be handled for each circuit block. Since it can be taken out directly, circuit depacking and failure simulation can be performed in a short time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the main part thereof, and FIG. 3 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing one embodiment of the circuit block described above. 81-B8...Circuit block, R1-R8...Register, URI...Unit circuit, si, sz...Switch, BU
S... Signal bus agent Katsuma Ogawa (...)

Claims (1)

[Claims] 1. A register that can be connected to the input or output part of a circuit block divided by function and a signal line connecting each of the circuit blocks are separated according to a predetermined operation mode signal. 1. A semiconductor integrated circuit device comprising: a control circuit for controlling the transmission and reception of signals between the input or output of the circuit block and the register, and the transmission and reception of signals between the register and a bus. 2. The semiconductor integrated circuit according to claim 1, wherein the operation mode signal and the control signal for controlling the control circuit are formed according to a program written in a microprogram ROM. Device. 3. The above-mentioned ROM includes a programmable ROM that can be written electrically, and one of the above-mentioned circuit blocks.
1. The semiconductor integrated circuit device according to claim 1, wherein the semiconductor integrated circuit device includes the ROM.