JPH032988A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPH032988A
JPH032988A JP1138600A JP13860089A JPH032988A JP H032988 A JPH032988 A JP H032988A JP 1138600 A JP1138600 A JP 1138600A JP 13860089 A JP13860089 A JP 13860089A JP H032988 A JPH032988 A JP H032988A
Authority
JP
Japan
Prior art keywords
data bus
terminals
validated
control circuit
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1138600A
Other languages
Japanese (ja)
Inventor
Shinichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1138600A priority Critical patent/JPH032988A/en
Publication of JPH032988A publication Critical patent/JPH032988A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To instantaneously switch an external connecting element and to attain high function control by mounting plural data bus I/O terminals for one internal data bus and a control circuit for selecting one of the data bus I/O terminals so as to validate the selected terminal on the same semiconductor.
CONSTITUTION: Plural data bus I/O terminals 30, 31 are connected to each internal data bus 4 and one of the plural data bus I/O terminals 30, 31 is validated by a data bus control circuit 32 included in the microcomputer. Thus, one of the plural data bus I/O terminals 30, 31 is validated by a signal inputted from the external or a signal generated in the microcomputer and data are transferred between the validated data bus I/O terminal and an externally connected element connected to the terminal. Consequently, the data bus can be switched without arranging a control circuit on the outside.
COPYRIGHT: (C)1991,JPO&Japio
JP1138600A 1989-05-30 1989-05-30 Microcomputer Pending JPH032988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1138600A JPH032988A (en) 1989-05-30 1989-05-30 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1138600A JPH032988A (en) 1989-05-30 1989-05-30 Microcomputer

Publications (1)

Publication Number Publication Date
JPH032988A true JPH032988A (en) 1991-01-09

Family

ID=15225878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1138600A Pending JPH032988A (en) 1989-05-30 1989-05-30 Microcomputer

Country Status (1)

Country Link
JP (1) JPH032988A (en)

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