JPS62216219A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS62216219A JPS62216219A JP5803886A JP5803886A JPS62216219A JP S62216219 A JPS62216219 A JP S62216219A JP 5803886 A JP5803886 A JP 5803886A JP 5803886 A JP5803886 A JP 5803886A JP S62216219 A JPS62216219 A JP S62216219A
- Authority
- JP
- Japan
- Prior art keywords
- sic
- film
- substrate
- deposited
- beta
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 239000004065 semiconductor Substances 0.000 title claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 4
- 238000000151 deposition Methods 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 9
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 13
- 239000013078 crystal Substances 0.000 abstract description 7
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 7
- 229910052681 coesite Inorganic materials 0.000 abstract description 6
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 6
- 239000000377 silicon dioxide Substances 0.000 abstract description 6
- 229910052682 stishovite Inorganic materials 0.000 abstract description 6
- 229910052905 tridymite Inorganic materials 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 2
- 239000007789 gas Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 235000014121 butter Nutrition 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 238000005092 sublimation method Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概要〕
β−3iC(3C−StC)を、5i02をマスクとし
てSt上に選択的に成長させる。DETAILED DESCRIPTION OF THE INVENTION [Summary] β-3iC (3C-StC) is selectively grown on St using 5i02 as a mask.
本発明は半導体装置の製造方法、さらに詳しく言えば、
β−Si’Cの選択成長の方法に関するものである。The present invention relates to a method for manufacturing a semiconductor device, more specifically,
The present invention relates to a method for selective growth of β-Si'C.
SiCは融点が2800℃の安定した構造のもので、エ
ネルギーバンドギャップがSlの1.1 eVに比べ2
.2eVもあるので、SiCをエミッタとして使用し、
ワイド・ギャップ・エミッタ・バイポーラトランジスタ
(超高速へテロ接合バイポーラトランジスタ、H〜BT
)を作る技術が注目されている。SiC has a stable structure with a melting point of 2800°C and an energy band gap of 2 eV compared to 1.1 eV for Sl.
.. Since it is also 2eV, use SiC as an emitter,
Wide gap emitter bipolar transistor (ultra high speed heterojunction bipolar transistor, H~BT
) is attracting attention.
St基板上にSfCを成長するには、常圧化学気相成長
(CVD )法、スパッタによる方法、昇華法などがあ
る。To grow SfC on a St substrate, there are methods such as atmospheric pressure chemical vapor deposition (CVD), sputtering, and sublimation.
常圧CVD法によるSiCの成長には1390℃の高温
を必要とし、Stを用いる半導体装置の製造プロセスに
は通しない。スパッタによる場合には成長したSiC膜
の結晶性が良くないことが認められた。Growth of SiC by atmospheric pressure CVD requires a high temperature of 1390° C., and cannot be used in the manufacturing process of semiconductor devices using St. In the case of sputtering, it was found that the crystallinity of the grown SiC film was not good.
昇華法は高温でカーボンソースを気相ガスにしてSi基
板に付けるのであるが、大面積のSiC膜が作られない
問題がある。In the sublimation method, a carbon source is turned into a vapor phase gas at high temperature and attached to a Si substrate, but there is a problem in that a SiC film with a large area cannot be formed.
また、いずれの方法においても格子定数の不整合、熱膨
張係数および熱伝導率の違いのために結晶性の良いSi
C膜が堆積されず剥離しやすい問題がある。In addition, in both methods, Si with good crystallinity is
There is a problem that the C film is not deposited and easily peels off.
本発明はこのような点に鑑みてなされたもので、Sac
の単結晶を選択的に堆積(deposit )する方法
を提供することを目的とする。The present invention has been made in view of the above points, and is based on the Sac
The object of the present invention is to provide a method for selectively depositing single crystals of.
第1図は本発明の実施例で、図中、11は単結晶のシリ
コン基板、12はSiO+膜、13はSiC膜である。FIG. 1 shows an embodiment of the present invention, in which 11 is a single crystal silicon substrate, 12 is a SiO+ film, and 13 is a SiC film.
本発明においては、シリコン基板上に形成したSiO2
膜12膜間2−ニングした後に、減圧CVD法により、
3Si)Iri3 + C3Fly + H2ガスを流
速(linevelocity) 400cm / s
ecに設定することによって3SiHCI!3 + C
,Hy+ H2→3SiC+ 9HCj! + H2な
る反応をさせ、SiCを選択的にSi基板上に成長する
。In the present invention, SiO2 formed on a silicon substrate
After coating the 12 membranes, by low pressure CVD method,
3Si) Iri3 + C3Fly + H2 gas flow velocity (linevelocity) 400cm/s
3SiHCI by setting ec! 3 + C
, Hy+ H2→3SiC+ 9HCj! +H2 reaction to selectively grow SiC on the Si substrate.
上記の方法において、SiO2膜の上にも多結晶(po
lychrystalline)的なSiCが成長する
が、それは結合エネルギーが弱いためHCI!によって
エツチングされ、SiCが付き易いSt基板の上には単
結晶SiCが成長し、それはHαによってエツチングさ
れることなく堆積するので、 5i02膜12によって
限定される領域に単結晶のβ−3iCが成長する。In the above method, polycrystalline (po
lychrystalline)-like SiC grows, but because of its weak binding energy, HCI! Single-crystal SiC grows on the St substrate that is etched by Hα and is easily attached to SiC, and since it is deposited without being etched by Hα, single-crystal β-3iC grows in the area limited by the 5i02 film 12. do.
以下、図面を参照して本発明の実施例を詳細に説明する
。Embodiments of the present invention will be described in detail below with reference to the drawings.
再び第1図に戻ると、単結晶のシリコン基板11(以下
単に基板という)上に通常の技術で5i02を成膜し、
それをバターニングして5iOz ff12を作る。Returning to FIG. 1 again, a film of 5i02 is formed on a single-crystal silicon substrate 11 (hereinafter simply referred to as a substrate) using a conventional technique.
Butter it to make 5iOz ff12.
次イテ、減圧CVD法によッテβ−3iC(3C−Si
C)を選択的に成長させるが、反応ガス(3SiHCe
3 +C3Hr+ 82 )を流速400cm/ s
ee、に設定し、3SiH(J! 3 + C3Hy→
3SiC+ 98α+H2の反応を起させる。Next, β-3iC (3C-Si) was
C) is selectively grown, but the reaction gas (3SiHCe
3 +C3Hr+ 82) at a flow rate of 400cm/s
ee, and 3SiH (J! 3 + C3Hy→
A reaction of 3SiC+ 98α+H2 is caused.
上記の反応で、基板の上にSfCが成長するが、5I0
2膜12の上には第1図(a)に丸印を付した単結晶で
ない多結晶型のSiCが成長する。その理由は、基板の
上では化学量論的にStとSiCとは1:1の状態にあ
り、そこにStCは堆積しやすいが、5i02膜12の
上では5iOzとSiCとが1=1の状態にないため単
結晶SiCが成長し難く、多結晶型のSiCが堆積され
る。このような多結晶型のSiCは結合エネルギーが弱
いため、HCJ?によってエツチングされ、前記した反
応を続けると、第1図(′b)に示される如く、SiO
2膜12膜間2基板11上に選択的に単結晶のβ−Si
Cが堆積する。In the above reaction, SfC grows on the substrate, but 5I0
Polycrystalline SiC, which is not a single crystal, is grown on the two-layer film 12, which is marked with a circle in FIG. 1(a). The reason for this is that on the substrate, St and SiC are in a 1:1 stoichiometric state, and StC is easy to deposit there, but on the 5iO2 film 12, 5iOz and SiC are in a 1:1 ratio. Since there is no such state, single crystal SiC is difficult to grow, and polycrystalline SiC is deposited. Since such polycrystalline SiC has weak binding energy, HCJ? By continuing the above-mentioned reaction, SiO
Single crystal β-Si is selectively deposited on the two substrates 11 between the two films 12.
C is deposited.
しかも、SiCはSiO2膜パターン12の間にのみ平
坦に堆積されるので平坦化が可能となり、第1図(bl
に示す構造を積層した多層構造の作成も可能となる。Moreover, since SiC is deposited flatly only between the SiO2 film patterns 12, flattening is possible.
It is also possible to create a multilayer structure in which the structures shown in the figure are laminated.
本発明の応用例は第2図に示され、基板11にコレクタ
12となるn+型の埋込層を作り、n型のエピタキシャ
ル層15を成長し、その上にベース16となるp型エピ
タキシャル層を成長し、しかる後に前記した方法で5i
02膜12を形成し、β−SiC膜13を成長する。An application example of the present invention is shown in FIG. 2, in which an n+ type buried layer which becomes a collector 12 is formed on a substrate 11, an n type epitaxial layer 15 is grown, and a p type epitaxial layer which becomes a base 16 is grown on it. and then grow 5i using the method described above.
02 film 12 is formed, and β-SiC film 13 is grown.
β−SiC膜13をエミッタ23にするため、それは通
常の気相ドーピングまたはイオン注入法によってn+型
にし、その上に電極用のポリシリコン膜17を形成する
と、高速で作動するHOTが作られる。In order to make the β-SiC film 13 an emitter 23, it is made into n+ type by normal vapor phase doping or ion implantation, and a polysilicon film 17 for an electrode is formed thereon, thereby creating a HOT that operates at high speed.
StCはSiO2膜12膜間2平坦に堆積されるので、
第2図に示す構造は積層が可能で、多層構造においても
段差の問題は発生しない。Since StC is deposited flatly between 12 SiO2 films,
The structure shown in FIG. 2 can be stacked, and even in a multilayer structure, the problem of level differences does not occur.
β−30膜の成長には第3図に示す装置を用い、同図に
おいて、31は石英二重管、32は8 KHzの誘導加
熱用コイル、33は黒鉛サセプタ、34はマス・フロー
・コントローラ(NFC) 、35は気化コントローラ
である。かかる装置を用い、(SiH(J! 3 +)
12 +C,H,)系のガスを二重構造管31の内管に
供給し、サセプタ33を加熱してシリコン基板の温度を
上げ、β−SiC膜を基板上に成長させた。The apparatus shown in Figure 3 was used to grow the β-30 film, in which 31 is a quartz double tube, 32 is an 8 KHz induction heating coil, 33 is a graphite susceptor, and 34 is a mass flow controller. (NFC), 35 is a vaporization controller. Using such an apparatus, (SiH(J! 3 +)
12 +C, H,) system gas was supplied to the inner tube of the double-structured tube 31, the susceptor 33 was heated to raise the temperature of the silicon substrate, and a β-SiC film was grown on the substrate.
以上述べてきたように本発明によれば、SiCの堆積が
平坦になされ多層に積層したとき段差の問題が発生せず
、SiCをエミッタとして利用することにより超高速へ
テロ接合バイポーラトランジスタの製造などに応用可能
である。As described above, according to the present invention, SiC is deposited flatly, so that no step problem occurs when stacked in multiple layers, and by using SiC as an emitter, ultra-high speed heterojunction bipolar transistors can be manufactured. It is applicable to
第1図+a)と(1))は本発明実施例断面図、第2図
は本発明応用例断面図、
第3図はSiCIl!成長装置の断面図である。
第1図と第2図において、
11はシリコン基板、
12は SiO2膜、
13はSiC膜、
14はコレクタ、
15はn型エピタキシャル層、
16はベース、
17はポリシリコン膜、
23はエミッタである。
本発θ8焚光例碑釦閃
第1図
本発明た困例釘ω閃
第2図Figures 1+a) and (1)) are cross-sectional views of embodiments of the present invention, Figure 2 is cross-sectional views of applied examples of the present invention, and Figure 3 is SiCIl! FIG. 2 is a cross-sectional view of the growth apparatus. 1 and 2, 11 is a silicon substrate, 12 is a SiO2 film, 13 is a SiC film, 14 is a collector, 15 is an n-type epitaxial layer, 16 is a base, 17 is a polysilicon film, and 23 is an emitter. . Example of the θ8 firing of this invention Figure 1 of the button flash Figure 2 of the difficult example of the invention of the nail ω flash Figure 2
Claims (1)
パターン(12)を形成し、 減圧化学気相成長法にて 3SiHCl_3+C_3H_8→3SiC+9HCl
+H_2なる反応を発生させ、前記SiO_2膜パター
ン(12)の間の前記基板上のみにβ−SiC(13)
を堆積することを特徴とする半導体装置の製造方法。[Claims] A SiO_2 film pattern (12) is selectively formed on a single crystal silicon substrate (11), and 3SiHCl_3+C_3H_8→3SiC+9HCl is formed by low pressure chemical vapor deposition.
A reaction of +H_2 is generated, and β-SiC (13) is formed only on the substrate between the SiO_2 film patterns (12).
1. A method for manufacturing a semiconductor device, comprising depositing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5803886A JPS62216219A (en) | 1986-03-18 | 1986-03-18 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5803886A JPS62216219A (en) | 1986-03-18 | 1986-03-18 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62216219A true JPS62216219A (en) | 1987-09-22 |
Family
ID=13072761
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5803886A Pending JPS62216219A (en) | 1986-03-18 | 1986-03-18 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62216219A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5341000A (en) * | 1991-09-18 | 1994-08-23 | Rohm Co., Ltd. | Thin silicon carbide layer on an insulating layer |
-
1986
- 1986-03-18 JP JP5803886A patent/JPS62216219A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5341000A (en) * | 1991-09-18 | 1994-08-23 | Rohm Co., Ltd. | Thin silicon carbide layer on an insulating layer |
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