JPS62216217A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS62216217A JPS62216217A JP5803686A JP5803686A JPS62216217A JP S62216217 A JPS62216217 A JP S62216217A JP 5803686 A JP5803686 A JP 5803686A JP 5803686 A JP5803686 A JP 5803686A JP S62216217 A JPS62216217 A JP S62216217A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon
- single crystal
- sic
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 20
- 239000010703 silicon Substances 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims description 11
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 3
- VEDJZFSRVVQBIL-UHFFFAOYSA-N trisilane Chemical compound [SiH3][SiH2][SiH3] VEDJZFSRVVQBIL-UHFFFAOYSA-N 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 19
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract description 18
- 239000013078 crystal Substances 0.000 abstract description 10
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 239000012212 insulator Substances 0.000 abstract description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 6
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 9
- 238000005224 laser annealing Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002003 electron diffraction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 230000008016 vaporization Effects 0.000 description 2
- 238000009834 vaporization Methods 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 238000000862 absorption spectrum Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 238000002128 reflection high energy electron diffraction Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概要〕
シリコン・オン・インシュレータ（Ｓｉｌｉｃｏｎ ０
ｎＩｎｓｕｌａｔｅｒ＋ ５（ＩＩ）の形成において、
絶縁物の上に３Ｃ−ＳｉＣを成長しその上にシリコンを
エピタキシャル成長する。[Detailed description of the invention] [Summary] Silicon on insulator (Silicon 0
In the formation of nInsulator+ 5(II),
3C-SiC is grown on the insulator, and silicon is epitaxially grown on it.
本発明は半導体装置の製造方法に関するもので、さらに
詳しく言えば、従来のＳｏｌ形成においてレーザアニー
ルを用いて再結晶化したのに代えて、シリコン基板上の
絶縁物（ＳｉＯ＋膜またはシリコン窒化膜（Ｓｉ３Ｎ１
膜）上に単結晶３Ｃ−ＳｉＣ（β−３ｉＣ）を成長し、
この３Ｃ−３ｉＣの上にシリコンをエピタキシャル成長
する方法に関するものである。The present invention relates to a method for manufacturing a semiconductor device, and more specifically, in place of recrystallization using laser annealing in conventional Sol formation, an insulator (SiO+ film or silicon nitride film) on a silicon substrate is used. Si3N1
Single crystal 3C-SiC (β-3iC) is grown on the
The present invention relates to a method of epitaxially growing silicon on this 3C-3iC.
従来の５０１形成方法は第４図の断面図に示される。先
ず同図（ａ）に示される如くシリコン基板３１上に５ｉ
０２膜３２を形成しその上に例えば化学気相成長（ＣＶ
Ｄ）法でポリシリコンｙＩ３３を成長し、ポリシリコン
膜３３にレーザビームを照射しくレーザアニール）、ポ
リシリコンをメルト（溶融）シ、再結晶化してポリシリ
コン膜３３内に単結晶シリコン領域３５を作り、この単
結晶シリコン領域３５に所望の素子を形成する。A conventional method of forming 501 is shown in the cross-sectional view of FIG. First, as shown in FIG.
02 film 32 is formed, and on it, for example, chemical vapor deposition (CVV) is performed.
D) Grow polysilicon yI 33 by the method, irradiate the polysilicon film 33 with a laser beam (laser annealing), melt the polysilicon, and recrystallize it to form a single crystal silicon region 35 in the polysilicon film 33. A desired element is formed in this single crystal silicon region 35.
上記した方法では、ポリシリコン／単結晶シリコン／ポ
リシリコンと横に素子分離される構造が得られるが、第
４図（ｂ）に示す構造を縦方向に形成することが、半導
体装置の集積度を高め、かつ、耐環境性の改良すなわち
放射線対策の見地から検討されている。そのためには、
第４図中）に示したポリシリコン膜３３の上に再度Ｓｉ
Ｏ２を堆積し、その上にポリシリコンを成長して前記し
たレーザアニールを実施し、２層、３層３０．と多層構
造にすることによって、たて方向の集積度および耐環境
に優れたデバイスを作ることが可能になるからである。In the above method, a structure in which elements are separated horizontally (polysilicon/single crystal silicon/polysilicon) can be obtained, but forming the structure shown in FIG. It is being considered from the viewpoint of increasing the environmental resistance and improving environmental resistance, that is, radiation countermeasures. for that purpose,
4) on the polysilicon film 33 shown in FIG.
O2 is deposited, polysilicon is grown thereon, and the laser annealing described above is performed to form two-layer, three-layer 30. This is because by forming a multilayer structure, it is possible to create a device with excellent vertical integration and environmental resistance.
従来の方法によると、■レーザアニールによると、スポ
ットの小なるレーザビームが照射されたところしか再結
晶化しないのでスループットが悪く、■形成される素子
の形状、寸法に制限が加えられ、■５ｉＯ２ｐの上のポ
リシリコンを再結晶化するとき作られる単結晶シリコン
の配向性ができ上がってみなければ判らず、■何層にも
ポリシリコンを積んでそれを再結晶化するとき、各層の
平坦度が次第に失われ、単結晶シリコン領域の大きさが
ピラミッド型に上に行くにつれて小になり、２層ないし
３層構造が限界である、などの問題がある。According to the conventional methods, ■Laser annealing recrystallizes only the area irradiated with a small laser beam, resulting in poor throughput; ■Limitations are placed on the shape and dimensions of the formed device; ■5iO2p The orientation of the single crystal silicon created when recrystallizing the polysilicon on top of the silicon cannot be determined until it is completed. There are problems such as the size of the single-crystal silicon region becoming smaller as it goes up in the pyramid shape, and a two-layer or three-layer structure being the limit.
本発明はこのような点に鑑みてなされたもので、上記の
問題点を解決したｓｏｉ形成の方法を提供することを目
的とする。The present invention has been made in view of these points, and an object of the present invention is to provide a method for forming an SOI that solves the above-mentioned problems.
第１図は本発明実施例の断面図である。 FIG. 1 is a sectional view of an embodiment of the present invention.
本発明においては、シリコン基板１１上に絶縁膜１２
（５ｒ０２膜またはシリコン窒化膜）を形成し、その上
に単結晶３Ｃ−３ｉＣ膜１３を成長し、この３Ｃ−３ｉ
Ｃの上にシリコンをエピタキシャル成長して単結晶シリ
コン膜１４を形成する。In the present invention, an insulating film 12 is provided on a silicon substrate 11.
(5r02 film or silicon nitride film), a single crystal 3C-3iC film 13 is grown on it, and this 3C-3iC film 13 is grown on top of it.
Silicon is epitaxially grown on C to form a single crystal silicon film 14.
本出願人は減圧ＣＶＯ法により ３Ｃ−ＳｉＣＩ！ｌ！
を形成する技術を開発したもので、本発明においてはそ
の技術を利用し、絶縁物の上に１つの配向性だけをもっ
た単結晶にきわめて近い構造的に安定した３Ｃ−ＳｉＣ
膜を形成するものであり、この３Ｃ−ＳｉＣ膜上にそれ
と同じ配向性をもった単結晶シリコン膜がエピタキシャ
ル成長するのである。The applicant has developed 3C-SiCI! using the reduced pressure CVO method. l!
The present invention utilizes this technology to form 3C-SiC, which is structurally stable and very similar to a single crystal with only one orientation, on an insulator.
A single crystal silicon film having the same orientation is epitaxially grown on this 3C-SiC film.
以下、図面を参照して本発明の実施例を詳細に説明する
。Embodiments of the present invention will be described in detail below with reference to the drawings.
従来、Ｓｒ基板上へ単結晶３Ｃ−ＳｉＣ（β−ＳｉＣ）
を成長させる場合、大きな格子定数の差を緩和させるた
めに炭化層をあらかじめ基板上に作製するのが一般的で
あった。本出願人は、炭化層を用いないで単結晶３Ｃ−
ＳｉＣを成長させることを試みた。Conventionally, single crystal 3C-SiC (β-SiC) was deposited on an Sr substrate.
When growing , it is common to prepare a carbonized layer on the substrate in advance in order to alleviate the large difference in lattice constant. The applicant has proposed a single crystal 3C-
An attempt was made to grow SiC.
Ｓｔ基板ウェハーには、Ｐ形、４インチ（１００）正基
板と、（１１１）４°−ｏｆｆの２種類の基板を用いた
。成長には誘導加熱型リアクターを用い、基板はＳｉＣ
コートのグラファイトサセプター上に置いた。成長は、
５ｉｌｏ！ ３− Ｃ３Ｈｙ −Ｈ２系を選び、基板温
度； １０００℃、成長圧力ｉ ２００ Ｐａで行った
。Two types of substrates were used as the St substrate wafer: a P type, 4 inch (100) positive substrate and a (111) 4°-off substrate. An induction heating reactor is used for growth, and the substrate is SiC.
The coat was placed on a graphite susceptor. The growth is
5ilo! 3-C3Hy-H2 system was selected, and the growth was performed at a substrate temperature of 1000°C and a growth pressure of i200 Pa.
両基板上に成長させたＳｉＣ膜の赤外吸収スペクトルに
は、波数８００ｃｍ−１のところに急峻で大きなピーク
が観測された。このことからＳｔ −Ｃ結合が形成され
ていることがわかった。Ｘ線回折の解析では、（１１１
）４°−ｏｆｆ基板上では、３Ｃ−ＳｉＣ（１１１）の
ピークのみ観測されたのに対し、（１００）正基板上で
は、（１００）ピークの他に、（１１１）のピークも観
測された。また、（１１１）４°−ｏｆｆ基板上の成長
層（３Ｃ−３ｉＣ膜）の居射電子線回折像にストリーク
状のスポットが観測された。このことから成長させたＳ
ｉＣＩｌｌが、表面にわずかに凹凸のある単結晶膜であ
ることが確認された。A steep and large peak was observed at a wave number of 800 cm −1 in the infrared absorption spectra of the SiC films grown on both substrates. This revealed that St--C bonds were formed. In the analysis of X-ray diffraction, (111
) On the 4°-off substrate, only the 3C-SiC (111) peak was observed, whereas on the (100) positive substrate, in addition to the (100) peak, the (111) peak was also observed. . In addition, streak-like spots were observed in the radiation electron diffraction image of the growth layer (3C-3iC film) on the (111) 4°-off substrate. S that grew from this
It was confirmed that iCIll was a single crystal film with a slightly uneven surface.
また、成長させたＳｆＣｙ４には、熱膨張係数等の違い
による剥離はみられなかった。これらの結果により、上
記の成長条件下では、単結晶３Ｃ−３ｉＣは（１１１）
４°−ｏｆｆ基板上には成長したことがわかった。Furthermore, no peeling due to differences in thermal expansion coefficients, etc., was observed in the grown SfCy4. According to these results, under the above growth conditions, single crystal 3C-3iC has (111)
It was found that growth occurred on the 4°-off substrate.
再び、第１図を参照すると、半導体基板例えばシリコン
基板１１上に通常の技術で（５４０２膜＋窒化シリコン
膜） １２ （５ｉ０２１１９！１０００人、窒化シリ
コン（Ｓｉ３Ｎ鴫）膜４０００人）を形成する。Referring again to FIG. 1, (5402 film + silicon nitride film) 12 (5i02119!1000 layers, silicon nitride (Si3N) film 4000 layers) is formed on a semiconductor substrate, for example, a silicon substrate 11, by a conventional technique.
次イテ、前記した減圧ＣＶＤ法で、１０００℃、２００
Ｐａ（７）雰囲気’？ｌ’ ５ｊＨＣｅ３＋ Ｏ２＋
Ｃ３Ｈｔ系のガスを用いて、３Ｃ−ＳｉＣ膜１３を作っ
たところ、反射電子線回折法（ＲＨＥＥＤ ）によって
一つの配向性をもち、はとんど単結晶といいうる３Ｃ−
３ｉＣ膜１３を作ることができた。Next, by the low pressure CVD method described above,
Pa(7) Atmosphere'? l' 5jHCe3+ O2+
When a 3C-SiC film 13 was made using a C3Ht-based gas, it was determined by reflection electron diffraction (RHEED) that it had one orientation and was almost a single crystal.
A 3iC film 13 could be produced.
次いで、ＳｉＬ＋ （または５ｉｘ）ｂ； ） ＋
Ｏ２系のガスを用い８００℃〜９００℃の温度で減圧Ｃ
ＶＤ法でシリコンのエピタキシャル成長を行ったところ
、表面がほとんど鏡面の単結晶シリコン膜１４が作られ
た。その結果、単結晶シリコン膜１４の上に再度絶縁膜
１２を形成し、３Ｃ−３ｉＣを成長し、シリコンをエピ
タキシャル成長する工程を繰り返し行うことが可能にな
った。Then SiL+ (or 5ix)b; ) +
Reduced pressure C using O2-based gas at a temperature of 800°C to 900°C
When silicon was epitaxially grown using the VD method, a single-crystal silicon film 14 whose surface was almost mirror-finished was formed. As a result, it has become possible to repeat the steps of forming the insulating film 12 again on the single crystal silicon film 14, growing 3C-3iC, and epitaxially growing silicon.
３Ｃ−３ｉＣ膜１３の成長には第２図に示す装置を用い
、同図において、２１は石英二重管、２２は８ ＫＨｚ
の誘導加熱用のコイル、２３は黒鉛サセプタ、２４はマ
ス・フロー・コントローラ（ＮＦＣ） 、２５は気化コ
ントローラである。かかる装置を用い、（５ｉ）ｌｃｉ
！ ３＋ Ｏ２＋ＣｙＨ＋＋）系のガスを二重構造管２
１の内管に供給し、サセプタ２３を加熱してシリコン基
板１１の温度を上げ、３Ｃ−ＳｉＣを基板１１上に成長
した。The 3C-3iC film 13 was grown using the apparatus shown in Figure 2, in which 21 is a quartz double tube, 22 is 8 KHz
23 is a graphite susceptor, 24 is a mass flow controller (NFC), and 25 is a vaporization controller. Using such an apparatus, (5i)lci
! 3+ O2+CyH++) system gas into double structure tube 2
1, the susceptor 23 was heated to raise the temperature of the silicon substrate 11, and 3C-SiC was grown on the substrate 11.
ｐ型シリコン基板上に上記の方法でｎ−ＳｉＣを形成し
、ｎ−３ｉＣ／ ｐ−３ｔヘテロジヤンクシツンの電流
電圧特性を調査した結果は第３図の線図に示され、この
結果から前記した３Ｃ−ＳｔＣは１５０■までの高出力
トランジスタに利用可能であることが判明した。N-SiC was formed on a p-type silicon substrate by the above method, and the current-voltage characteristics of the n-3iC/p-3t heterogeneous silicon were investigated. The results are shown in the diagram of FIG. It has been found that the 3C-StC can be used for high power transistors up to 150μ.
以上述べてきたように本発明によれば、■大面積の単結
晶シリコンが得られ、
■単結晶シリコンに形成される素子を形状、寸法を制限
することなく設計でき、
■配向性が制御でき、
■量産化が可能であり、
■何層でも積層することができる、
効果がある。As described above, according to the present invention, 1) large-area single-crystal silicon can be obtained, 2) elements formed in single-crystal silicon can be designed without restrictions on shape and dimensions, and 2) orientation can be controlled. , ■ Mass production is possible, and ■ Any number of layers can be stacked, which is effective.
第１図は本発明実施例断面図、
第２図は３Ｃ−ＳｉＣ膜成長装置の断面図、第３図はｎ
−ＳｉＣ／ ｐ−Ｓ！ヘテロジャンクションの電流電圧
特性を示す線図、
第４図（ａｌと（ト））は従来例断面図である。
第１図と第２図において、
１１はシリコン基板、
１２は（ＳｉＯ２膜＋５ｉｚＮり膜）、１３は３Ｇ−１
ｉｃｌ！ｊｌ。
１４は単結晶シリコン膜、
２１は石英二重管、
２２はコイル、
２３はサセプタ、
２４はマス・フロー・コントローラ、
２５は気化コントローラである。
代理人 弁理士 久木元 彰
復代理人 弁理士 大 菅 義 之
本発明実施例断面図
第１図Fig. 1 is a sectional view of an embodiment of the present invention, Fig. 2 is a sectional view of a 3C-SiC film growth apparatus, and Fig. 3 is a sectional view of an embodiment of the present invention.
-SiC/p-S! A diagram showing current-voltage characteristics of a heterojunction, FIG. 4 (al) and (g) are cross-sectional views of a conventional example. In Figures 1 and 2, 11 is a silicon substrate, 12 is (SiO2 film + 5izN film), and 13 is 3G-1.
icl! jl. 14 is a single crystal silicon film, 21 is a quartz double tube, 22 is a coil, 23 is a susceptor, 24 is a mass flow controller, and 25 is a vaporization controller. Agent: Patent Attorney: Hajime Kuki Agent: Yoshiyoshi Osuga, Patent Attorney: Cross-sectional view of an embodiment of the present invention Figure 1
Claims (1)
、 絶縁膜（１２）上にＳｉＨＣｌ＿３＋Ｈ＿２＋Ｃ＿３Ｈ
＿５系のガスを用いる減圧化学気相成長法により３Ｃ−
ＳｉＣ膜（１３）を成長する工程、および ３Ｃ−ＳｉＣ膜（１３）上にＳｉＨ＿４（またはＳｉ＿
２Ｈ＿６もしくはＳｉ＿３Ｈ＿８（トリシラン）＋Ｈ＿
２）系のガスを用いる減圧化学気相成長法によりシリコ
ンをエピタキシャル成長する工程を含むことを特徴とす
る半導体装置の製造方法。[Claims] Step of forming an insulating film (12) on a semiconductor substrate (11), SiHCl_3+H_2+C_3H on the insulating film (12)
_3C- by low pressure chemical vapor deposition using 5-based gas
Step of growing SiC film (13) and growing SiH_4 (or Si_4) on 3C-SiC film (13)
2H_6 or Si_3H_8 (trisilane) +H_
2) A method for manufacturing a semiconductor device, comprising the step of epitaxially growing silicon by a low pressure chemical vapor deposition method using a system gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61058036A JPH0746685B2 (en) | 1986-03-18 | 1986-03-18 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61058036A JPH0746685B2 (en) | 1986-03-18 | 1986-03-18 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62216217A true JPS62216217A (en) | 1987-09-22 |
| JPH0746685B2 JPH0746685B2 (en) | 1995-05-17 |
Family
ID=13072705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61058036A Expired - Fee Related JPH0746685B2 (en) | 1986-03-18 | 1986-03-18 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0746685B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999009585A1 (en) * | 1997-08-13 | 1999-02-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor substrate and semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5041471A (en) * | 1971-11-04 | 1975-04-15 | ||
| JPS533075A (en) * | 1976-06-29 | 1978-01-12 | Mitsubishi Electric Corp | Production of mos structure field effect semiconductor device |
-
1986
- 1986-03-18 JP JP61058036A patent/JPH0746685B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5041471A (en) * | 1971-11-04 | 1975-04-15 | ||
| JPS533075A (en) * | 1976-06-29 | 1978-01-12 | Mitsubishi Electric Corp | Production of mos structure field effect semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999009585A1 (en) * | 1997-08-13 | 1999-02-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor substrate and semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0746685B2 (en) | 1995-05-17 |
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