JPS62212723A - Access system for general-purpose register - Google Patents

Abstract

PURPOSE:To increase the arithmetic speed ad to attain the data processing with high performance by connecting the general-purpose registers set in plural general-purpose register files to each input of an arithmetic circuit independently with each other and giving the value of each register to the arithmetic circuit at a time as the input data. CONSTITUTION:The value of both general-purpose registers Ra2 and Rb3 are supplied to an arithmetic circuit 6 for execution of an operation. The result of this operation is stored in the register Ra2. In this case, the register Ra2 set in a general-purpose register file A10 is read out to a register A4 and at the same time the register Rb3 in a general-purpose register file B11 is read out to a register B5 in the 1st clock cycle. In the 2nd clock cycle the data stored in both registers A4 and B5 are supplied to the circuit 6 for execution of a desired operation. Then the result of this operation is stored in both registers Ra2 and Rb3 in the files 10A and 11B respectively via an internal bus 7.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for accessing general-purpose registers in a data processing device having a plurality of general-purpose registers.

[Conventional technology]

FIG. 2 is a block diagram showing a conventional general-purpose register access method. FIG. 2 shows a method of accessing general-purpose registers in a conventional data processing device. In the figure, 1 is a general-purpose register file consisting of general-purpose registers RO to Rn, 2 is a general-purpose register Ra in general-purpose register file l, 3 is general-purpose register Rh in general-purpose register file l, and 4 is a general-purpose register file. Registers that store data read from file 1, 5 are general-purpose registers, register B stores data read from file 1, 6 is register A4 and register B5.
7 is an internal bus for transferring the result of the calculation by the calculation circuit 6 to the general-purpose register file 1.

FIG. 3 is a time chart showing an access operation to a general-purpose register in the general-purpose register access method of FIG.

Next, the operation of the conventional general-purpose register access method shown in FIG. 2 will be explained. Now, each general-purpose register Ra2 and general-purpose register Rb in general-purpose register file 1
A case will be described in which a value of 3 is input to the arithmetic circuit 6, arithmetic is performed, and the result is stored in the general-purpose register Ra2. As shown in FIG. 3, the value of general-purpose register Ra2 is read into register A4 in the first clock cycle, and the value of general-purpose register Rb3 is read into register B5 in the second clock cycle. Then, in the third clock cycle, the values of each register A4 and register B5 are input to the arithmetic circuit 6 to perform a desired operation, and the results are transferred to the general-purpose register file 1 via the internal bus 7, and are transferred to the general-purpose register Ra2. Store in.

[Discrimination that the invention attempts to solve]

In the conventional general-purpose register access method as described above,
Arithmetic operations in the data processing device are performed as described above, and since it is not possible to read out to multiple registers at the same time, for example, each register A4 and register B5, at least two are required to prepare input data to the arithmetic circuit 6. In an arithmetic circuit 6 that requires more clock cycles and requires two or more pieces of input data, the number of clock cycles equal to the number of input data is required, which significantly reduces the calculation speed. However, there are further problems in that the performance of the data processing device as a whole deteriorates.

The present invention has been made to solve these problems, and aims to provide a general-purpose register access method that can perform desired operations at high speed and realize a data processing device 8 with high performance.

[Means for solving problems]

The general-purpose register access method according to the present invention provides a general-purpose register file that includes a plurality of general-purpose registers as many times as the number of inputs required by an arithmetic circuit that simultaneously provides the values of a plurality of general-purpose registers as input data. It is designed to have the following.

[Effect]

In the general-purpose register access method of the present invention, by providing a plurality of general-purpose register files including a plurality of general-purpose registers, even when an arithmetic circuit requires multiple input data, the input data necessary for the operation can be Clock cycles for preparing data can be minimized and the performance of the data processing device can be improved.

〔Example〕

FIG. 1 is a block diagram showing a general-purpose register access method according to an embodiment of the present invention.

In the figure, 10 is a general-purpose register file A that includes general-purpose registers Ro to Rn, and 11 is a general-purpose register file A.
2 is general register Ra, 3 is general register Rb, 4 is register A, which stores data from general register file AIO, and 5 is register file B, which stores data from general register file Bll. The storage register B, 6 is an arithmetic circuit, and 7 is an internal bus.

Note that in this embodiment, all data in In from each general-purpose register RO in each general-purpose register file AIO and general-purpose register file Bll is the same.

Next, the operation of the general-purpose register access method, which is an embodiment of the present invention shown in FIG. 1, will be explained. now,
A case will be described in which the values of each general-purpose register Ra2 and general-purpose register Rb3 are input to the arithmetic circuit 6, arithmetic operations are performed, and the results are stored in the general-purpose register Ra2. First, in the first clock cycle, the general register file AI
Read general-purpose register Ra2 in O to register A4.

At the same time, general-purpose register Rb3 in general-purpose register file Bll is read into register B5. Second clock
In the cycle, data in register A4 and data in register B5 are input to arithmetic circuit 6, and a desired arithmetic operation is performed. Further, the result of the operation is stored in each general-purpose register Ra2 in the general-purpose register file AIO and general-purpose register file Bll through the internal bus 7.

As described above, in the embodiment of the present invention, a desired operation is executed using two clock cycles.

Note that in the above embodiment, each general-purpose register file AI
Although an example has been described in which two sets of general-purpose register files Bll and O are used, it is also possible to provide two or more sets of general-purpose register files depending on the number of input data required by the arithmetic circuit 6.

In addition, in the above embodiment, each general-purpose register file AI
Although we used the contents of AIO and general-purpose register file Bll as exactly the same, since the addresses to each general-purpose register file can be specified independently, each general-purpose register file AIO and general-purpose register file Bll have exactly the same contents. It is also possible to use a general-purpose register in a general-purpose register file as a separate register.
It can also be used as a work register for temporarily storing data.

Furthermore, in the above embodiment, if the access time to each general-purpose register file A10 and general-purpose register file Bll, the calculation time of the calculation circuit 6, etc. are extremely fast compared to the period of one clock cycle, Delete each register A4 and register B5 to create one clock
Calculations can also be performed in cycles, making it possible to reduce the amount of hardware and speed up data processing.

〔Effect of the invention〕

As explained above, in the general-purpose register access method, this invention is designed to provide a general-purpose register file containing a plurality of general-purpose registers, so that only the human power required by the arithmetic circuit is provided. It can also perform data processing at speed! This provides excellent effects such as significantly improving the performance of the entire device.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a general-purpose register access method according to an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional general-purpose register access method, and FIG. 5 is a time chart showing an access operation to a general-purpose register in the general-purpose register access method. In the figure, 1... general-purpose register file, 2...
・General-purpose register Ra, 3...General-purpose register Bb, 4・
...Register A, 5...Register B, 6...Arithmetic circuit, 7...Internal bus, 10...General-purpose register file A, 11...General-purpose register file B. In each figure, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] In a data processing device having a general-purpose register file including a plurality of general-purpose registers and an arithmetic circuit that executes an operation using the values of each of the general-purpose registers as input, a plurality of the general-purpose register files are provided, and each general-purpose register - A general-purpose register characterized in that the general-purpose registers in the file are independently connected to each input of the arithmetic circuit, and the values of each of the general-purpose registers are simultaneously given as input data to the input of the arithmetic circuit. Access method.