JPS6221122B2 - - Google Patents

Info

Publication number
JPS6221122B2
JPS6221122B2 JP13915782A JP13915782A JPS6221122B2 JP S6221122 B2 JPS6221122 B2 JP S6221122B2 JP 13915782 A JP13915782 A JP 13915782A JP 13915782 A JP13915782 A JP 13915782A JP S6221122 B2 JPS6221122 B2 JP S6221122B2
Authority
JP
Japan
Prior art keywords
output
data
channel address
input
data bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13915782A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5930105A (ja
Inventor
Fumio Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Electric Manufacturing Ltd
Original Assignee
Toyo Electric Manufacturing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Electric Manufacturing Ltd filed Critical Toyo Electric Manufacturing Ltd
Priority to JP13915782A priority Critical patent/JPS5930105A/ja
Publication of JPS5930105A publication Critical patent/JPS5930105A/ja
Publication of JPS6221122B2 publication Critical patent/JPS6221122B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Control By Computers (AREA)
  • Programmable Controllers (AREA)
JP13915782A 1982-08-12 1982-08-12 プロセス入出力制御装置の出力制御装置 Granted JPS5930105A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13915782A JPS5930105A (ja) 1982-08-12 1982-08-12 プロセス入出力制御装置の出力制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13915782A JPS5930105A (ja) 1982-08-12 1982-08-12 プロセス入出力制御装置の出力制御装置

Publications (2)

Publication Number Publication Date
JPS5930105A JPS5930105A (ja) 1984-02-17
JPS6221122B2 true JPS6221122B2 (US06252093-20010626-C00008.png) 1987-05-11

Family

ID=15238899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13915782A Granted JPS5930105A (ja) 1982-08-12 1982-08-12 プロセス入出力制御装置の出力制御装置

Country Status (1)

Country Link
JP (1) JPS5930105A (US06252093-20010626-C00008.png)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0431060Y2 (US06252093-20010626-C00008.png) * 1985-08-22 1992-07-27
JPH0719117B2 (ja) * 1985-11-25 1995-03-06 松下電工株式会社 シ−ケンサのビツト演算回路

Also Published As

Publication number Publication date
JPS5930105A (ja) 1984-02-17

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