JPS62209865A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form an etching stop layer which does not almost affect an adverse influence to the characteristics of a semiconductor device by dividing a semiconductor layer having small first etching velocity into at least two or more layers. CONSTITUTION:A semiconductor layer 14 is grown on a high resistance substrate 15, and a high purity semiconductor layer 11 having a small evaporation rate is then grown. Here, the layer 11 which becomes a thermal etching stop layer is divided, for example, into 3 layers, and high purity semiconductor layers 13 having a larger evaporation rate than that of the layer 11 are grown therebetween. Then, a high purity semiconductor layer 12 having a large evaporation rate is grown. Since the layer 11 having a small evaporation rate is thus used, an etching depth can be automatically decided to form a field effect transistor which has small short channel effect and small source resistance.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a method of manufacturing a semiconductor device.

(Prior Art) Conventionally, in the process of manufacturing a semiconductor device, a part of a semiconductor substrate is etched, and regrowth such as buried growth is performed there. However, when etching the regrown portion, for example, if wet etching is used, the etching depth cannot be precisely controlled. Further, there is a problem in that a high resistance layer is formed at the regrowth interface when regrowth is performed after etching. An example of solving these problems is the 1985
Proceedings of the 32nd Spring Conference on Applied Physics 13
It is indicated by the history etc. published on the first page. Figure 2 (
A) to (B) are device cross-sectional views showing a method for manufacturing a laser diode that has been announced. That is, in the first MBE growth, N is grown on the N-type GaAs substrate 41 as shown in FIG. 2(a).
Type AIGaAs (AI composition x = 0.6) 42, additive-free A
lGaAs active layer (x=0.15) 43, P-type AIGa
As(x=0.6)44, N as passivation film
Type GaAs45, N type AIGaAs (x = 0.15)
46. Sequentially grow N-type GaAs 47.

Next, as shown in Fig. 2(b), take out the board and N
A stripe groove is formed by etching so that about 0.1 pm to 0.2 pm of the type GaAs 45 remains. Next, the substrate is introduced into the MBE apparatus again and the substrate is heated. The surface of a semiconductor decomposes and evaporates when the temperature exceeds a certain temperature specific to the semiconductor. Therefore, thermal etching of a semiconductor can be performed by controlling this evaporation. In this example, the second
As shown in figure (C), N-type GaAs45 and P-type AlGa
Taking advantage of the large difference in thermal etching speed of As44, after selectively etching only the N-type GaAs45 of the passivation film, as shown in FIG. 2(d), P-type AIGaAs (x = 0.6) was etched. )48. P+ type Ga
Re-grow As49. In this example, N-type GaAs45
Clean P-type AlGaAs4 by thermally etching
At the same time, the formation of a high resistance layer at the regrowth interface is removed, and at the same time, the P-type AlGaAs is
It is used as an etching stop layer for As45. In the method described above, P-type AlGaAs 44 is used as a stop layer for thermal etching, but at the same time, this layer also functions as a confinement layer for the laser diode.

(Problems to be Solved by the Invention) However, when the above-mentioned thermal etching method and subsequent regrowth method are used in the manufacturing process of general semiconductor devices, the presence of a layer for stopping etching causes the semiconductor device to deteriorate. characteristics may deteriorate. For example, when an etching stop layer is formed in an active layer of an electronic device, since it exists with a certain thickness, it can act as a barrier or a scattering factor for traveling electrons. Therefore, there is a need for a method for forming an etching stop layer that functions solely as an etching stop layer and does not adversely affect the characteristics of the semiconductor device being fabricated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming an etching stop layer that eliminates the above-mentioned drawbacks and can be easily used in general semiconductor devices.

(Means for Solving the Problems) A first semiconductor layer having a low etching rate is formed on a semiconductor substrate, then semiconductor layers having a higher etching rate than the first semiconductor layer are successively formed, and later the first semiconductor layer is formed at a higher etching rate than the first semiconductor layer. In the method for manufacturing a semiconductor device in which only a second semiconductor layer is etched and a third semiconductor layer is then formed on the first semiconductor layer, the first semiconductor layer having a low etching rate is formed into at least two layers. The method is characterized in that it is divided, and a semiconductor layer having a higher etching rate than the first semiconductor layer is included between the divided semiconductor layers.

(Function) Hereinafter, the functions and effects peculiar to the present invention will be described with reference to the device cross-sectional views shown in FIGS. However, it is clear that the principles of the present invention can be applied to other materials and semiconductor devices.

This embodiment relates to a method of manufacturing a field effect transistor.

First, as shown in FIG. 1(a), a high-purity semiconductor layer 14 is grown on a high-resistance substrate 15, and then a high-purity semiconductor layer 11 with a low evaporation rate is grown. It is essential that the evaporation rate of this semiconductor layer 11 is sufficiently lower than that of the high-purity semiconductor layer 12 that is subsequently grown. Here, the method shown in the conventional example uses only one semiconductor layer 11, which serves as a stop layer for thermal etching, but in the present invention, at least two layers are used.
It is characterized by being divided into more than one layer. In the embodiment shown in FIG. 1, the semiconductor layer 11 is divided into, for example, three layers. Moreover, between the divided semiconductor layers 11, the semiconductor layer 1
A high-purity semiconductor layer 13 having a higher evaporation rate than 1 is grown. The thickness of the semiconductor layer 11, which is the total thickness of the three divided layers, functions as a stop layer for thermal etching of the semiconductor layer 12, but each divided layer is sufficiently thin, and their presence reduces the mobility of electrons. Select so that it does not deteriorate. Next, a high purity semiconductor layer 12 having a high evaporation rate is grown.

Furthermore, a high purity semiconductor layer 21 having a lower electron affinity than the semiconductor layer 12 is grown, followed by an N medium semiconductor layer 22 having a lower electron affinity than the semiconductor layer 12. Next, as shown in FIG. 1(b), an etching mask 16 is formed on the gate portion. Further, as shown in FIG. 1(e), the source and drain forming portions are opened using the etching mask 16. First, the semiconductor layers 21 and 22 are removed using wet etching, etc., and the etching is stopped halfway through the semiconductor layer 12. do. Next, the substrate is heated and the semiconductor layer 12 is thermally etched. After the semiconductor layer 12 is removed by thermal etching, the thickness of the semiconductor layer 11 is designed as described above, so the semiconductor layer 12 is thermally etched. ), etching will automatically stop. Subsequently, N-type semiconductor 117 is regrown in the source and drain openings,
Next, the etching mask 16 and the deposits thereon are removed (FIG. 1(e)). Next, as shown in FIG. 1 (0), a source electrode 19 and a drain electrode 20 are formed on the regrown portion 17, and a gate electrode 18 is formed on the N medium semiconductor layer 22.

In this example, since thermal etching is performed, the high resistance layer that normally occurs at the regrowth interface can be removed, and since the semiconductor layer 11 with a low evaporation rate is used, the etching depth is reduced as shown in FIG. 1(d). It is possible to determine automatically. Therefore, a field effect transistor with small short channel effect and low source resistance can be formed. In addition, as shown in Figure 1 (O), the semiconductor layer 11 remains below the gate 18 which becomes the electron channel, but this layer is divided and each divided layer is formed sufficiently thin, so that each The thickness is sufficiently small compared to the spread of the wave derivative of electrons, so it hardly contributes as a barrier or scattering factor for electrons.Therefore, its presence does not affect the characteristics of the semiconductor device.

(Example) An example of the method for manufacturing a field effect transistor of the present invention will be described in further detail. The growth is done by molecular beam epitaxy (Molecular beam epitaxy).
;hereinafter referred to as MBE). First, Figure 1 (a)
As shown in FIG.
s14 at a growth rate of 1 pm/hour and a growth temperature of 650°C.
We have grown by 000 people. Next semiconductor layer 11 with low evaporation rate
For the semiconductor layer 13, undoped AlAs was grown at a rate of 0.211 per hour, and for the semiconductor layer 13, undoped GaAs was used. First 12 people with AlAs, then 50 people with GaAs, then AlA
Then, six AlAs layers were grown to form semiconductor layers 11 and 13 in the figure. In this example, AlAs, which functions as an etching stop layer, was etched by 12 (2
It is divided into 3 layers, 2 layers (equivalent to atomic layer thickness) and 1 layer of 6 people (equivalent to 1 atomic layer thickness), for a total of 30 people (
(corresponding to a thickness of 5 atomic layers) can function as a stop layer for thermal etching. Next, add-free GaAs12 was applied to 600 people, then AI
□, 3Ga□, 7As21 for 20 people, then Si for 2X1
018am-3 added AIo, 3Ga□.

7As22 has grown by 460 people. Next, 2000 pieces of 5i0216 were formed as an etching mask as shown in FIG. 1(b), and as shown in FIG.
The As layer is selectively removed by phosphorus-oxygen etching. At this time, the GaAs layer 12 is over-etched by about 100A. Next, put the substrate into the MBE apparatus again and
), thermal etching was performed for 10 minutes at a substrate temperature of 720'C while irradiating the substrate with arsenic at a pressure of about 2.times.10@-5 torr. The thermal etching rate of GaAs at this time is about 150 etchings per minute. Next, a GaAs layer doped with 5 x 1018 cm-3 of Si as an N+ contact layer was regrown for 1500 times at a substrate temperature of 600°C.
As shown in figure (e), the substrate was taken out from the growth chamber and 5i
Remove the deposits on 0216 and 5i02. Furthermore, as shown in Figure 1 (O), the source and drain ohmic
Electrodes 19, 20 were formed, and gate electrode 18 was also formed.

In this example, AlAs is used in the channel part of the two-dimensional electron gas.
If AlAs is used without being split in the conventional line, the mobility of the two-dimensional electron gas will deteriorate, but in this case, the properties equivalent to those of the normally obtained two-dimensional electron gas will be observed. Obtained. Moreover, with the present invention, the high resistance layer that occurs at the regrowth interface can be removed, and the N+ contact layer can be regrown by precisely controlling the depth of the N intermediate layer, resulting in good characteristics with low source resistance and short channel effects. A field effect transistor has been manufactured.

In the examples, GaAs/
Although the explanation has been made using only a combination of AlAs, the basic principle of the present invention is applicable to a combination of at least two or more materials having different etching rates. For example, Ga
InAs, InP, and the like are materials that have a higher thermal etching rate than As, and many combinations of materials can be used.

(Effects of the Invention) The present invention provides a versatile etching stop layer that automatically stops etching during thermal etching before regrowth, and the presence of the etching stop layer does not adversely affect the characteristics of a semiconductor device. A method for manufacturing the semiconductor device used was obtained.

[Brief explanation of drawings]

FIGS. 1(a) to (O) are sectional views of elements showing embodiments of the present invention, and FIGS. 2(a) to (d) are sectional views of elements showing conventional examples. In the figures, 11.AlAs, 12. 13 and 14・GaAs, 15−
...Semi-insulating GaAs substrate, 16...SiO2, 17
・N+ type GaAs, 18-gate electrode, 19... source electrode, 20... drain electrode, 21... AlG
aAs, 22. ,, N-type AlGaAs, 41-N-type G
aAs substrate, 42 N-type AlGaAs (x=0.6),
43.AIGaAs (x=0.15), 44.P-type AI
GaAs (x=0.6), 45・N-type GaAs, 46・
N-type AlGaAs (x = 0.15), 47・N-type G
aAs. 48・P-type AIGaAs (x = 0.6) Day 1 Fig.

Claims (1)

[Claims] Forming a first semiconductor layer with a low etching rate on a semiconductor substrate, then sequentially forming a second semiconductor layer with a higher etching rate than the first semiconductor layer, and later etching only the second semiconductor layer. Then, in the method for manufacturing a semiconductor device in which a third semiconductor layer is formed on the first semiconductor layer, the first semiconductor layer having a low etching rate is divided into at least two layers, and the divided A method for manufacturing a semiconductor device, comprising a semiconductor layer having a higher etching rate than the first semiconductor layer between the semiconductor layers.