JPS6220581B2 - - Google Patents

Info

Publication number
JPS6220581B2
JPS6220581B2 JP57182687A JP18268782A JPS6220581B2 JP S6220581 B2 JPS6220581 B2 JP S6220581B2 JP 57182687 A JP57182687 A JP 57182687A JP 18268782 A JP18268782 A JP 18268782A JP S6220581 B2 JPS6220581 B2 JP S6220581B2
Authority
JP
Japan
Prior art keywords
fetch
signal
state
instruction
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57182687A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5880743A (ja
Inventor
Uiriamu Bogaadasu Deebitsudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of JPS5880743A publication Critical patent/JPS5880743A/ja
Publication of JPS6220581B2 publication Critical patent/JPS6220581B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/25Testing of logic operation, e.g. by logic analysers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Bus Control (AREA)
JP57182687A 1981-10-19 1982-10-18 マイクロプロセツサ用フエツチ予告装置 Granted JPS5880743A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US31246681A 1981-10-19 1981-10-19
US312466 1981-10-19

Publications (2)

Publication Number Publication Date
JPS5880743A JPS5880743A (ja) 1983-05-14
JPS6220581B2 true JPS6220581B2 (de) 1987-05-07

Family

ID=23211585

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57182687A Granted JPS5880743A (ja) 1981-10-19 1982-10-18 マイクロプロセツサ用フエツチ予告装置

Country Status (4)

Country Link
JP (1) JPS5880743A (de)
DE (1) DE3238566C2 (de)
GB (1) GB2110440A (de)
NL (1) NL8203838A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3429112A1 (de) * 1984-08-03 1986-02-06 Siemens AG, 1000 Berlin und 8000 München Verfahren und schaltungsanordnung zur generierung von steuerinformationen aus statussignalen eines mirkroprozessors
US4759019A (en) * 1986-07-10 1988-07-19 International Business Machines Corporation Programmable fault injection tool

Also Published As

Publication number Publication date
DE3238566A1 (de) 1983-05-05
GB2110440A (en) 1983-06-15
JPS5880743A (ja) 1983-05-14
DE3238566C2 (de) 1984-06-28
NL8203838A (nl) 1983-05-16

Similar Documents

Publication Publication Date Title
EP0464494B1 (de) Hochleistungsfähiger Emulator mit Pipelining
KR880000297B1 (ko) 부정장(不定長)명령을 갖는 데이터처리장치
US5560036A (en) Data processing having incircuit emulation function
US5091853A (en) Chained addressing mode pipelined processor which merges separately decoded parts of a multiple operation instruction
JPS6029126B2 (ja) デ−タ処理装置
US5313644A (en) System having status update controller for determining which one of parallel operation results of execution units is allowed to set conditions of shared processor status word
US5812809A (en) Data processing system capable of execution of plural instructions in parallel
JPH035835A (ja) マイクロプロセッサ
US6615339B1 (en) VLIW processor accepting branching to any instruction in an instruction word set to be executed consecutively
US4287561A (en) Address formulation interlock mechanism
US4945511A (en) Improved pipelined processor with two stage decoder for exchanging register values for similar operand instructions
US5542060A (en) Data processor including a decoding unit for decomposing a multifunctional data transfer instruction into a plurality of control codes
US5276825A (en) Apparatus for quickly determining actual jump addresses by assuming each instruction of a plurality of fetched instructions is a jump instruction
US5461715A (en) Data processor capable of execution of plural instructions in parallel
US4028670A (en) Fetch instruction for operand address calculation
US6757809B1 (en) Data processor having 2n bits width data bus for context switching functions
US5034880A (en) Apparatus and method for executing a conditional branch instruction
US6832334B2 (en) Computer register watch
JPS6220581B2 (de)
EP0324952B1 (de) Verzweigungsschaltung für einen Pipeline-Prozessor
US7631166B1 (en) Processing instruction without operand by inferring related operation and operand address from previous instruction for extended precision computation
US5247625A (en) System for checking undefined addressing prescribed for each instruction of variable length using tag information to determine addressing field decoded in present or preceding cycle
US5860155A (en) Instruction decoding mechanism for reducing execution time by earlier detection and replacement of indirect addresses with direct addresses
US5745723A (en) Data processing system capable of execution of plural instructions in parallel
JPH01120638A (ja) 情報処理装置