JPS62200824A - Analog-digital conversion circuit - Google Patents
Analog-digital conversion circuitInfo
- Publication number
- JPS62200824A JPS62200824A JP4154886A JP4154886A JPS62200824A JP S62200824 A JPS62200824 A JP S62200824A JP 4154886 A JP4154886 A JP 4154886A JP 4154886 A JP4154886 A JP 4154886A JP S62200824 A JPS62200824 A JP S62200824A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- differential amplifier
- conversion
- converter
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 21
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、低分解能のＡ／Ｄ変換器を高精度化したＡ
／Ｄ変換器に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides an A/D converter with high precision, which is a low-resolution A/D converter.
/D converter.
従来、一般に市販されているｌチップ・マイコンでＡ／
Ｄ変換器内蔵のマイクロコンピュータはビット構成が例
えば８ビツトであるために、２８＝２５６の分解能とな
シ、最高でも分解能としての精度は’／２５６、すなわ
ち０．４〜０．５チとなってしまう。しかし、最近罠な
ってディジタル表示が普及し少数点以下（ｏ、ｉ ％程
度）の表示をする用途が多くなってくると充分な分解能
が得られないことが問題となる。そこで、上記に対処す
るためマイコン内蔵のＡ／Ｄ変換器を使用する代シに、
例えばｌＯビットのＡ／１）変換器を取付けて、２”＝
１０２４の分解能を実現するような手段をとっている。Conventionally, commercially available l-chip microcontrollers have been used to
Since the bit configuration of a microcomputer with a built-in D converter is, for example, 8 bits, it has a resolution of 28=256, and the maximum resolution accuracy is '/256, that is, 0.4 to 0.5 inch. I end up. However, recently, digital displays have become widespread and applications for displaying less than a decimal point (on the order of o, i%) have become common, and the problem arises that sufficient resolution cannot be obtained. Therefore, in order to deal with the above problem, we decided to use an A/D converter with a built-in microcontroller.
For example, by installing a lO bit A/1) converter, 2”=
Measures are taken to achieve a resolution of 1024.
従来のＡ／Ｄ変換回路は以上のように構成されているの
で、例えば、１０ビツトの外付けＡ／Ｄ変換器を採用す
ると高価となり実用性に乏しい等の問題点があった。Since the conventional A/D conversion circuit is constructed as described above, there were problems such as, for example, if a 10-bit external A/D converter was used, it would be expensive and impractical.
この発明は上記のような問題点を解消するためになされ
たもので、アナログ増幅回路と分解能のわるいＡ／Ｄ変
換器を内蔵するマイコンとを組合せることによシ高精度
のＡ／Ｄ変換回路を得ることを目的とする。This invention was made to solve the above-mentioned problems, and achieves high-precision A/D conversion by combining an analog amplifier circuit and a microcontroller with a built-in A/D converter with low resolution. The purpose is to obtain a circuit.
この発明に係るＡ／Ｄ変換回路は、例えば従来の８ピツ
）Ａ／Ｄ変換回路付ｌチップマイコンを採用し、簡単な
アナログ増幅回路を付加することＫよってＡ／Ｄ変換器
の分解能を１０ビツト、すなわち０．１−の精度まで出
せるようにしたものである。The A/D conversion circuit according to the present invention employs, for example, a conventional 8-chip microcomputer with an A/D conversion circuit, and by adding a simple analog amplifier circuit, the resolution of the A/D converter can be increased to 10. It is designed to be able to output accuracy up to a bit, that is, 0.1-.
この発明におけるＡ／Ｄ変換回路はＡ／Ｄ入力ボート付
８ビットマイコンと差動増幅器を含む外付回路とにより
、該差動増幅器の比較電圧（しきい値）を任意に変え分
解能を向上させる。The A/D conversion circuit in this invention uses an 8-bit microcomputer with an A/D input port and an external circuit including a differential amplifier to arbitrarily change the comparison voltage (threshold value) of the differential amplifier to improve resolution. .
以下、この発明の一実施例を図について説明する。第１
図はこの発明の原理を示すもので、図において、１はＡ
／Ｄ変換器内蔵のマイコンで以下の諸機能を備えている
。すなわち、２は前記内蔵されたＡ／Ｄ変換部、３は零
値判定手段、４は比較電圧手段、５は比較電圧加算手段
、６はスケーリング手段である。また、Ｔは比較電圧供
給手段で複数のスイッチング回路、例えばトランジスタ
から構成され、前記差動増幅手段の入力しきい値を変え
る。９は差動増幅手段である。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows the principle of this invention. In the figure, 1 is A
It is a microcontroller with a built-in /D converter and has the following functions. That is, 2 is the built-in A/D conversion section, 3 is a zero value determination means, 4 is a comparison voltage means, 5 is a comparison voltage addition means, and 6 is a scaling means. Further, T is a comparison voltage supply means, which is composed of a plurality of switching circuits, for example transistors, and changes the input threshold value of the differential amplification means. 9 is a differential amplification means.
次に第１図の動作について説明する。第３図は第１図の
回路を具体的に示したものである。すなわち、第３図に
おいて、Ａ／Ｄ人カデカボート１０差動増幅器１３の出
力電圧であるＶｏｕｔと、差動増幅器１３の入力（Ａ号
であるアナログ人力Ｖ ｉ ｎ及び比較電圧ｖＡｏＨ係
は（１）式で示される。Next, the operation shown in FIG. 1 will be explained. FIG. 3 specifically shows the circuit of FIG. 1. That is, in FIG. 3, the relationship between Vout, which is the output voltage of the A/D driver boat 10 and the differential amplifier 13, the input of the differential amplifier 13 (the analog human power V in, which is No. A), and the comparison voltage vAoH is (1) It is shown by the formula.
ここで、比較電圧ｖＡはマイコン９の出力ボート１１の
出力端子０１〜ｏ３の出力イε号レベル１Ｈ”または“
Ｌ”によって３個のトランジスタＱｌ−Ｑ３が夫々ＯＮ
、ＯＦＦすることによシ４段階に比較電圧ＶＡのレベル
（しきい値）が変化する。すなわち、第２図に示す如く
、
第１は、トランジスタＱｌ 、Ｑ２ 、Ｑ３が全てＯＦ
ＦのときＫは抵抗Ｒ５と几６との分圧比によって比較電
圧Ｖ＾１は決まる。Here, the comparison voltage vA is the output terminal ε of the output terminals 01 to o3 of the output port 11 of the microcomputer 9.
Three transistors Ql-Q3 are turned on by “L”.
, the level (threshold value) of comparison voltage VA changes in four steps by turning OFF. That is, as shown in FIG. 2, first, transistors Ql, Q2, and Q3 are all OFF.
When K is F, the comparison voltage V^1 is determined by the voltage division ratio between the resistors R5 and 6.
第２は、トランジスタＱｌのみがＯＮのときＫは抵抗Ｒ
５と抵抗Ｒ６、Ｒ７の並列接続との直列接続で比較電圧
Ｖム（２）は決まる。Second, when only the transistor Ql is ON, K is the resistance R
The comparison voltage Vm(2) is determined by the series connection of 5 and the parallel connection of resistors R6 and R7.
第３は、トランジスタＱ２のみがＯＮのときには抵抗Ｒ
５と抵抗Ｒ６，几８の並列接続との直列接続で比較電圧
Ｖ Ａ （８）は決まる。Third, when only transistor Q2 is ON, resistor R
The comparison voltage V A (8) is determined by the series connection of the resistor R6 and the parallel connection of the resistor R6 and the resistor R8.
第４は、トランジスタＱ３のみがＯＮの場合で、このと
きＫは抵抗Ｒ６をバイパスしてコそン電位となるため比
較電圧ＶＡ（４）はＯｖとなる。The fourth case is when only the transistor Q3 is ON, and in this case, K bypasses the resistor R6 and becomes a constant potential, so the comparison voltage VA(4) becomes Ov.
ここで差動増幅器１３の比較電圧ＶＡの変化は好ましく
はアナログ入力Ｗｉｎの入力電圧範囲がＱＶ≦Ｗｉｎ≦
Ｖｉｎ（ｍａＸ）であるときにＷｉｎ（ｍａｘ）ｘ±に
なるように夫々の抵抗の値が予め設定されていると、例
えばアナログ入力Ｖｉａの入力範１ｉ［１１カＯ〜４ｖ
テａ出力ホ−） ０１ 、０２ 、０３＞１全て＠Ｌｍ
レベルの時にはトランジスタＱｌ、Ｑ２゜Ｑ３が全てＯ
ＦＦとなって比較電圧Ｖ＾（１） ” ３ Ｖとなる。Here, the change in the comparison voltage VA of the differential amplifier 13 is preferably such that the input voltage range of the analog input Win is QV≦Win≦
If the value of each resistor is set in advance so that when Vin (max) is Win (max)
Te a output ho) 01, 02, 03>1 all @Lm
When at level, transistors Ql, Q2゜Q3 are all O
It becomes an FF and the comparison voltage becomes V^(1)'' 3V.
また、出カポ−）０１のみが“Ｈルベルで他の出カポ−
）０２．０３が°Ｌ＃レベルのときＫはトランジスタＱ
１のみがＯＮとなって比較電圧ｖＡ（ｇ）は２ｖとなる
。In addition, only the outgoing couple) 01 is “H Rubel” and the other outgoing couple
)02.03 is °L# level, K is transistor Q
Only 1 is turned on, and the comparison voltage vA(g) becomes 2v.
また、出カポ−）Ｑ２のみがＨ”レベルで他の出カポ−
）０１．０３が１Ｌ“レベルのときにはトランジスタＱ
２のみがＯＮとなって比較電圧ＭＡ（８）はＩＶとなる
。更に出カポ−）０３のみが＠Ｈ″レベルで他の出カポ
−）０１．０２が１Ｌ＃レベルのときには比較電圧Ｖム
（４）はＯＶになる様に夫々の抵抗値孔５〜几８を設定
している。In addition, only the output port (Q2) is at H" level and the other output ports are
)01.03 is at 1L" level, transistor Q
2 is turned on, and the comparison voltage MA(8) becomes IV. Furthermore, when only the output capacitor) 03 is at @H'' level and the other output capacitors) 01.02 are at the 1L# level, the respective resistance values of holes 5 to 8 are adjusted so that the comparison voltage Vmu (4) becomes OV. is set.
従って、このアナログ人力Ｗｉｎよシ低く、かつ最もア
ナログ入力電圧に近い比較電圧との差は（２）式となる
。Therefore, the difference between this analog human power Win and the comparison voltage that is lower and closest to the analog input voltage is expressed by equation (2).
Ｏ≦ｖｉｎ Ｖａ≦ｌｖ ・・・・・・・・・・
・・（２）よって、１ｖを越えることはない。O≦vin Va≦lv ・・・・・・・・・・・・
...(2) Therefore, it never exceeds 1v.
ここで、第３図の差動増幅器１３の増幅率は抵抗比ｌ＝
几３．几２＝Ｒ４であるとすると抵抗Ｒ２と几ｌの比Ｒ
２／Ｒ１によって決定される。Here, the amplification factor of the differential amplifier 13 in FIG. 3 is the resistance ratio l=
3. If 几2=R4, then the ratio R of resistance R2 and 几l
Determined by 2/R1.
この増幅重比２／几ｌはｖ １ｎ−ｖＡ ＝ Ｉ Ｖの
ときマイコンのＡ／Ｄ人カデカボートルスパンになる様
に拡大（スケーリング）して設定している。すなわち、
Ａ／Ｄ入カデカポート１０囲をＯ〜４ｖとするとＲ２／
几ｌ＝４、アナログ人力Ｖｉｎ がＶＡ（ｉ）よシ小
さいとき差動増幅器１３の出力ｖＯｕｔは負（Ｖｏｕｔ
＜０）となるためこれをＡ／Ｄ変換するとマイコン９の
Ａ／Ｄ変換部はｏＶよシ小さなレンジ外の入力であるた
めＡ／Ｄ変換値はｘＨ＝Ｏとなる。This amplification weight ratio 2/l is expanded (scaled) and set so that when v 1n-vA = IV, it becomes the A/D voltage span of the microcomputer. That is,
If the A/D input Kadeka port 10 is O~4v, R2/
几l=4, when the analog human power Vin is smaller than VA(i), the output vOut of the differential amplifier 13 is negative (Vout
<0), so when this is A/D converted, the A/D converter of the microcomputer 9 receives an input outside the range smaller than oV, so the A/D converted value becomes xH=O.
従って、マイコンはトランジスタＱｌ、Ｑ２゜Ｑ３を逐
次ＯＮさせて行き、そのとき求まるＡ／Ｄ変換値ｘ１が
初めて零でない値となるｖＡ（ｉ）とｘｌを求める。例
えば、Ｘｉｎが２．７ｖならばｘｌはｏ、７ｖｏデイジ
タル変換値テ、ｖＡ（ｉ）−＝２Ｖテある。０−１ｖの
レンジにある０、７ｖを差動増幅器１３で４倍にして、
例えば８ピツ）（２５６の分解能）のＡ／Ｄ変換器２で
Ａ／Ｄ変換して、この後でスケーリングのために４で除
すとｘ Ｈ＝０．７ＶのＡ／Ｄ変換の分解能は、
となる。これに２■のＡ／Ｄ変換値を加算すれば高分解
能の２．７■のＡ／Ｄ変換が実行できる。Therefore, the microcomputer sequentially turns on the transistors Ql, Q2 and Q3, and finds vA(i) and xl at which the A/D conversion value x1 obtained at that time becomes a non-zero value for the first time. For example, if Xin is 2.7V, xl is o, 7vo digital conversion value, vA(i)-=2V. 0.7v in the 0-1v range is quadrupled by the differential amplifier 13,
For example, if A/D conversion is performed by A/D converter 2 with a resolution of 8 pixels) (resolution of 256), and then divided by 4 for scaling, the resolution of A/D conversion with x H = 0.7V is , becomes. By adding the A/D conversion value of 2.7 cm to this, high-resolution A/D conversion of 2.7 cm can be executed.
従来のＡ／Ｄ変換器において、これと同様のＡ／Ｄ変換
を行うとすると、Ｏ〜４ｖを８ビツトでＡ／Ｄ変換した
分解能け一’−（Ｖ） となる。If a conventional A/D converter were to perform A/D conversion similar to this, the resolution would be 1'-(V), which is A/D conversion of 0 to 4V with 8 bits.
従って、 ４＝２ 、すなわち２ビツト分の分解能が
向上したことくなる。第４図は動作例の７０−チャート
である。Therefore, 4=2, that is, the resolution is improved by 2 bits. FIG. 4 is a 70-chart of an example of operation.
なお、第２図におけるΔ””／Ａ（Ｉ ＶＡ（ｉ＋１
）は等間隔が好ましい。このように構成するととＫよプ
自動的Ｋｖ人（ｉ）がＡ／Ｄのゼロ・スパンのスパン電
圧に、ｖＡ（ｉ＋１）がＡ／Ｉ）のゼロ電圧に対応する
ことになる。しかし、必ずしも等間隔でＶＡ（ｉ）を分
割させなくてもよく、マイコンでスケーリングの際、補
正させてしまうようにしてもよい。In addition, Δ””/A(I VA(i+1
) are preferably equally spaced. With this configuration, K + Kv (i) automatically corresponds to the span voltage of the zero span of the A/D, and vA (i+1) corresponds to the zero voltage of the A/I). However, VA(i) does not necessarily need to be divided at equal intervals, and may be corrected during scaling by a microcomputer.
以上のようＫこの発明によれば、Ａ／Ｄ変換器付ｌチッ
プマイコンのＡ／Ｄ入カデカボート動増幅回路を接続し
、該差動増幅回路のしきい値電圧を変化させることＫよ
ｆｉ Ａ／Ｄ入カデカボート力電圧範囲を変えるように
したので、Ａ／Ｄ変換器の分解能が大ＩＮＫ向上し、高
精度のＡ／Ｄ変換器が構成できる効果がある。As described above, according to the present invention, an A/D input dynamic amplifier circuit of a l-chip microcomputer with an A/D converter is connected to change the threshold voltage of the differential amplifier circuit. Since the /D input voltage voltage range is changed, the resolution of the A/D converter is greatly improved by INK, and a highly accurate A/D converter can be constructed.
【図面の簡単な説明】
第１図はこの発明の一実施例を示すＡ／Ｄ変換器の原理
図、第２図は第１図の具体的動作を示す説明図、第３図
は第１図の具体的回路図、第４図は第３図の動作の一例
を示すフローチャートである。
図において、１，９はマイコン、８．１３は差動増幅器
、１０はＡ／Ｄ人カデカボート１は出力ボート、１２は
Ａ／Ｄ出力ボートである。
特許出願人 山武ハネウェル株式会社（外２名）[Brief Description of the Drawings] Fig. 1 is a principle diagram of an A/D converter showing an embodiment of the present invention, Fig. 2 is an explanatory drawing showing the specific operation of Fig. 1, and Fig. 3 is an illustration of the The specific circuit diagram shown in the figure and FIG. 4 are flowcharts showing an example of the operation of FIG. 3. In the figure, 1 and 9 are microcomputers, 8 and 13 are differential amplifiers, 10 is an A/D driver board 1 is an output port, and 12 is an A/D output port. Patent applicant Yamatake Honeywell Co., Ltd. (2 others)
Claims (2)
コンのＡ／Ｄ変換部入力ポートに入力される差動増幅手
段とを備えたＡ／Ｄ変換回路において、前記マイコンの
出力ポートからの出力信号によつてスイッチング回路を
動作させ、前記差動増幅手段のしきい値電圧を変化させ
ることによつて前記Ａ／Ｄ変換部の入力電圧範囲をＡ／
Ｄ変換した後、任意の電圧レベルでスケーリングを可能
にし分解能の向上を図るようにしたことを特徴とするＡ
／Ｄ変換回路。(1) In an A/D conversion circuit comprising a one-chip microcomputer with an A/D conversion function and a differential amplification means inputted to an A/D conversion section input port of the microcomputer, a signal from an output port of the microcomputer is The input voltage range of the A/D converter is changed to A/D by operating a switching circuit according to the output signal and changing the threshold voltage of the differential amplifying means.
A characterized in that after D conversion, scaling is possible at any voltage level to improve resolution.
/D conversion circuit.
素子で構成したことを特徴とする特許請求の範囲第１項
記載のＡ／Ｄ変換回路。(2) The A/D conversion circuit according to claim 1, wherein the switching circuit is constructed of semiconductor elements such as transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4154886A JPS62200824A (en) | 1986-02-28 | 1986-02-28 | Analog-digital conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4154886A JPS62200824A (en) | 1986-02-28 | 1986-02-28 | Analog-digital conversion circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62200824A true JPS62200824A (en) | 1987-09-04 |
Family
ID=12611476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4154886A Pending JPS62200824A (en) | 1986-02-28 | 1986-02-28 | Analog-digital conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62200824A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6488601A (en) * | 1987-09-29 | 1989-04-03 | Toshiba Corp | Device for controlling operation |
| JP2006121324A (en) * | 2004-10-20 | 2006-05-11 | Fujitsu Ltd | A/d converter, battery pack, electronics device and method of voltage measurement |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59132230A (en) * | 1983-01-19 | 1984-07-30 | Hitachi Ltd | Analog-digital converting circuit |
| JPS59141827A (en) * | 1983-02-02 | 1984-08-14 | Matsushita Electric Ind Co Ltd | Analog/digital conversion controller |
| JPS6041327A (en) * | 1983-08-16 | 1985-03-05 | Kinmon Seisakusho:Kk | Analog-digital converting device |
-
1986
- 1986-02-28 JP JP4154886A patent/JPS62200824A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59132230A (en) * | 1983-01-19 | 1984-07-30 | Hitachi Ltd | Analog-digital converting circuit |
| JPS59141827A (en) * | 1983-02-02 | 1984-08-14 | Matsushita Electric Ind Co Ltd | Analog/digital conversion controller |
| JPS6041327A (en) * | 1983-08-16 | 1985-03-05 | Kinmon Seisakusho:Kk | Analog-digital converting device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6488601A (en) * | 1987-09-29 | 1989-04-03 | Toshiba Corp | Device for controlling operation |
| JP2006121324A (en) * | 2004-10-20 | 2006-05-11 | Fujitsu Ltd | A/d converter, battery pack, electronics device and method of voltage measurement |
| JP4641173B2 (en) * | 2004-10-20 | 2011-03-02 | 富士通セミコンダクター株式会社 | A / D converter, battery pack, electronic device and voltage measuring method |
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