JPS59132230A - Analog-digital converting circuit - Google Patents

Abstract

PURPOSE:To enlarge the input dynamic range by switching an A/D converting operation when a converted voltage exceeds the voltage range in the A/D converting circuit of the 2<n>R voltage dividing system. CONSTITUTION:In starting the A/D converting operation, the A/D converting operation is performed by connecting an analog switch SW1 to (b) contacts to transmit an input analog voltage Vin to a voltage comparator circuit OP2 as it is. When the resulting voltage exceeds the voltage ranges VH-VL through this converting operation, a CONT2 discriminates it and switches the A/D converting operation to keep the resulting voltage in the operating voltage ranges VH-VL in the voltage comparison circuit OP2. Thus, the input dynamic range is enlarged while keeping the desired A/D converting accuracy.

Description

[Detailed description of the invention] The present invention relates to an A/D conversion circuit.

Traditionally, modular type (including monolithic IC)
/D conversion circuit, 2nR partial voltage (Po-tentlo
The metric) method is known from "Microcomputer Age's A/D-D/A Conversion Technology 1" published by Nikkan Kogyo Shimbun, pp. 8188-89.

Since this A/D conversion circuit successively compares the 2n partial voltage and the input analog voltage, the differential MO3FET constituting the voltage comparison circuit is (Insulated gate field effect transistor) etc., the sensitivity of differential operation becomes worse. That is, since the bias voltage or bias current necessary for the operation of the differential MOSFET and the like cannot be applied, a highly accurate voltage comparison operation cannot be expected.

For example, when the power supply voltage VDD is about 3 volts, it is about 0.8 volts from the power supply voltage side and about 0 volts from the circuit ground potential side.
．． In the range of about 2 volts, the desired accuracy cannot be obtained (therefore, the dynamic range of the input analog voltage becomes small. The purpose of this invention is to expand the input dynamic range while maintaining the desired accuracy. The object of the present invention is to provide an A/D conversion circuit according to the present invention.

Another object of the present invention is to provide an A/D device suitable for semiconductor integrated circuits.
The purpose of this invention is to provide a conversion circuit.

Further objects of the invention will become apparent from the following description and drawings.

Hereinafter, this invention will be explained in detail together with examples.

FIG. 1 shows a circuit diagram of an embodiment of the present invention.

The A/D conversion circuit shown in the figure is formed on a single semiconductor substrate such as silicon by a known MO3 semiconductor integrated circuit manufacturing technique, although this is not particularly limited. The A/D conversion method of this embodiment is called the above-mentioned 2nR voltage division method, and is composed of the following circuits.

Resistors are inserted in series between the stabilized power supply voltage VDD or a stabilized voltage VDD at a level equivalent to the power supply voltage and the circuit ground potential 0, and the divided terminals are taken out from these resistors. The number of these resistors is
When performing the conversion, 2° resistors are placed in series and 2n
-One split terminal is taken out.

This scales the analog conversion voltage.

Up to this point, it is the same as the fully parallel comparison method, but from this point on, (2"1-2) analog switches that also function as decoders are provided. These analog switches have a switch tree decoder structure. The connection points are successively connected to the dividing terminals of the dividing resistor.

Although the base point of the switch tree is not particularly limited, it is connected to the inverting input terminal (-) of the voltage comparator circuit OP2, and the base point of the switch tree is connected to the non-inverting input terminal (+) of the voltage comparator circuit OP2 while maintaining the desired accuracy. In order to expand the input dynamic range, in other words, to operate the voltage comparison circuit OP2 within a highly accurate voltage comparison operation range, the input analog signal V in to be converted is passed through a level conversion circuit to be described later.
' is selectively applied.

The output signal of this voltage comparator circuit OP2 is transmitted to the first control circuit C0NTl, which controls switching of a switch tree that successively compares the analog voltage at the non-inverting input terminal (+) with the 2n divided voltage. . That is, the intermediate voltage VDD/2 and the analog voltage are compared, and if the output is at a high level, the most significant bit B7"1" is set (if the output is at a low level, B7 is set to "0"). Furthermore, 3 VDD/4 (VDD/' 4), which is 1/2 of the voltage, is compared with the analog voltage, and if the output is high level, the second bit B6 is set to "1" (if it is low level, B6 is set to "0"). )
shall be. Thereafter, the calculations are made in the same manner up to the least significant bit BO.

The level conversion circuit is constructed from the following variable gain amplification circuit and level inversion circuit. That is, a switching analog switch means SWI is provided at the non-inverting input terminal (+) of the voltage comparison circuit OP2, one of which (a) is connected to the output terminal (level conversion output side) of the operational amplifier OP1', and the other (a) is connected to the output terminal (level conversion output side) of the operational amplifier OP1'. b) to the input analog voltage terminal Vin.

The non-inverting input terminal (+) of the operational amplifier OPI is grounded,
Feedback resistors 4R and R/2 for gain setting are selectively connected between the inverting input terminal (-) and the output terminal via a switching analog switch SW2. The inverting input terminal (-) is provided with an input resistor R for setting a gain. Since the output of the operational amplifier circuit OPI has an inverted signal level, a level inversion circuit whose gain is set to 1 is provided. That is, an operational amplifier circuit OPI° whose gain is set to 1 by setting the resistance values of an input resistor and a feedback resistor to be equal is connected in series to the operational amplifier circuit OP1.

The analog switches SWI and SW2 are switched and controlled by a second control circuit C0NT2 that receives the A/D conversion outputs BO to B7.

The operating principle of this embodiment circuit will be explained with reference to FIG.

As shown in FIG. 2, when the range in which the comparison operation of the voltage comparator circuit OP2 operates with desired accuracy is the range VH-VL with respect to the input voltage range VDD to Ov, when the voltage V
The digital values corresponding to H and VL are output to the second control circuit C0.
Stored in NT2.

In the embodiment circuit of FIG. 1, at the start of the A/D conversion operation, the analog switch SW1 is connected to the (b) side, and the input analog voltage Vin is directly transmitted to the voltage comparator circuit OP2. In this state, the A/D conversion operation described above is performed. With this conversion operation, the above voltage range VH ~
If it deviates from VL, the control circuit C0NT2 identifies this and switches to the next A/D conversion operation.

When the analog voltage Vin is higher than the voltage VH, the analog switch SWI is switched to the <a> side, and the analog switch SW2 is connected to the (a) side. As a result, the gain of the operational amplifier OP1 is set to 1/2, so that the input analog voltage Vi of the voltages VH to VDD is
As shown in FIG. 2, n is level-converted from V DD' to VH'.

That is, this level-converted voltage V DD ' corresponds to a voltage of VDD/2. Therefore, the voltage V DD '~V whose level has been converted in this way
H° can be kept within the operating voltage range VH-VL in the voltage comparison circuit OP2, and the A/D conversion operation can be performed with accuracy. Note that for the converted output of the analog voltage Vin° whose level has been converted in this way, since it is halved as described above, it is sufficient to obtain a digital value that is doubled. Specifically, the converted digital signal may be shifted and amplified by one pin point.

When the analog voltage Vln is lower than the voltage VL, the analog switch SW2 is switched to the (a) side and the analog switch SW2 is connected to the (b) side. Since the gain of the operational amplifier OPI is set to 4 times by this company, the level of the voltage VL to 0 is converted to the input analog voltage, VL' to Ov, as shown in FIG. In other words, this level-converted voltage VL''
corresponds to a voltage of 4vL. therefore,
Of the voltages VL' to O■ level-converted in this way, the voltages VL'' to VL can be kept within the operating voltage range VH-VL of the voltage comparator circuit OP2, and the accuracy is less than A/D conversion. The conversion output of the analog voltage Vln'' whose level has been converted in this way is multiplied by 4, so that
All you have to do is find the digital value of /4. in particular,
The converted digital signal may be shifted down by two bits.

As a result, VL is substantially lowered from the power supply voltage VDTl level to VL.
A/D conversion operation with high accuracy can be performed over a wide range up to /4.

FIG. 3 shows a block diagram of another embodiment of the invention.

Although not particularly limited, in this embodiment, a one-chip microcomputer M with a built-in A/D conversion circuit is used.
This invention is applied to C3. The microcomputer MC3 has one chip I, which is surrounded by a broken line in the figure.
The following circuits are configured in C.

The CPU is a microprocessor, and is comprised of an arithmetic section, a control section, and a register section. Since these details, configurations, and functions are well known, their explanations will be omitted.

The ROM is a read-only memory, and mainly has various control programs written therein. RAM is a random access memory and is primarily used to hold various data. Ilo is an input/output circuit. And A/D is an A/D conversion circuit.

Data is exchanged between each of the circuit blocks via an internal data bus BUS. Note that in the figure, the address bus and control signal lines are omitted and are shown as FM. Furthermore, in the level conversion circuit, the level inversion circuit is omitted from the illustration.

The A/D conversion circuit is composed of each circuit except the level conversion circuit shown in FIG.

In this embodiment, the level conversion circuit shown in FIG.
It is configured as an external circuit of the chip IC.

Further, the second control circuit C0NT2 is configured under program control of a microcomputer, and its control signal is outputted through the input/output circuit I10.

The A/D conversion operation of this embodiment circuit is the same as that of the embodiment circuit shown in FIG. 1 above, so a description thereof will be omitted.

According to the embodiment described above, it is possible to expand the input dynamic range while maintaining the desired A/D conversion accuracy as described above. In this case, since it can be operated with one power supply voltage without adding a special power supply voltage, the power supply device can be simplified, and
Semiconductor integrated circuits do not require additional external terminals, which reduces costs.

In addition, as in the embodiment shown in FIG. 3, by adding a relatively simple external circuit to a semiconductor integrated circuit device that incorporates an existing A/D conversion circuit, the input range can be increased. Expansion can be achieved.

Further, when performing level conversion as in the above embodiment, if the gain is set to an integer of 2n and its reciprocal, correction can be easily made by simply shifting the digit of the converted digital value by 7n bits.

Furthermore, the A/D conversion circuit built into a one-chip microcomputer utilizes its information processing function to perform successive approximation A/D conversion operations, the above-mentioned level detection operation, level conversion control, and correction operations. It has the advantage that it can be realized by microcomputer software.

This invention is not limited to the above embodiments.

In the example circuit shown in FIG. 1, an operational amplifier circuit for level inversion is provided on the input side of an operational amplifier circuit for level conversion, or the amount of level conversion is set by the combined gain of two operational amplifier circuits. It's okay.

Further, for example, as shown in FIG. 4, the level conversion operation may be realized by a level shift operation. That is, when the input address signal Vin deviates from the above voltage range VH to VL, from that input signal Vin,
Although not particularly limited, the intermediate voltage Voo/2 may be subtracted or added. In this case, the converted digital value may be corrected by subtracting or adding the digital value corresponding to VDD/2.

Furthermore, the specific circuit configuration and operation control method for realizing the above-described A/D conversion operation can take various embodiments.

This invention can be widely used as an A/D conversion circuit.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. 2nd FI! J is a diagram for explaining the principle of operation, 3rd Ff! J is a block diagram showing another embodiment of the present invention, and FIG. 4 is a diagram for explaining the operating principle of another embodiment of level conversion operation. opi, opi' - operational amplifier, OP2. Voltage comparison circuit, SWl, SW2...analog switch,
C0NTl, C0NT2- ・Control circuit, CPU...Microprocessor, A/D...A/D converter, Ilo...
・I/O circuit, ROM...read-only memory,
RAM, random access memory, BUS...
Data bus, MC3...→Irocomputer 1 Figure 4 Figure 2 Figure 1 (Figure 4 pD

Claims (1)

[Claims] A ladder resistance circuit that forms a 1.2nR divided voltage, an analog switch means that selectively outputs the 2n divided voltage, a level conversion circuit that selectively converts the level upon receiving the analog voltage, and this level conversion. a voltage comparator circuit that receives the analog voltage passed through the circuit and the 2n divided voltage passed through the analog switch means;
a first control circuit that controls the analog switch means so as to successively compare the divided voltage; and the level converter so that the input analog voltage is set within a voltage range in which the comparison operation of the voltage comparator circuit is performed with high precision. An A/D conversion circuit comprising: a second control circuit that controls a level conversion operation of the circuit. 2. The above level conversion circuit has a gain of 1, N and 1/
A according to claim 1, characterized in that it is constituted by an amplifier circuit that performs a variable gain operation of M.
/D conversion circuit. 3. The A/D conversion circuit according to claim 2, wherein the values of N and M are integers of 2n. 4. Each circuit constituting the A/D conversion circuit is built in an l-chip microcomputer, and the successive approximation sequential operation and gain setting operation are executed by a program of the microcomputer. An A/D conversion circuit according to claim 1, 2, or 3. 5. The A/D conversion circuit according to claim 4, wherein the level conversion circuit is constructed from an external circuit.