JPS62199859U - - Google Patents

Info

Publication number
JPS62199859U
JPS62199859U JP7562587U JP7562587U JPS62199859U JP S62199859 U JPS62199859 U JP S62199859U JP 7562587 U JP7562587 U JP 7562587U JP 7562587 U JP7562587 U JP 7562587U JP S62199859 U JPS62199859 U JP S62199859U
Authority
JP
Japan
Prior art keywords
address
relocated
virtual memory
partition
data set
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7562587U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7562587U priority Critical patent/JPS62199859U/ja
Publication of JPS62199859U publication Critical patent/JPS62199859U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のプログラム実行方式を示すフロ
ーチヤート、第2図は本考案の基本思想を示す概
念図、第3図はその再配置動作を示すフローチヤ
ート、第4図はページフアイルのデータセツト化
を示す図、第5図〜第8図は他の実施例を示すブ
ロツク図である。 図において、1,11,12はフアイル、2は
仮想記憶アドレス空間、21は仮想アドレス区画
、22は固定端、A〜Dはプログラムモジユール
、Ar〜Drは再配置されたプログラムモジユー
ルである。
Fig. 1 is a flowchart showing the conventional program execution method, Fig. 2 is a conceptual diagram showing the basic idea of the present invention, Fig. 3 is a flowchart showing the relocation operation, and Fig. 4 is a page file data set. FIGS. 5 to 8 are block diagrams showing other embodiments. In the figure, 1, 11, and 12 are files, 2 is a virtual memory address space, 21 is a virtual address partition, 22 is a fixed end, A to D are program modules, and Ar to Dr are rearranged program modules. .

Claims (1)

【実用新案登録請求の範囲】 仮想記憶アドレス空間を備えたシステムにおい
て、 そのアドレス区画の一端のアドレスを特定化し
て再配置すべきアドレスを固定してなる領域と、 そのアドレス区画に対応する仮想記憶データセ
ツトを、前以つて再配置した状態でフアイル上に
作成して成る領域とを有し、 前記の特定化アドレス区画に対応する仮想記憶
データセツト中のプログラムについて再配置処理
をすることなく迅速に実行できるようにしたこと
を特徴とするデータ処理装置。
[Claim for Utility Model Registration] In a system equipped with a virtual memory address space, an area in which an address at one end of the address partition is specified and an address to be relocated is fixed, and a virtual memory corresponding to the address partition. It has an area that is created on a file with the data set relocated in advance, and the program in the virtual memory data set corresponding to the specified address partition can be quickly relocated without having to perform relocation processing. 1. A data processing device characterized by being able to perform the following operations.
JP7562587U 1987-05-20 1987-05-20 Pending JPS62199859U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7562587U JPS62199859U (en) 1987-05-20 1987-05-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7562587U JPS62199859U (en) 1987-05-20 1987-05-20

Publications (1)

Publication Number Publication Date
JPS62199859U true JPS62199859U (en) 1987-12-19

Family

ID=30921945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7562587U Pending JPS62199859U (en) 1987-05-20 1987-05-20

Country Status (1)

Country Link
JP (1) JPS62199859U (en)

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