JPS5973790U - pattern output device - Google Patents

pattern output device

Info

Publication number
JPS5973790U
JPS5973790U JP16901082U JP16901082U JPS5973790U JP S5973790 U JPS5973790 U JP S5973790U JP 16901082 U JP16901082 U JP 16901082U JP 16901082 U JP16901082 U JP 16901082U JP S5973790 U JPS5973790 U JP S5973790U
Authority
JP
Japan
Prior art keywords
pattern
memory
output device
stored
pattern output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16901082U
Other languages
Japanese (ja)
Other versions
JPH048473Y2 (en
Inventor
大脇　修
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP16901082U priority Critical patent/JPS5973790U/en
Publication of JPS5973790U publication Critical patent/JPS5973790U/en
Application granted granted Critical
Publication of JPH048473Y2 publication Critical patent/JPH048473Y2/ja
Granted legal-status Critical Current

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  • Digital Computer Display Output (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例を示し、２はコードバッファ、３
はメモリである。The figure shows an embodiment of the present invention, where 2 is a code buffer, 3 is a code buffer, and 3 is a code buffer.
is memory.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 使用されるパターンが格納されるメモリと、前記使用さ
れるパターンに対応した文字コードと前記メモリに格納
されたパターンのアドレスとが格納されるコードバッフ
ァとを備え、入力される文字コードにより該メモリをア
クセスして文字コードに対応したパタ゛−ンを出力する
パターン出力装置において、前記メモリを書換え可能ど
し、該メモリに格納されるパターンを上位装置より転送
されて来るパターンに書換える書換え手段を設けたこと
を特徴とするパターン出力装置。The memory includes a memory in which a pattern to be used is stored, and a code buffer in which a character code corresponding to the pattern to be used and an address of the pattern stored in the memory are stored. The pattern output device accesses a character code and outputs a pattern corresponding to a character code, the memory being rewritable, and rewriting means for rewriting the pattern stored in the memory to a pattern transferred from a host device. A pattern output device characterized in that:
JP16901082U 1982-11-08 1982-11-08 pattern output device Granted JPS5973790U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16901082U JPS5973790U (en) 1982-11-08 1982-11-08 pattern output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16901082U JPS5973790U (en) 1982-11-08 1982-11-08 pattern output device

Publications (2)

Publication Number Publication Date
JPS5973790U true JPS5973790U (en) 1984-05-18
JPH048473Y2 JPH048473Y2 (en) 1992-03-03

Family

ID=30369333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16901082U Granted JPS5973790U (en) 1982-11-08 1982-11-08 pattern output device

Country Status (1)

Country Link
JP (1) JPS5973790U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5438726A (en) * 1977-09-01 1979-03-23 Mitsubishi Electric Corp Display unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5438726A (en) * 1977-09-01 1979-03-23 Mitsubishi Electric Corp Display unit

Also Published As

Publication number Publication date
JPH048473Y2 (en) 1992-03-03

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