JPS62199052A - Manufacture of mos type semiconductor device - Google Patents

Abstract

PURPOSE:To prevent external diffusion and to obtain a device having gate oxide films, whose defect occurring rate is decreased, by forming the first gate oxide film and a poly Si gate electrode having high impurity concentration, thereafter covering them with a non-added Si thin film, performing oxidation completely, and providing the second gate oxide film. CONSTITUTION:A P-type Si substrate 1 is isolated by SiO2 film 2. An SiO2 thin film 4 and poly Si 5, in which high concentration P is added, are overlapped. Patternings 4a and 5a are performed, and the surface is covered with non-added poly Si 6. Oxidation is performed completely, and SiO2 7 is obtained. The surface is covered with poly Si 8, and patternings 8a and 7a are performed. An N<+> diffused layer 10 is formed in an opening part. In this constitution, the second gate oxide film 7a is formed by the thermal oxidation of the non- added Si. Therefore, external diffusion of impurities from the lower poly Si gate electrode 5a to the active region in the substrate is suppressed. The specified value of the impurity concentration is kept especially at a region, where a channel region is formed. Highly stable characteristics are obtained with respect to a threshold voltage and the like.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is directed to an MO having a two-layer polysilicon gate electrode structure.
The present invention relates to a method of manufacturing an S-type semiconductor device, and particularly to a method of manufacturing a MOS-type semiconductor device that prevents autodoping of impurities of a first layer polysilicon gate electrode into a substrate.

[Conventional technology]

The conventional two-layer polysilicon gate electrode structure is extremely effective for high integration, and is therefore widely used in MOS-LSIs such as D-RAMs. In this MOS-LSI,
The first layer or second layer polysilicon gate electrode is doped with a high degree of impurity such as phosphorus (P) to provide conductivity. Further, the first and second gate oxide films on the active region of the substrate are formed by directly performing thermal growth oxidation treatment on the substrate. Furthermore, these gate oxide films are becoming thinner and thinner with the advent of VLSI, and in D-RAM in particular, it is necessary to maintain cell capacitance above a certain value for reasons such as preventing phantom errors caused by alpha rays. A thin oxide film is required.

[Problem that the invention seeks to solve]

However, the MOS-LS manufactured by the conventional manufacturing method described above
In I, when forming a second gate oxide film on the first layer polysilicon gate electrode and the active region of the substrate by thermal growth oxidation treatment, impurities doped from the first layer polysilicon gate electrode are removed from the substrate. is autodoped (out-diffused) into the active region of the active region. In particular, when out-diffusion occurs in a region where a channel is to be formed, there is a problem in that the threshold voltage vT of a MOS transistor fluctuates in the negative direction, and VT also varies, resulting in fluctuations in characteristics.

Further, as described above, each gate oxide film on the active color gamut is formed directly on the substrate by a thermal growth oxidation process. Since such a thermal oxide film contains oxide film defects due to impurities such as oxygen and carbon in the substrate, the film quality generally deteriorates. For this reason, especially the second gate oxide film is
When forming a gate oxide film of a transistor, a problem arises in that the dielectric strength voltage decreases. This problem of reduced breakdown voltage becomes increasingly serious as the gate oxide film becomes thinner and the electric field strength increases (Oki Electric R&D No. 1
No. 28 Vo1.52 N14 P, 65-72, Proceedings of the 29th Applied Physics Related Lectures 1a-Q-2P.

596).

Therefore, the present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a MOS type semiconductor device having a gate oxide film formed while preventing external diffusion and reducing the defect occurrence rate. do.

[Means for solving problems]

A method for manufacturing a MOS type semiconductor device according to the present invention includes groove turning a first oxide film and a first layer polysilicon film containing a high concentration of impurities, and forming a first gate oxide film and a first layer polysilicon film. After forming the gate electrode, a thin non-doped silicon film containing almost no impurities is formed on the entire surface of the substrate, and then the non-doped silicon film is completely oxidized by thermal growth oxidation treatment to become a second gate oxide film. This is done by modifying it to a second oxide film.

[For production]

As described above, according to the invention, since the second oxide film, which becomes the second gate oxide film, is formed by performing thermal growth oxidation treatment on a non-doped silicon film, it is possible to Out-diffusion of impurities into the active region is suppressed.

Further, since the second oxide film on the active region is formed by completely modifying a non-doped silicon film containing almost no impurities, the rate of occurrence of oxide film defects is sufficiently reduced.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on FIG. First, as shown in FIG. 2(a), a silicon nitride film (Si3
A thick field oxide film (Si(h)2 is formed on a P-type single silicon substrate (hereinafter referred to as substrate) 1 by a well-known selective oxidation method using N4) as a flit oxidation mask (not shown). Then, the raw surface of the substrate 1 is separated into an active region 3 and a field region 3a.Next, a silicon oxide film (Si2
0) is formed to a thickness of about 200 to 500A.

Next, as shown in FIG. 6(b), a first layer polysilicon film 5 of about 3000 to 5000A is deposited on the entire surface by a CVD process, and then, in order to make this first layer polysilicon film 5 conductive, 2×I Q”~1.2×10c
Impurities such as phosphorus (P) and arsenic (A8) at a high concentration such as In are doped using a thermal diffusion method or an ion implantation method. As shown in (e) of the same figure, the well-known IJ
First, the first layer polysilicon film 5 is selectively etched by plasma dry etching using a photolithography technique to form a first layer polysilicon gate electrode 5a.
Next, by removing the exposed portions of the first oxide film 4 using a hydrofluoric acid-based etching solution, the first gate oxide film 4 is removed.
form a.

Next, as shown in FIG. 3D, a non-doped silicon film 6 made of a non-doped polysilicon film is formed to a thickness of about 100 to 300 Å over the entire surface of the substrate using a low pressure CVD method. Note that at this time, low-temperature processing is performed so that the impurity doped in the first-layer Volish II conjugate electrode 5a is difficult to diffuse outward.

For example, when the impurity is phosphorus, the temperature is 500 to 600°C.

Further, the thickness of the non-doped silicon film 6 is set to be equal to or less than the thickness of the second oxide film 7 formed in the subsequent oxidation treatment.

As shown in this backward view ←, the non-doped silicon film 6 is completely oxidized by performing thermal growth oxidation treatment for about 60 minutes in a dry and wet oxygen atmosphere at about 800 to 1100°C. The second oxide film 7 is modified to be a silicon oxide film (SiO2) having a thickness of about 600 Å.

Then, as shown in FIG. 5(f), a second layer polysilicon film 8 is deposited on the entire surface with a density of 3000 to 5000 A by a CVD process, and then impurities such as phosphorus and arsenic are doped to a thickness of about 2 x 10 to 1.2 x 10 cm. to provide conductivity.

Furthermore, as shown in FIG. 2(2), first, parts of the second layer polysilicon film 8 including the area where the diffusion layer is to be formed are selectively removed by plasma dry etching to form the second layer polysilicon gate electrode. (or wiring layer) 8a is formed, and then the exposed portions of the second oxide film 7 are removed using a hydrofluoric acid-based etching solution to form a second gate oxide film (Si02) 7a.
a, and an opening 9 are formed. Thereafter, as shown in FIG. 5), a 9N type diffusion layer IO is formed by ion-implanting a highly concentrated impurity, for example, arsenic, into the opening 9.

In the figure, 11 and 12 indicate a transistor region and a canister region, respectively.

Thereafter, an intermediate insulating film, a metal groove for wiring, and a groove are formed using well-known techniques to complete a MOS type semiconductor device.

In the above embodiment, a non-doped polysilicon film is used as the non-doped silicon film 6, but an amorphous silicon film, an epitaxially grown single silicon film, or the like may also be used.

〔Effect of the invention〕

As explained in detail above, according to the present invention, the second oxide film, which becomes the second gate oxide film, is formed by subjecting a non-doped silicon film to thermal growth oxidation treatment and modifying it into an oxide film. Therefore, in this oxidation treatment, outward diffusion of impurities from the doped lower first layer polysilicon gate electrode to the active region of the substrate is suppressed. Therefore, since the impurity concentration is maintained at a predetermined value in the active region, especially in the region where the channel is to be formed, highly stable electrical characteristics such as threshold voltage can be obtained5. Since the oxide film is formed by modifying a non-doped silicon film into an oxide film, it is possible to suppress the influence of impurities contained in the substrate, unlike conventional oxide films formed by directly oxidizing the substrate. Therefore, a second gate oxide film containing almost no oxide film defects can be obtained, which also has the effect of improving dielectric breakdown voltage. FIG. 2 is a histogram showing a comparison of the breakdown voltage distribution of the second gate oxide film between the present invention and the prior art. As is clear from the figure, it can be seen that in the case of the present invention, characteristics of small variations and high breakdown voltage can be obtained.

As described above, the present invention realizes an improvement in the stability and yield of MOS type semiconductor devices as well as reliability, and thus has extremely high industrial utility value.

[Brief explanation of drawings]

Fig. 1 is a process sectional view explaining one embodiment of the present invention;
The figure is a comparative explanatory diagram of the present invention and a conventional example based on the breakdown voltage distribution of the second gate oxide film. l...Single silicon to plate <p type), 2...
Field oxide film (SiO2), 3... Active region, 3a... Field region, 4... First oxide film (Si02), 4a... First gate oxide film, 5...
1st layer polysilicon film, 5a... 1st layer polysilicon gate electrode, 6... non-doped silicon film (), undoped polysilicon film), 7... second oxide film (SiO
z), 7a... Second gate oxide film, 8... Second layer polysilicon film, 8a... Second layer polysilicon gate electrode, 9... Opening, 10... Diffusion layer ( N type). Patent Applicant: Oki Electric Industry Co., Ltd. Figure 1 8 Actual Record of Singing Da・115 Sun Souk i Liao Immediate 2 Cos Figure 1 tjW 'j'! , ML (Mv7cm)'IJ-! '
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Figure 2

Claims (1)

[Claims] (1) MOS with two-layer polysilicon gate electrode structure
In a method for manufacturing a type semiconductor device, (a) a first oxide film is formed on the main surface of a single silicon substrate selectively separated by a field region;
a step of depositing and forming a first layer polysilicon film; (b) sequentially patterning the first layer polysilicon film and the first oxide film to form a first layer polysilicon gate electrode and a first gate oxide film; (c) After that, a step of laminating a non-doped silicon film over the entire surface of the substrate; (d) A thermal growth oxidation treatment is applied to the non-doped silicon film to modify it into a second oxide film over the entire film thickness. (e) After this, a second layer polysilicon film is deposited and formed on the entire surface of the substrate, and then this second layer polysilicon film and the second oxide film are sequentially patterned to form a second layer.
1. A method for manufacturing a MOS type semiconductor device, comprising the steps of forming a layered polysilicon gate electrode and a second gate oxide film, respectively.