JP2008198786A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of suppressing the entry of a conductivity type impurity into the gate insulating film while carrying out the threshold value control by introducing the conductivity type impurity into the channel region. <P>SOLUTION: This manufacturing method of the semiconductor device comprises the steps of introducing the conductivity type impurity 19 into the surface layer of a semiconductor substrate 11 to be the channel region, forming a non-doped silicon film 20 on the surface layer of the semiconductor substrate 11 to be the channel region, forming the gate insulating film 20a consisting of a silicon oxide film, a silicon nitride film or a silicon oxynitride film by making at least any one of an oxygen containing gas or a nitrogen containing gas react with the non-doped silicon film 20 by heating them, and forming the gate electrode on the gate insulating film 20a. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device for forming a gate insulating film of an insulated gate field effect transistor.

  1A to 1D are cross-sectional views illustrating a method of forming a gate insulating film of an insulated gate field effect transistor according to a conventional example.

  In this method, as shown in FIG. 1A, insulating isolation regions 2a and 2b are formed in a semiconductor substrate 1, and thereafter, the sacrificial oxide film 3 is covered to cover the substrate surface exposed between the insulating isolation regions 2a and 2b. Form. Next, a mask 4 having an opening 4a in a region where a channel region is to be formed is formed using a resist film.

  Next, based on the mask 4, conductive impurities 5 are introduced into the surface layer of the semiconductor substrate 1 serving as a channel region through the opening 4a by ion implantation.

  Next, as shown in FIG. 1B, after removing the mask 4 and the sacrificial oxide film 3, a gate oxide film 6 is formed on the exposed surface of the semiconductor substrate 1 by thermal oxidation in a wet atmosphere (FIG. 1). (C)).

  Thereafter, a polysilicon film and an insulating film are formed on the gate oxide film 6 and then patterned to form a gate electrode 7 and a protective insulating film 8 as shown in FIG.

  Next, a low concentration source / drain region 9 is formed by ion implantation using the gate electrode 7 and the protective insulating film 8 as a mask. Further, sidewalls 10 are formed on both sides of the gate electrode 7 by anisotropic etching of the insulating film, and then high-concentration source / drain regions 11 are formed by ion implantation to complete an insulated gate field effect transistor.

As another method for forming a gate insulating film, Patent Document 1 discloses that an SOI (Silicon On Insulator) structure manufactured by bonding is used to oxidize a surface layer of a semiconductor layer to form a gate insulating film, and then control the Vth. An example in which conductive impurities are introduced into a semiconductor layer under a gate insulating film by ion implantation is disclosed. In Patent Document 2, a silicon epitaxial growth layer (low concentration layer) in which conductive impurities are introduced is formed on the surface of a silicon substrate having a (100) plane orientation. Thereafter, an example in which a gate insulating film having a predetermined thickness is formed on the surface layer by a rapid lamp heating (RTO) method is disclosed.
JP 2002-353424 A JP 2002-359293 A

  However, in the method of forming the gate insulating film shown in FIG. 1 according to the conventional example, since the conductivity type impurity 5 ion-implanted exists in the surface layer of the semiconductor substrate 1 before oxidation, the gate insulating film formed by wet oxidation. 6 may contain conductive impurity atoms. In this case, the thickness of the gate insulating film 6 is about several nm, that is, about several atomic layers when converted into a layer, and is extremely thin. If conductive type impurity atoms are contained in such a thin insulating film 6, there is a risk of an increase in leakage current flowing through the insulating film 6. Alternatively, such conductive impurity atoms may cause a reduction in dielectric breakdown of the gate insulating film 6. As a result, the performance and reliability of the semiconductor device may be significantly reduced.

  In Patent Documents 1 and 2, similarly, conductive impurity atoms may be taken into the gate insulating film, which may lead to the same result as described above.

  The present invention was created in view of such conventional problems, and it is possible to suppress the incorporation of conductive impurities into the gate insulating film while introducing threshold impurities by introducing conductive impurities into the channel region. An object of the present invention is to provide a method for manufacturing a semiconductor device.

  According to one aspect of the present invention, a step of introducing a conductive impurity into a surface layer of a semiconductor substrate to be a channel region, a step of forming a non-doped silicon film on the surface layer of the semiconductor substrate to be a channel region, Forming a gate insulating film made of a silicon oxide film, a silicon nitride film, or a silicon oxynitride film by reacting at least one of a gas and a nitrogen-containing gas with the non-doped silicon film by applying heat; and There is provided a method for manufacturing a semiconductor device, comprising: a step of forming a gate electrode on an insulating film; and a step of forming source / drain regions on both sides of the gate electrode.

  According to the method for manufacturing a semiconductor device of the present invention, a non-doped silicon film is formed on a surface layer of a semiconductor substrate serving as a channel region, and at least one of an oxygen-containing gas or a nitrogen-containing gas and the non-doped silicon film are heated. Since a gate insulating film made of a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed, even when conductive impurities are introduced into the surface layer of the semiconductor substrate that becomes the channel region, Since the surface layer of the semiconductor substrate serving as the channel region is not directly thermally oxidized, the amount of conductive impurities contained in the gate insulating film is extremely small.

  According to the method for manufacturing a semiconductor device of the present invention, it is possible to suppress an increase in leakage current flowing through the gate insulating film and to suppress a decrease in dielectric breakdown of the gate insulating film. As a result, the performance and reliability of the semiconductor device can be improved.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

  2 to 4 are cross-sectional views illustrating a method of forming a gate insulating film of an insulated gate field effect transistor according to an embodiment of the present invention.

  First, as shown in FIG. 2A, a silicon substrate (semiconductor substrate) 11 is prepared. As the silicon substrate 11, an epitaxial wafer, a single wafer, an SOI (Silicon On Insulator) substrate, or the like can be used. The silicon substrate 11 can be selected from an n-type, a p-type, or a non-doped type not doped with a conductive impurity depending on the application.

Next, as shown in FIG. 2B, the surface of the silicon substrate 11 is thermally oxidized at a temperature of 1000 ° C. in a wet atmosphere containing oxygen to form a silicon oxide film 12 having a thickness of 50 nm on the surface of the substrate 11. As the wet atmosphere containing oxygen, for example, one produced by blowing a gas containing oxygen (O ₂ itself or containing various oxygen compounds) into normal water or heated pure water (generated by bubbling oxygen) is used. The same applies hereinafter.

  Subsequently, a resist mask 13 having openings 13a and 13b in a region where an insulating isolation region is to be formed is formed by photolithography.

  Next, as shown in FIG. 2C, the silicon oxide film 12 is etched with a hydrofluoric acid solution through the openings 13a and 13b of the resist mask 13 to form the openings 12a and 12b.

Next, as shown in FIG. 2D, the resist mask 13 is removed by reacting with an organic solvent and further ashing. Subsequently, the silicon substrate 11 is subjected to reactive ion etching (RIE) through the openings 12a and 12b of the silicon oxide film 12 using a halogen-containing gas (CF ₄ + O ₂ or SiF ₄ + Cl ₂ ), and the depth is 0. .1 to 0.5 μm element isolation grooves 14a and 14b are formed.

  Next, as shown in FIG. 3A, a silicon oxide film 15 having a thickness of 0.5 to 1.0 μm is formed by CVD (Chemical Vapor Deposition), which is thicker than the depth of the element isolation grooves 14a and 14b. To do.

  Next, as shown in FIG. 3B, the surface of the silicon oxide film 15 is polished and planarized by CMP (Chemical Mechanical Polishing).

  Next, as shown in FIG. 3C, resist masks 16a and 16b are formed by photolithography so as to cover the silicon oxide films 15 on the element isolation grooves 14a and 14b, and then formed on the resist masks 16a and 16b. Based on this, the silicon oxide film 15 other than on the element isolation grooves 14a and 14b is selectively etched to form insulating isolation layers 15a and 15b on the element isolation grooves 14a and 14b.

  Next, as shown in FIG. 3D, after removing the resist masks 16a and 16b, the surface of the silicon substrate 11 is thermally oxidized at a temperature of 1000 ° C. in a wet atmosphere containing oxygen to form the insulating separation layers 15a and 15b. A silicon oxide film 17 having a thickness of 50 nm is formed on the surface of the substrate 11 exposed therebetween.

  Next, as shown in FIG. 4A, a resist mask 18 having an opening 18a in a region where a channel region is to be formed is formed by photolithography.

Next, based on the resist mask 18, the conductivity type impurity 19 is introduced into the surface layer of the semiconductor substrate 11 which becomes a channel region through the opening 18 a by ion implantation with a dose amount of about 5 × 10 ¹⁷ cm ⁻³ . This is to control the channel threshold. As the conductive impurity 19, boron (B) can be used in the case of p-type, and phosphorus (P), arsenic (As), or the like can be used in the case of n-type.

  Next, as shown in FIG. 4B, the resist mask 18 and the silicon oxide film 17 are removed by the same method as described above.

  Next, as shown in FIG. 4C, a single-crystal non-doped silicon film 20 having a film thickness of several nm is formed on the exposed surface of the silicon substrate 11 by epitaxial growth. The non-doped silicon film 20 grows only on the exposed silicon substrate 11 surface. As the epitaxial growth method, for example, an MBE (Molecular Beam Epitaxy) method is used. In the MBE method, with the substrate heated at a temperature of 1000 ° C., the crucible containing the silicon source is heated at 1200 ° C. to evaporate the silicon source, and the non-doped silicon film 20 is grown on the silicon substrate 11.

  Next, as shown in FIG. 4D, the non-doped silicon film 20 is thermally oxidized at a temperature of 900 to 1000 ° C. in a wet atmosphere containing oxygen to form a silicon oxide film over the entire thickness of the non-doped silicon film 20. . Thus, a gate insulating film 20a made of a silicon oxide film is formed on the surface of the silicon substrate 11.

  Thereafter, a polysilicon film and an insulating film are sequentially formed on the gate insulating film 20a, and then patterned to form a protective insulating film 22 and a gate electrode 21, as shown in FIG.

  Subsequently, using the gate electrode 21 and the protective insulating film 22 as a mask, low concentration source / drain regions 23 are formed in the silicon substrate 11 on both sides of the gate electrode 21 by ion implantation. Further, after an insulating film made of a silicon oxide film or a silicon nitride film is formed on the entire surface, it is anisotropically etched to form a sidewall 24 on the side wall of the gate electrode 21.

  Subsequently, ions are implanted using the protective insulating film 22, the gate electrode 21, and the sidewall 24 as a mask. As a result, a high concentration source / drain region 25 is formed on the silicon substrate 11 on both sides of the gate electrode 21 and outside the low concentration source / drain region 23, thereby completing an insulated gate field effect transistor.

  According to the method for manufacturing an insulated gate field effect transistor of the above-described embodiment, the non-doped silicon film 20 is formed on the surface layer of the silicon substrate 11 serving as the channel region, and the non-doped silicon film 20 is thermally oxidized, Since the gate insulating film 20a is formed, even when the conductive impurity 19 is introduced into the surface layer of the silicon substrate 11 serving as the channel region, the surface layer of the silicon substrate 11 serving as the channel region is not directly thermally oxidized. Therefore, the amount of conductive impurities taken into the formed gate insulating film 20a can be greatly suppressed.

  As a result, an increase in leakage current flowing through the gate insulating film 20a can be suppressed, and a decrease in dielectric breakdown of the gate insulating film 20a can be suppressed. As a result, the performance and reliability of the semiconductor device can be improved.

  As described above, the manufacturing method of the insulated gate field effect transistor of the present invention has been described in detail according to the embodiment. However, the scope of the present invention is not limited to the example specifically shown in the above embodiment, and the present invention Modifications of the above-described embodiment without departing from the gist of the present invention are included in the scope of the present invention.

  For example, although a silicon substrate is used as the semiconductor substrate 11, it is not limited to this. A semiconductor substrate made of a compound semiconductor may be used.

Further, in the step of FIG. 4C, the single crystal silicon film is formed using the epitaxial growth method as a method for forming the non-doped silicon film 20, but is not limited thereto. In addition, there are a CVD method and a sputtering method. Examples of the CVD method include MOCVD (Metal Organic Chemical Vapor Deposition) method and thermal CVD method. For example, in the thermal CVD method, a silicon substrate is heated to 500 to 600 ° C., SiH ₄ gas is brought into contact with the substrate surface and thermally decomposed to grow a silicon film. An amorphous silicon film or a polysilicon film may be formed as the non-doped silicon film 20 by using such a CVD method or a sputtering method. In this case, in the step of FIG. 4C, the non-doped silicon film is deposited on the insulating separation layers 15a and 15b, but thermal oxidation or the like may be performed as it is.

4D, a silicon oxide film 20a is formed by reacting a gas containing oxygen (O ₂ itself or containing various oxygen compounds) and the non-doped silicon film 20 by applying heat. However, a gas containing nitrogen (including N ₂ itself or various nitrogen compounds) and the non-doped silicon film 20 may be reacted by applying heat to form a silicon nitride film, or oxygen and nitrogen. A silicon oxynitride film may be formed by reacting a gas containing hydrogen with the non-doped silicon film 20 by applying heat.

  Further, although the silicon oxide film 20a is formed over the entire film thickness of the non-doped silicon film 20, a part of the film thickness of the non-doped silicon film 20 may be changed to a silicon oxide film.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Additional remark 1) The process of introduce | transducing a conductivity type impurity into the surface layer of the semiconductor substrate used as a channel region,
Forming a non-doped silicon film on the surface layer of the semiconductor substrate to be the channel region;
A step of reacting at least one of an oxygen-containing gas or a nitrogen-containing gas with the non-doped silicon film by applying heat to form a gate insulating film made of a silicon oxide film, a silicon nitride film, or a silicon oxynitride film;
Forming a gate electrode on the gate insulating film;
Forming a source / drain region on both sides of the gate electrode.

  (Additional remark 2) The manufacturing method of the semiconductor device of Additional remark 1 characterized by forming a silicon oxide film, a silicon nitride film, or a silicon oxynitride film over the whole film thickness of the said non-doped silicon film.

  (Supplementary note 3) The method of manufacturing a semiconductor device according to supplementary note 2, wherein the non-doped silicon film is formed by an epitaxial growth method.

  (Additional remark 4) The said epitaxial growth method is a molecular beam epitaxy method, The manufacturing method of the semiconductor device of Additional remark 3 characterized by the above-mentioned.

  (Additional remark 5) The said non-doped silicon film is a single crystal silicon film, The manufacturing method of the semiconductor device of Additional remark 4 characterized by the above-mentioned.

  (Appendix 6) The method for manufacturing a semiconductor device according to any one of Appendix 1 or 2, wherein the non-doped silicon film is formed by chemical vapor deposition or sputtering.

  (Supplementary note 7) The method of manufacturing a semiconductor device according to supplementary note 6, wherein the chemical vapor deposition method is a metal organic chemical vapor deposition method.

  (Supplementary note 8) The method for manufacturing a semiconductor device according to any one of supplementary notes 6 and 7, wherein the non-doped silicon film is an amorphous silicon film or a polycrystalline silicon film.

1A to 1D are cross-sectional views showing a method for manufacturing an insulated gate field effect transistor according to a conventional example. 2A to 2D are sectional views (No. 1) showing a method for manufacturing an insulated gate field effect transistor according to the embodiment of the present invention. FIGS. 3A to 3D are sectional views (No. 2) showing the method for manufacturing the insulated gate field effect transistor according to the embodiment of the present invention. 4A to 4D are cross-sectional views (part 3) showing the method for manufacturing the insulated gate field effect transistor according to the embodiment of the present invention. FIG. 5 is a sectional view (No. 4) showing the method for manufacturing the insulated gate field effect transistor according to the embodiment of the present invention.

Explanation of symbols

11 ... Semiconductor substrate,
12, 17 ... silicon oxide film,
13, 16a, 16b, 18 ... mask,
13a, 13b ... opening,
14a, 14b ... element isolation grooves,
15a, 15b ... insulating separation layers,
19 ... conductive impurities,
20 ... non-doped silicon film,
20a ... gate insulating film,
21 ... Gate electrode,
22 ... Protective insulating film,
23 ... Low concentration source / drain region,
24 ... side wall,
25: High concentration source / drain region.

Claims (5)

Introducing a conductive impurity into a surface layer of a semiconductor substrate to be a channel region;
Forming a non-doped silicon film on the surface layer of the semiconductor substrate to be the channel region;
A step of reacting at least one of an oxygen-containing gas or a nitrogen-containing gas with the non-doped silicon film by applying heat to form a gate insulating film made of a silicon oxide film, a silicon nitride film, or a silicon oxynitride film;
Forming a gate electrode on the gate insulating film;
And a step of forming source / drain regions on both sides of the gate electrode.   2. The method of manufacturing a semiconductor device according to claim 1, wherein a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over the entire thickness of the non-doped silicon film.   The method of manufacturing a semiconductor device according to claim 1, wherein the non-doped silicon film is formed by an epitaxial growth method.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the non-doped silicon film is a single crystal silicon film.   The method of manufacturing a semiconductor device according to claim 1, wherein the non-doped silicon film is formed by chemical vapor deposition or sputtering.

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