JPS62187336U - - Google Patents

Info

Publication number
JPS62187336U
JPS62187336U JP7384586U JP7384586U JPS62187336U JP S62187336 U JPS62187336 U JP S62187336U JP 7384586 U JP7384586 U JP 7384586U JP 7384586 U JP7384586 U JP 7384586U JP S62187336 U JPS62187336 U JP S62187336U
Authority
JP
Japan
Prior art keywords
clock
circuit
time constant
reset signal
reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7384586U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7384586U priority Critical patent/JPS62187336U/ja
Publication of JPS62187336U publication Critical patent/JPS62187336U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のリセツト回路に係る一実施例
を示す回路図、第2図は第1図に示す実施例の動
作を説明する波形図、第3図は従来のリセツト回
路を示す回路図、第4図は第3図の動作を説明す
る波形図である。 11……電源、12……発振回路、13……マ
イクロプロセツサ、14……リセツト回路。
Fig. 1 is a circuit diagram showing an embodiment of the reset circuit of the present invention, Fig. 2 is a waveform diagram explaining the operation of the embodiment shown in Fig. 1, and Fig. 3 is a circuit diagram showing a conventional reset circuit. , FIG. 4 is a waveform diagram illustrating the operation of FIG. 3. 11...power supply, 12...oscillation circuit, 13...microprocessor, 14...reset circuit.

Claims (1)

【実用新案登録請求の範囲】 動作基準を規定する基本クロツクの振幅レベル
に応じて該クロツクを平滑し、該クロツクが安定
に供給されていることを検出するクロツク検出回
路と、 このクロツク検出手段からの検出出力の後、所
定の時定数でリセツト信号を出力する時定数回路
とを具備したことを特徴とするリセツト回路。
[Claims for Utility Model Registration] A clock detection circuit that smoothes the basic clock according to the amplitude level of the basic clock that defines the operating standard and detects that the clock is stably supplied; 1. A reset circuit comprising: a time constant circuit that outputs a reset signal at a predetermined time constant after the detection output of the reset signal.
JP7384586U 1986-05-19 1986-05-19 Pending JPS62187336U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7384586U JPS62187336U (en) 1986-05-19 1986-05-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7384586U JPS62187336U (en) 1986-05-19 1986-05-19

Publications (1)

Publication Number Publication Date
JPS62187336U true JPS62187336U (en) 1987-11-28

Family

ID=30918532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7384586U Pending JPS62187336U (en) 1986-05-19 1986-05-19

Country Status (1)

Country Link
JP (1) JPS62187336U (en)

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