JPS6160534U - - Google Patents
Info
- Publication number
- JPS6160534U JPS6160534U JP12385184U JP12385184U JPS6160534U JP S6160534 U JPS6160534 U JP S6160534U JP 12385184 U JP12385184 U JP 12385184U JP 12385184 U JP12385184 U JP 12385184U JP S6160534 U JPS6160534 U JP S6160534U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- comparator
- reset
- circuit
- divider circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案の実施例の構成説明図、第２図
は実施例の動作波形図、第３図は従来例の構成説
明図、第４図は従来例の動作波形図であり、図中
１は分圧回路、２は比較器、３は定電圧源、４は
コンデンサ、５はインバータ、１１は抵抗を示す
。
FIG. 1 is an explanatory diagram of the configuration of the embodiment of the present invention, FIG. 2 is an operational waveform diagram of the embodiment, FIG. 3 is an explanatory diagram of the configuration of the conventional example, and FIG. 4 is an operational waveform diagram of the conventional example. 1 is a voltage dividing circuit, 2 is a comparator, 3 is a constant voltage source, 4 is a capacitor, 5 is an inverter, and 11 is a resistor.
Claims (1)
器に入れ、電源瞬断に伴なう電圧降下に対応して
設定された閾値と比較し、該閾値以下になつた時
比較器の出力側に接続されたコンデンサを通して
接地してリセツトパルスを発生するリセツト回路
において、前記分圧回路とコンデンサとを共通に
した接地側に挿入され、前記リセツトパルス時間
幅を所定時間以上に設定する抵抗を設けたことを
特徴とするリセツト回路。 A predetermined voltage obtained by dividing the power supply voltage using a voltage divider circuit is input into a comparator, and compared with a threshold set to correspond to the voltage drop caused by a momentary power interruption, and when the voltage falls below the threshold, the output of the comparator is In a reset circuit that generates a reset pulse by grounding it through a capacitor connected to the ground, a resistor is inserted on the ground side that shares the voltage divider circuit and the capacitor, and sets the reset pulse time width to a predetermined time or more. A reset circuit is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12385184U JPS6160534U (en) | 1984-08-13 | 1984-08-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12385184U JPS6160534U (en) | 1984-08-13 | 1984-08-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6160534U true JPS6160534U (en) | 1986-04-23 |
Family
ID=30682585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12385184U Pending JPS6160534U (en) | 1984-08-13 | 1984-08-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6160534U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0368394U (en) * | 1989-11-09 | 1991-07-04 |
-
1984
- 1984-08-13 JP JP12385184U patent/JPS6160534U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0368394U (en) * | 1989-11-09 | 1991-07-04 |
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