JPS62183207A - Variable gain amplifier - Google Patents

Abstract

PURPOSE:To eliminate an output DC level with a variable gain by connecting collectors of transistors (TRs) having the same current division ratio but opposite phase in 2 sets of differential pairs so as to add a current to the collectors of the TRs having a load resistor. CONSTITUTION:The TRs having the same current division ratio of 2 sets of differential TR pairs controlling the current division ratio of signal currents being in phase and in opposite phase to an input signal are divided into two TRs having a base and an emitter in common, the collectors of the TRs in phase and in opposite phase to the divided TRs are connected and the connected point is connected to collectors of the TRs of the different current ratio so as to cancel the inverting/noninverting complementary AC signal and the result is added to a DC current of the TRs of the different current division ratio. That is, TRs 3, 8 are connected in common to a terminal VAGC in the 2nd and 3rd TRs controlling the gain and TRs 4, 5, 6, 7 are connected in common to a terminal Vref thereby sharing respective bases and emitters in common.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a variable gain amplifier used for communication and consumer use, and more particularly to a variable gain amplifier capable of directly coupling multi-stage amplifiers.

[Conventional technology]

Optical communications require amplifiers with high gain and wide variable gain range. For this reason, multiple stages of amplifiers are directly coupled to obtain a high gain and a wide variable gain range, but in this case, stabilizing the output DC level of each stage is an important technical issue. FIG. 2 shows a conventional example of a typical variable gain amplifier proposed for reducing DC level fluctuations. (Unexamined Japanese Patent Publication No. 59-62
Publication No. 314).

This circuit is based on a differential amplifier composed of transistors 1 and 2, resistors 9 to 12, and a constant current source 20. Gain control is performed by controlling currents 11 . Iz as transistor pairs 3, 4 and 7,
The base DC voltage VAac of two differential pairs consisting of
, by controlling Vren. In addition, the output signals V out and V out are connected to the resistor 9
, 10 as a load. At this time, the resistor 13 converts the current supplied from the transistors 4 and 7 whose split ratio changes by the control voltage of the base DC voltage VAac+Vrec into a voltage, and reduces the output DC level by passing it through the isolation transistor 14. It is something.

[Problem that the invention seeks to solve]

In FIG. 2, if the current shunt ratio is R, the resistor 13 is R, the resistor 10 is RQ, and the voltage between the base and emitter of the transistor 14 is V be , then the output voltage Vout.

Vout is, where Ix+Iz=2Io, RM:RR/2, Iz=
IO + ΔIs, l2 = Io - Δ■S (ΔIs is the signal)
Then, Equation (1) becomes as follows, and the main cause of variation in the output DC level is only the current dependence of the pace-emitter voltage Vbe of the transistor 14. However, the current flowing through the transistor 14 is 0 to 2I.
For example, the gain variable width is 28d 11
In this case, the output DC level fluctuation was 100 mV, and the problem of saturation could not be avoided when directly connecting the next stage booster.

It is an object of the present invention to completely eliminate this inherently occurring variation in output DC level.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention provides collectors of transistors that are in opposite phases at the same dividing ratio among two pairs of differential m pairs that respectively control the dividing ratios of signal currents that are in-phase and opposite-phase to the input signal. The output DC level is eliminated when the gain is varied by connecting the transistors and adding current to the collector portions of transistors 1 to 1 with load resistances.

[Effect]

In the present invention, among two pairs of differential transistors that respectively control the shunt ratio of signal currents in the same phase and opposite phase to the input signal, transistors with the same shunt ratio are used as two 1-transistors that share a base and an emitter. By connecting the collectors of the in-phase and anti-phase transistors among the divided transistors and connecting them to the collectors of the transistors with different shunt ratios, the in-phase and anti-phase complementary AC signals can be canceled out to create different shunt ratios. By adding this to the DC current of the transistor, the output DC level is fixed by keeping the DC current flowing through the load resistor constant even when the gain changes, that is, even when the shunt ratio changes.

〔Example〕

The present invention will be explained below with reference to Examples. FIG. 1 shows the basic configuration of a variable gain amplifier according to the present invention.

In FIG. 1, the second. Of the third transistor pair, transistors 3 and 8 are commonly connected to the terminal VAGC, and transistors 4, 5, and 6°7 are connected to the terminal Vre.
z, and their respective bases and emitters are shared. Next, the principle of fixing the output DC level will be explained. In FIG. 1, 2Io=1! Assuming that the shunt ratio is K, the current flowing through transistor 8 is 1
1. The current flowing through the transistor 3 is K I x, and the output voltage Vouts Vout from the transistors 4 and 5 is as follows (3).

Here, if Is'':Io+ΔIs, Iz=Io−ΔIs, then the output DC level does not depend on the shunt ratio, so the output DC level is fixed when the gain changes.

FIG. 3 shows another embodiment according to the present invention. Zunaka, 1-
The reference numeral 12 is the same as in FIG. 1, but the transistor 15
, 1.6 is added. transistor 1
5.16 is cascode-connected as a common base stage to the collector portions of the second and third transistor pairs that control the gain, so the amplifier loads are resistor 9 and transistor 15, and resistor 10 and transistor 16. It becomes an active load. Therefore, when three transistors 3 and 4.5 are connected to the load resistor 9 as in the case of Fig. 1, the capacitance of the three transistors (base-collector capacitance, collector-substrate capacitance) However, in the case of FIG. 3, since only one transistor 15 is connected to the load resistor 9, wide band characteristics can be expected. The effect regarding the output DC level fluctuation is expressed by equation (4) in exactly the same way as in the case of FIG.

〔Effect of the invention〕

According to the present invention, the output DC level of the variable gain amplifier is
Since there is no change at all even when the gain changes, saturation of the next stage amplifier can be prevented, making it possible to construct a multistage direct-coupled amplifier suitable for DC transmission.

[Brief explanation of drawings]

FIG. 1 is a basic circuit configuration diagram according to an embodiment of the present invention, and FIG.
This figure is a circuit configuration diagram of the prior art, and FIG. 3 is a circuit configuration diagram according to another embodiment of the present invention. 1-8.14-16...transistor, 9-13...
・Resistance, 20...constant current source.

Claims (1)

[Claims] 1. A first differential transistor pair whose current changes depending on the input signal voltage, and second and third transistors connected in cascode to the contactor section of this transistor pair to control the current flowing through this transistor pair. and a variable gain amplifier that outputs a signal from a load resistor connected to the collector of each differential pair of the second and third transistor pairs, A variable gain amplifier characterized in that the collectors of the transistors other than those forming the differential pair sharing a base and emitter are connected to the collectors of the third and second differential pairs, respectively.