JPH01125010A - Variable gain amplifier - Google Patents

Abstract

PURPOSE:To reduce the fluctuation quantity of an output working point voltage even if a current distribution rate is varied by controlling the gain by raising the base voltage when a base - emitter voltage of an output transistor is high, and lowering the base voltage when the base - emitter voltage is low. CONSTITUTION:As for transistor 16, its emitter is connected to collectors of transistors 4, 5, and its base and collector are connected to the base of a transistor 7. Also, a resistance 14 and 15 form a resistance series circuit, and its one end and the other end are connected to the base of the transistor 7 and the collector of the transistor 7, respectively. As for the transistor 17, its emitter, collector and base are connected to the emitter of the transistor 16, a mutual junction point of the resistance 14, 15 and the base of the transistor 16, respectively. The fluctuation quantity Vout of an output working point voltage when a current distribution rate (m) is varied is only about 24[mV], and extremely small.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a DC-coupled variable gain amplifier that provides a constant output bias regardless of the gain.

[Conventional technology]

Figure 3 shows, for example, IEICE Technical Report Vol. 1.83 No. 279.
FIG. 2 is a circuit diagram of a conventional variable gain amplifier described in "C583-175r 400 Mb/s Integrated Submarine Optical Repeater Prototype." In the figure, the emitter of transistor (1) and transistor (2) forming a differential pair of transistors are shown.
) are connected to each other through a series connection circuit of resistors (9) and (1o), while the base of the transistor (1) is connected to the positive phase signal input terminal (21), and the emitter of the transistor (
The bases of 2) are respectively connected to the negative phase signal input terminals,
Furthermore, a constant current source (8) is inserted between the mutual junction point of the resistors (9) and (10) and the negative power supply terminal (23).

In addition, the transistors (3
) and the emitter of the transistor (4) are connected to each other and to the collector of the transistor (1), and the emitter of the transistor (5) and the transistor forming another transistor differential pair are connected to each other and to the collector of the transistor (1). (6)
The emitters of the transistor (2) are connected to each other, and the collector of the transistor (2) is connected to the collector of the transistor (2).
3) and the base of transistor (6) are connected to the gain control reference voltage terminal (19), and the base of transistor (4) and the base of transistor (5) are connected to the gain control voltage terminal (2).
0) respectively. Also, the transistor (
The collector of transistor (3) and the collector of transistor (6) are connected to the emitter of transistor (7) via load resistors (11) and (12), respectively, and the collector of this transistor is connected to the positive power supply terminal (18). There is. Also,
The base of this transistor is connected to the collector of the transistor (4) and the collector of the transistor (5), and is also connected to the positive power supply terminal (18) via a resistor (13). On the other hand, the collector of the transistor (6) is connected to the positive phase signal output terminal (24), and the collector of the transistor (3) is connected to the negative phase signal output terminal.

Next, the operation of the conventional variable gain amplifier shown in FIG. 3 will be explained. When a voltage difference appears between the positive phase signal input terminal (21) and the negative phase signal input terminal (22), the balance of the current flowing through the transistors (1) and (2) is disrupted, and the load resistance (11), (12) The current flowing through changes, and voltages associated with the values of the load resistors (11) and (12) and the flowing current appear at the signal output terminals (24) and (25).

This means that if a voltage of "Vin" is applied to the positive-phase signal input terminal (21) and a voltage of "Vin" is applied to the negative-phase signal input terminal (22), the difference between the negative-phase input voltage and the positive-phase input voltage is (Vin--Vi
n''), and if the current value flowing through the collector of transistor (2) is i, then l= g m(vin--Van'')
It is represented by use (1).

In the above equation (1), g is a constant that converts the input voltage difference of the differential amplifier into a current, and is a constant for converting the input voltage difference of the differential amplifier into a current, and
), a resistor (9) inserted between the emitters of (2),
Letting the resistance value of (lO) be RL, gl is expressed as. Here, g. is the mutual conductance of transistors (1) and (2).

If the output voltage due to the input voltage difference of the positive phase signal output terminal (24) is ΔVOut, ΔVOut is the product of the current value i flowing from the input voltage difference and the value RL of the load resistance (12). In the circuit, transistor differential pairs (3), (4) and (5), which perform current distribution by gain control voltage, are used.
The current flowing through the load resistor (12) is arbitrarily determined by (6). Here, the current distribution ratio for distributing the current is m,
If the current flowing through the load resistance (12) is (1-m)i, then ΔVQut ``RL(1-m)t ''''(
3) Substituting equation (1), ΔV out ” RL (1-m) g 5 (Vin
--Vin") (4), and the gain G of the variable gain amplifier shown in FIG. 3 is as follows: G=RL(1-m)g--(5).

From the above equation (5), it functions as a variable gain amplifier by adjusting the gain control voltage terminal (2o), that is, by changing the value of the current distribution ratio m.

Next, how to determine the output operating point voltage V. Think about whether ut is determined. The values of load resistances (11) and (12) are RL
, the current value flowing through transistors (3) and (6) is Il
, the value of the current flowing through transistors (4) and (5)! 2
,■.

Let the sum of
RLI 2+RL r l” Vat+y+ ” (6
) Here I, +I, xi, so ■. ut” RL I + V BE (?)
...(7) If I+-(in)I, then -m) ...(9).

Although it is a constant, VTlrl (1-m) is a variable depending on m. In other words, it can be seen that the output operating point voltage clearly changes due to gain control.

The amount of variation in VOut in a typical transistor in an integrated circuit is about 100 to 200 ffiv.

[Problem that the invention seeks to solve]

As mentioned above, in conventional variable gain amplifiers, the current distribution ratio changes due to gain control, which causes the output operating point voltage to fluctuate greatly, making it difficult to design the next stage circuit by direct connection. .

This invention was made in order to solve the above problems, and it is possible to significantly suppress the amount of variation in the output operating point voltage due to gain control, thereby facilitating the design of the next stage circuit by direct connection. The purpose is to obtain a variable gain amplifier that can be used.

[Means for solving problems]

In the variable gain amplifier according to the present invention, the first and second transistors form a transistor differential pair, and the third and fourth transistors form the transistor differential pair.
to the collector of the first transistor through the resistor of the fifth transistor.
and a sixth transistor are respectively connected to the collectors of the second transistors via the second resistors, and further, currents flowing through the third and sixth transistors and currents flowing through the fourth and fifth transistors are connected to the collectors of the second transistors through the second resistors. When the distribution ratio with the current flowing through the transistor 's7 is determined by the transistor 's7, the emitter is connected to the collectors of the fourth and fifth transistors, and the base and collector are connected to the eighth transistor and the collector of the seventh transistor. , forming a resistor series circuit, with one end connected to the base of the transistor 347, the other end connected to the collector of the seventh transistor, and the emitter connected to the emitter of the eighth transistor, the collector is provided at the mutual junction of the third and fourth resistors, and a ninth transistor whose base is connected to the base of the eighth transistor, respectively.

[Operation] In this invention, the circuit formed by the eighth and ninth transistors and the third and fourth resistors increases the base-emitter voltage of the seventh transistor due to fluctuations in amplification gain. When the voltage between the base and emitter of the seventh transistor decreases, the base potential of the seventh transistor is raised, and the base potential of the seventh transistor is lowered, thereby stabilizing the output operating point voltage. be able to.

〔Example〕

FIG. 1 is a circuit diagram of an embodiment of the present invention, and in the figure, the same reference numerals as in FIG. 3 indicate the same elements. Then, remove the resistor (13) in Figure 3,
Instead of this, the emitter is a transistor (4), (5)
A transistor (1) whose base and collector are connected to the base of the transistor (7) is connected to the collector of the transistor (7).
6), and resistors (14) and (15) forming a resistor series circuit, one end of which is connected to the base of the transistor (7) and the other end connected to the collector of the transistor (7);
A transistor (17) is provided whose emitter is connected to the emitter of the transistor (16), whose collector is connected to the mutual junction of the resistors (14) and (15), and whose base is connected to the base of the transistor (16).

The operation of this embodiment configured as described above will be explained below, focusing on the parts that are different in configuration from FIG. 3.

Here, the output operating point voltage V. The calculation of ut is as follows. The current values flowing through transistors (3) and (6), respectively, are I1, and transistors (4), (5), (16),
The current value flowing through the collector of (17) is 12.11 and 12
The sum of the load resistances (11) and (12) is RL.
, the resistance value of the resistor (14) is R1%, the resistance value of the resistor (15) is R2, the sum of R and R2 is R1, the current distribution ratio is m, and the base-emitter voltage of the transistor (7) is %.
V BE (assuming 71, V6ut=R1212+R21* +Vmt(t)+R
,I.

Tomi RI It +R112+R2I2 +RL I
l+ V atty+ ... (10) Here, R, +R2 = R, so Vout = R, I 2 +RL I, +RL 1
1 +V! IE17)
eII・(11) Also I + + I 2−
Since I, VOut = RLI +VB! (71+
Rt I 2 ... (12) Using the current distribution ratio, I
l, I 2 is represented by I, I r = (1-m)
If I 2 mI, then R, mI - m ) + mR11 (14).

@ v ding IN (1-m
) and mR,I are variables of m and are proportional to m.

Further, since m≦1, VTl, (1-m) shows a negative value, and IIIRlI shows a positive value. In other words, since they cancel each other out, fluctuations in the output operating point voltage are significantly reduced.

Figure 2 is a plot of the results obtained by measuring the output operating point voltage V Out when changing the current distribution ratio m in this example.
), I S =4.76X10-17(A), V-cho!
25x to-' (V), RL, -470 (Q,)
, ftl -70 [Ω], the variation amount VOut of the output operating point voltage is only about 24 (mV), which is 174 to l/, compared to the conventional one.

In the above embodiment, the case where an NPN transistor is used has been described, but even if a PNP transistor is used, the same operation as described above can be performed.

(Effects of the Invention) As is clear from the above description, according to the present invention, when the base-emitter voltage of the seventh transistor is large due to the eighth and ninth transistors and the third and fourth resistors, The base potential is raised, and when the base-emitter voltage is small, the base potential is lowered.
Even if the current distribution ratio changes due to gain control, the amount of variation in the output operating point voltage can be significantly reduced, and this has the excellent effect of facilitating the design of the next stage circuit by direct connection.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG.
The figure is a diagram showing the relationship between the current distribution ratio and the output operating point voltage in order to explain the operation of the same embodiment, and FIG. 3 is a circuit diagram showing the configuration of a conventional variable gain amplifier. 5 (1) to (7), (16), (17): Transistor (8): Constant current source (9) to (15): Resistor (18): Positive power supply terminal (19): Gain control reference voltage terminal (20): Gain control terminal (21): Positive phase signal input terminal (22): Negative phase signal input terminal (23): Negative power supply terminal (24): Positive phase signal output terminal (25): Negative phase signal output terminal In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] first and second transistors whose emitters are commonly connected to one end of the DC power supply; third and fourth transistors whose emitters are commonly connected to the collector of the first transistor; and whose emitters are connected to the collector of the first transistor. a first resistor having one end connected to the collector of the fifth transistor; and a second resistor having one end connected to the collector of the sixth transistor. a seventh transistor whose emitter is connected to the other ends of the first and second resistors and whose collector is connected to the other end of the DC power supply; and a seventh transistor whose emitter is connected to the other end of the fourth and fifth transistors. A resistor series circuit is formed with an eighth transistor whose base and collector are connected to the base of the seventh transistor, one end of which is connected to the base of the seventh transistor, and the other end of which is connected to the base of the seventh transistor. third and fourth resistors connected to the other end of the seventh transistor; an emitter connected to the emitter of the eighth transistor; a collector connected to the mutual junction of the third and fourth resistors; and a base connected to the third and fourth resistors. Said 8th
a ninth transistor connected to the bases of the first and second transistors, respectively, with positive phase and negative phase voltages applied to the bases of the first and second transistors, respectively, and referenced to the bases of the third and sixth transistors; A variable gain characterized in that a gain control voltage is applied to the bases of the fourth and fifth transistors, and positive-phase and negative-phase voltages are taken out from the collectors of the third and sixth transistors, respectively. amplifier.