JPS62183139A - Manufacture of substrate for formation of semiconductor device - Google Patents
Manufacture of substrate for formation of semiconductor deviceInfo
- Publication number
- JPS62183139A JPS62183139A JP2515786A JP2515786A JPS62183139A JP S62183139 A JPS62183139 A JP S62183139A JP 2515786 A JP2515786 A JP 2515786A JP 2515786 A JP2515786 A JP 2515786A JP S62183139 A JPS62183139 A JP S62183139A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- oxide film
- field oxide
- oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 53
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 230000015572 biosynthetic process Effects 0.000 title description 12
- 230000003647 oxidation Effects 0.000 claims abstract description 28
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 28
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims abstract description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 16
- 230000001590 oxidative effect Effects 0.000 claims abstract description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 11
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 10
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000010030 laminating Methods 0.000 claims abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 229910052681 coesite Inorganic materials 0.000 abstract description 8
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 8
- 229910052682 stishovite Inorganic materials 0.000 abstract description 8
- 229910052905 tridymite Inorganic materials 0.000 abstract description 8
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 abstract description 3
- 239000002253 acid Substances 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract description 2
- 238000001312 dry etching Methods 0.000 abstract description 2
- 229920005591 polysilicon Polymers 0.000 abstract 2
- 210000003323 beak Anatomy 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 241000293849 Cordylanthus Species 0.000 description 14
- 230000015556 catabolic process Effects 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 235000002595 Solanum tuberosum Nutrition 0.000 description 1
- 244000061456 Solanum tuberosum Species 0.000 description 1
- 230000035987 intoxication Effects 0.000 description 1
- 231100000566 intoxication Toxicity 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
半導体素子形成用基板の製造方法であって、Si基板に
SiO2膜、ポリSi膜、所定のパターンにパターンニ
ングされた耐酸化性膜を積層形成して基板を酸化してフ
ィールド酸化膜を形成することで、形成されるフィール
ド酸化膜にバーズビークを発生せず、かつフィールド酸
化膜で画定される素子形成領域上に形成されるゲート酸
化膜の耐圧低下が起きないようにした半導体素子形成用
基板の製造方法。[Detailed Description of the Invention] [Summary] A method for manufacturing a substrate for forming a semiconductor element, which comprises laminating a SiO2 film, a poly-Si film, and an oxidation-resistant film patterned in a predetermined pattern on a Si substrate. By oxidizing the field oxide film to form a field oxide film, bird's beaks do not occur in the field oxide film, and the withstand voltage of the gate oxide film formed on the element formation area defined by the field oxide film decreases. A method of manufacturing a substrate for forming a semiconductor element in which the formation of a semiconductor element is avoided.
本発明は半導体装置の製造方法に係り、特にバーズビー
クを発生しないフィールド酸化膜を有し、かつフィール
ド酸化膜で画定された領域に形成されるゲート酸化膜が
耐圧低下をきたさないようにした半導体素子形成用基板
の製造方法に関する。The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a semiconductor device having a field oxide film that does not generate bird's beak and preventing a gate oxide film formed in a region defined by the field oxide film from causing a drop in breakdown voltage. The present invention relates to a method for manufacturing a forming substrate.
IC等の半導体装置を形成する際、Si基板に素子間分
離用のフィールド酸化膜を形成し、この素子間分離用酸
化膜で画定された領域内に半導体素子を形成して素子分
離を行う方法がとられている。When forming a semiconductor device such as an IC, a method of forming a field oxide film for element isolation on a Si substrate and forming semiconductor elements within a region defined by this oxide film for element isolation to perform element isolation. is taken.
このようなフィールド酸化膜を形成する際、その酸化膜
にバーズビークが発生して素子形成領域の面積が減少し
ないようにすると共に、このフィールド酸化膜を形成す
に工程で素子形成領域内のSi基板の表面が侵されてそ
の上に形成されるゲート酸化膜が、耐圧低下を来さない
ようにすることが要望されている。When forming such a field oxide film, it is necessary to prevent the occurrence of bird's beaks in the oxide film and reduce the area of the element formation region, and to prevent the formation of the field oxide film from reducing the area of the Si substrate in the element formation region. It is desired to prevent the gate oxide film formed on the surface of the gate oxide film from decreasing in breakdown voltage.
従来、このような半導体素子形成用基板を形成する場合
、第6図に示すようにSi基板lの表面に熱酸化法によ
り薄いSiO2膜2を形成後、この上に化学蒸着法(C
V D)法、ホトリソグラフィ法、プラズマエツチング
法を順次用いて所定パターンの窒化シリコンI*3を形
成する。Conventionally, when forming such a substrate for forming a semiconductor element, as shown in FIG.
A predetermined pattern of silicon nitride I*3 is formed by sequentially using the VD method, photolithography method, and plasma etching method.
次いでこの窒化シリコン膜3をマスクとして用いて該基
板1を酸化性雰囲気の内部に曝して熱酸化を行い第7図
に示すように窒化シリコン膜3が開口された領域にフィ
ールド酸化膜4を形成後、この窒化シリコン膜3を燐酸
等を用いて除去して所定パターンのフィールド酸化膜4
を形成していた。Next, using this silicon nitride film 3 as a mask, the substrate 1 is exposed to an oxidizing atmosphere for thermal oxidation to form a field oxide film 4 in the area where the silicon nitride film 3 is opened, as shown in FIG. After that, this silicon nitride film 3 is removed using phosphoric acid or the like to form a field oxide film 4 in a predetermined pattern.
was forming.
然し、このような方法であると、Si基板1が酸化され
るのに要する時間が長いため、第8図に示すように、こ
の基板1を酸化性雰囲気で長時間曝して基板を加熱する
フィールド酸化膜の形成工程で、酸化性ガスが二酸化シ
リコン膜2の内部に入り込む。更にこの酸化性ガスの侵
入に依って、フィールド酸化膜4より横方向の素子形成
領域に鳥の嘴状に広がって形成され、フィールド酸化l
it! 4より基板1の横方向の素子形成領域に鳥の嘴
のように延びる所謂バーズビーク5を発生する。However, with this method, it takes a long time to oxidize the Si substrate 1, so as shown in FIG. During the oxide film formation process, oxidizing gas enters into the silicon dioxide film 2. Furthermore, due to the intrusion of this oxidizing gas, the field oxide film 4 is formed in a bird's beak shape in the element formation region in the lateral direction, and field oxide l
It! 4, a so-called bird's beak 5 extending like a bird's beak is generated in the element forming region in the lateral direction of the substrate 1.
このバーズビーク5によって素子形成領域が浸食され、
微細な半導体素子の形成が不可能になる問題点を生じる
。The element formation region is eroded by this bird's beak 5,
This poses a problem that makes it impossible to form fine semiconductor elements.
そこで第9図に示すように前記したバーズビークの発生
の核となる薄い酸化膜2を形成する工程を省いて、基板
1上に直接窒化シリコン膜3を形成し、この窒化シリコ
ン膜3をマスクとして基板1上にフィー−ルド酸化膜4
を形成する工程も取られている。Therefore, as shown in FIG. 9, a silicon nitride film 3 is directly formed on the substrate 1 without the step of forming the thin oxide film 2, which is the core of the bird's beak generation, and this silicon nitride film 3 is used as a mask. Field oxide film 4 on substrate 1
A process is also being taken to form a
然し、このような方法であると基板1上に直接窒化シリ
コン膜3を形成しているため、フィールド酸化膜4を形
成した後、マスクとして用いた窒化シリコン膜3を除去
した場合、窒化シリコン膜3の下部の基板lの表面が荒
れ、その部分に形成するゲート酸化膜の耐圧が低下する
問題を生じていた。However, in this method, the silicon nitride film 3 is formed directly on the substrate 1, so if the silicon nitride film 3 used as a mask is removed after forming the field oxide film 4, the silicon nitride film 3 will be removed. The surface of the substrate l at the bottom of No. 3 is rough, causing a problem that the withstand voltage of the gate oxide film formed in that portion is reduced.
本発明は上記した問題点を除去し、バーズビークを発生
しないフィールド酸化膜が形成され、かつ素子形成領域
に形成したゲート酸化膜の耐圧低下を来さないようにし
た半導体素子形成用基板の製造方法の提供を目的とする
。The present invention eliminates the above-mentioned problems, forms a field oxide film that does not generate bird's beak, and is a method for manufacturing a substrate for forming a semiconductor element, which prevents a drop in breakdown voltage of the gate oxide film formed in the element formation region. The purpose is to provide.
本発明の半導体装置の製造方法は、Si基板11上にS
iO2膜12、ポリSi膜13、耐酸化性膜14を順次
積層形成する工程、
前記耐酸化性膜14を所定パターンに異方性エツチング
して開口する工程、
該開口した耐酸化性膜14をマスクとして該基板11を
酸化性雰囲気内に曝し、前記耐酸化性膜14の開口部下
のポリSi膜13、並びにその下のSi基板11を酸化
しフィールド酸化膜16を形成する工程、前記マスクと
して用いた耐酸化性膜14をエツチング除去する工程、
前記フィルード酸化膜16以外の基板上に形成されてい
るポリSi膜13、およびその下の5iO211112
をエツチングにて除去する工程を有することを特徴とす
る特
〔作用〕
本発明の半導体装置の製造方法は、フィールド酸化膜1
6の形成に際し、基板11上に形成したSiO2膜12
の上に、酸化される速度が基板11の約1.5倍のポリ
Si膜13を形成し、その上にフィールド酸化膜16の
形成箇所を開口した耐酸化性膜14を形成する。In the method of manufacturing a semiconductor device of the present invention, S is formed on a Si substrate 11.
a step of sequentially laminating an iO2 film 12, a poly-Si film 13, and an oxidation-resistant film 14; a step of anisotropically etching the oxidation-resistant film 14 into a predetermined pattern to open the oxidation-resistant film 14; a step of exposing the substrate 11 to an oxidizing atmosphere as a mask to oxidize the poly-Si film 13 under the opening of the oxidation-resistant film 14 and the Si substrate 11 thereunder to form a field oxide film 16; A step of etching away the oxidation-resistant film 14 used, the poly-Si film 13 formed on the substrate other than the field oxide film 16, and the 5iO211112 underneath it.
Features [Function] The method for manufacturing a semiconductor device of the present invention is characterized by having a step of removing the field oxide film 1 by etching.
6, the SiO2 film 12 formed on the substrate 11
A poly-Si film 13 whose oxidation rate is about 1.5 times that of the substrate 11 is formed on the poly-Si film 13, and an oxidation-resistant film 14 having an opening where the field oxide film 16 will be formed is formed thereon.
このようにした基板11を、開口した耐酸化性膜14を
マスクとして基板11を酸化性雰囲気内に導入すると、
ポリ5t13の酸化速度は速いため、素早く酸化され、
酸化に要する時間が短くそのため横方向に拡がって酸化
される時間も短くなり、従ってバーズビークが発生しな
くなる。When the substrate 11 thus prepared is introduced into an oxidizing atmosphere using the open oxidation-resistant film 14 as a mask,
Since the oxidation rate of poly 5t13 is fast, it is oxidized quickly,
The time required for oxidation is short, and therefore the time for lateral spread and oxidation is also short, so that bird's beaks do not occur.
以下、図面を用いて本発明の一実施例につき詳細に説明
する。Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.
第1図に示すように、Si基板11上にSiO2膜12
を熱酸化法で形成し、その上にCVD法でポリSi膜1
3を形成後、耐酸化性膜としての窒化Si膜14を順次
積層形成する。As shown in FIG. 1, a SiO2 film 12 is formed on a Si substrate 11.
is formed by a thermal oxidation method, and a poly-Si film 1 is formed on it by a CVD method.
3, a Si nitride film 14 as an oxidation-resistant film is sequentially laminated.
次いで第2図に示すように、該基板上に所定パターンの
ホトレジスト膜15を形成後、該ホトレジスト膜15を
マスクとして異方性のドライエツチングを用いて窒化5
ill13を所定のパターンにエツチング形成する。Next, as shown in FIG. 2, after forming a photoresist film 15 in a predetermined pattern on the substrate, nitriding 5 is performed using anisotropic dry etching using the photoresist film 15 as a mask.
Ill13 is etched into a predetermined pattern.
次いで第3図に示すようにマスクとして用いたホトレジ
スト15を除去する。Next, as shown in FIG. 3, the photoresist 15 used as a mask is removed.
次いで第4図に示すように、該基板を酸化性雰囲気内に
曝して前記パターンニング形成した窒化Si膜14をマ
スクとして熱酸化法により前記ポリSi膜13と共にそ
の下の基板11をも酸化してフィールド酸化膜16を形
成する。Next, as shown in FIG. 4, the substrate is exposed to an oxidizing atmosphere, and the poly-Si film 13 and the underlying substrate 11 are oxidized by a thermal oxidation method using the patterned Si nitride film 14 as a mask. A field oxide film 16 is then formed.
このようにするとポリSi膜13の酸化速度はSi基板
を酸化する場合に比して約1.5倍の速度でエツチング
されるためフィールド酸化jil16の形成時間が大幅
に短縮される。そのため、開口された窒化Si膜の横方
向にフィールド酸化膜が延びて形成されるバーズビーク
が発生するのに要する時間もなくなり、バーズビークの
発生が見られなくなる。In this way, the poly-Si film 13 is oxidized at a rate approximately 1.5 times that of oxidizing the Si substrate, so that the time required to form the field oxidation layer 16 is significantly shortened. Therefore, the time required for the formation of bird's beaks, which are formed by extending the field oxide film in the lateral direction of the opened Si nitride film, is also eliminated, and the formation of bird's beaks is no longer observed.
次いで熱燐酸にて窒化Si膜15を除去した後、酸系の
エツチング液を用いてその下のポリSi膜13をエツチ
ング後、弗化水素酸を用いてその下のSiO2膜12を
エツチング除去し、第5図に示すような所定パターンの
フィールド酸化1i116が形成されたSi基板11を
得る。Next, after removing the Si nitride film 15 with hot phosphoric acid, etching the underlying poly-Si film 13 using an acid-based etching solution, and etching away the underlying SiO2 film 12 using hydrofluoric acid. , a Si substrate 11 having a predetermined pattern of field oxidation 1i116 as shown in FIG. 5 is obtained.
このようにすればバーズビークも発生せず、かつ基板上
にSiO2膜12が形成されているので基板表面も浸食
されることがなく従ってこの基板上に形成されるゲート
酸化膜の耐圧低下も見られない高信頼度の半導体装置が
得られる効果がある。By doing this, bird's beaks will not occur, and since the SiO2 film 12 is formed on the substrate, the substrate surface will not be eroded, and therefore a decrease in the withstand voltage of the gate oxide film formed on this substrate will not be observed. This has the effect that a highly reliable semiconductor device can be obtained.
以上述べたように本発明の半導体素子形成用基板の製造
方法によれば、バーズビークの発生しないフィールド酸
化膜が得られ、またその基板にゲート酸化膜を形成して
も耐圧低下の見られない半導体素子形成用基板が得られ
る効果がある。As described above, according to the method of manufacturing a substrate for forming a semiconductor element of the present invention, a field oxide film that does not generate bird's beaks can be obtained, and even if a gate oxide film is formed on the substrate, a semiconductor device with no decrease in breakdown voltage can be obtained. There is an effect that a substrate for forming an element can be obtained.
第1図より第5図までは本発明の半導体素子形成用基板
の製造方法を工程順に説明するための断面図、
第6図より第7図迄は従来の半導体素子形成用基板の製
造方法を説明するための断面図、第8図は従来の方法に
於ける不都合な状態を示す断面図、
第9図は従来の半導体素子形成用基板の工程を説明する
ための断面図である。
図に於いて、
11はSi基板、12はSiO2膜、13はポリSi膜
、14は耐酸化性膜、15はホトレジスト膜、16はフ
ィールド酸化膜を示す。
2トNeJ4arSiO2梼、、i”JSi#!、@7
#イ’−”@ff’)FxTnm@ 1 因
年毎q吊酊鍍化→°生腰r・yf>7・ニオ”dllw
I z 図
オy%4qli丁11tイ14ttRt=8F\’ui
c第 3 圀
3オー4とa)fの74−11ド唇タイe−月莫形へ゛
T芋¥1巴J@ 4 閃
@ 5Fj!J
q;ljf:4rtWt<t!−tqH’fs、’1:
RM第6図Figures 1 to 5 are cross-sectional views for explaining the manufacturing method of a substrate for forming semiconductor elements according to the present invention in order of steps, and Figures 6 to 7 are cross-sectional views for explaining the conventional method of manufacturing a substrate for forming semiconductor elements. FIG. 8 is a cross-sectional view showing an inconvenient state in the conventional method, and FIG. 9 is a cross-sectional view for explaining the process of a conventional semiconductor element forming substrate. In the figure, 11 is a Si substrate, 12 is an SiO2 film, 13 is a poly-Si film, 14 is an oxidation-resistant film, 15 is a photoresist film, and 16 is a field oxide film. 2t NeJ4arSiO2,,i”JSi#!,@7
#I'-"@ff') FxTnm@ 1 Every year q suspension intoxication → ° Nakoshi r・yf>7・Nio" dllw
I z fig % 4 qli d 11 t i 14 tt Rt=8F\'ui
c No. 3 Kuni 3 O 4 and a) f's 74-11 lip tie e-Moon mo shape゛T potato ¥ 1 Tomoe J@ 4 flash @ 5Fj! J q;ljf:4rtWt<t! -tqH'fs,'1:
RM Figure 6
Claims (2)
ン(SiO_2)膜(12)、ポリSi膜(13)、耐
酸化性膜(14)を順次積層形成する工程、 前記耐酸化性膜(14)を所定パターンに開口する工程
、 該開口した耐酸化性膜(14)をマスクとして該基板(
11)を酸化性雰囲気内に曝し、前記耐酸化性膜(14
)の開口部下のポリSi膜(13)、並びにその下のS
i基板(11)を酸化してフィールド酸化膜(16)を
形成する工程、 前記マスクとして用いた耐酸化性膜(14)を異方性エ
ッチング除去する工程、 前記基板(11)上に残留せるポリSi膜(13)、お
よびその下のSiO_2膜(12)をエッチング除去す
る工程を有することを特徴とする半導体素子形成用基板
の製造方法。(1) A step of sequentially laminating a silicon dioxide (SiO_2) film (12), a poly-Si film (13), and an oxidation-resistant film (14) on a silicon (Si) substrate (11), the oxidation-resistant film ( a step of opening the substrate (14) in a predetermined pattern, using the opened oxidation-resistant film (14) as a mask;
11) in an oxidizing atmosphere, and the oxidation-resistant film (14) is exposed to an oxidizing atmosphere.
) and the poly-Si film (13) under the opening of
A step of oxidizing the i-substrate (11) to form a field oxide film (16), a step of removing the oxidation-resistant film (14) used as the mask by anisotropic etching, and leaving it on the substrate (11). A method for manufacturing a substrate for forming a semiconductor element, comprising a step of etching away a poly-Si film (13) and an underlying SiO_2 film (12).
ことを特徴とする特許請求の範囲第1項に記載の半導体
素子形成用基板の製造方法。(2) The method of manufacturing a substrate for forming a semiconductor element according to claim 1, wherein the oxidation-resistant film (14) is a silicon nitride film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2515786A JPS62183139A (en) | 1986-02-06 | 1986-02-06 | Manufacture of substrate for formation of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2515786A JPS62183139A (en) | 1986-02-06 | 1986-02-06 | Manufacture of substrate for formation of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62183139A true JPS62183139A (en) | 1987-08-11 |
Family
ID=12158187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2515786A Pending JPS62183139A (en) | 1986-02-06 | 1986-02-06 | Manufacture of substrate for formation of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62183139A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5093277A (en) * | 1989-03-09 | 1992-03-03 | Mitsubishi Denki Kabushiki Kaisha | Method of device isolation using polysilicon pad LOCOS method |
JPH04105346A (en) * | 1990-08-23 | 1992-04-07 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
-
1986
- 1986-02-06 JP JP2515786A patent/JPS62183139A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5093277A (en) * | 1989-03-09 | 1992-03-03 | Mitsubishi Denki Kabushiki Kaisha | Method of device isolation using polysilicon pad LOCOS method |
JPH04105346A (en) * | 1990-08-23 | 1992-04-07 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
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