JPS6217874B2 - - Google Patents

Info

Publication number
JPS6217874B2
JPS6217874B2 JP56015467A JP1546781A JPS6217874B2 JP S6217874 B2 JPS6217874 B2 JP S6217874B2 JP 56015467 A JP56015467 A JP 56015467A JP 1546781 A JP1546781 A JP 1546781A JP S6217874 B2 JPS6217874 B2 JP S6217874B2
Authority
JP
Japan
Prior art keywords
resin
metal
metal coating
lead
die pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56015467A
Other languages
Japanese (ja)
Other versions
JPS57128947A (en
Inventor
Sadami Yakuwa
Kazuharu Oonuki
Shozo Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP56015467A priority Critical patent/JPS57128947A/en
Publication of JPS57128947A publication Critical patent/JPS57128947A/en
Publication of JPS6217874B2 publication Critical patent/JPS6217874B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【発明の詳細な説明】 本発明はリードフレームに半導体素子を載置
し、これを樹脂封止した半導体装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device in which a semiconductor element is mounted on a lead frame and sealed with resin.

従来のこのような半導体装置に於ては、銅、鉄
或いはこれらの合金よりなるリードフレームで、
ダイパツト部と外部導出リードの一部、即ちダイ
パツド部に近接し金属細線の接続される部分のみ
に、例えば金或いは銀の如き貴金属が選択的にめ
つきされたリードフレームが広く用いられてい
る。このようなリードフレームに半導体素子を載
置し、金属細線による配線を施した後、半導体素
子周辺と金属配線部とを樹脂で封止した半導体装
置では、リードフレームが樹脂表面と接する境界
部附近に於て、樹脂はリードフレームの素材金属
と直接接触する構造を有している。また、樹脂を
封止した後外部導出リードの樹脂より外部に導出
された部位に、主に良好な半田付け性を得ること
と、酸化腐食を防止することを目的に、例えば
錫、鉛、或いはこれらの合金よりなる外装金属被
膜が形成されている。
In conventional semiconductor devices, the lead frame is made of copper, iron, or an alloy of these.
A lead frame is widely used in which a noble metal such as gold or silver is selectively plated only on the die pad portion and a portion of the external lead, that is, the portion close to the die pad portion and to which a thin metal wire is connected. In a semiconductor device such as this, in which a semiconductor element is placed on a lead frame, wiring is performed using thin metal wires, and the periphery of the semiconductor element and the metal wiring are sealed with resin, the area near the boundary where the lead frame contacts the resin surface. In this case, the resin has a structure in which it is in direct contact with the metal material of the lead frame. In addition, after sealing the resin, the parts of the external leads that are led out from the resin are coated with, for example, tin, lead, or other materials, mainly to obtain good solderability and to prevent oxidative corrosion. An exterior metal coating made of these alloys is formed.

このような従来の半導体装置に於いては、樹脂
封入の際に樹脂の境界部より、リード表面に漏出
した樹脂薄膜の付着した部分(いわゆる樹脂バ
リ)には、外装金属被膜は被覆されず、またこの
樹脂薄膜が脱落すると、リードフレームの素材金
属が露出し、この露出部で素材金属の酸化腐食が
進行し、リードの断線等を生じ易いという欠点を
有している。
In such conventional semiconductor devices, the outer metal coating does not cover the parts (so-called resin burrs) where the resin thin film leaked onto the lead surface from the resin boundary during resin encapsulation. Further, when this thin resin film falls off, the metal material of the lead frame is exposed, and oxidation corrosion of the metal material progresses in this exposed portion, which is likely to cause disconnection of the leads.

本発明の目的は耐酸化性の優れた機械的に強い
リードを有する信頼度の優れた半導体装置を提供
することにある。
An object of the present invention is to provide a highly reliable semiconductor device having mechanically strong leads with excellent oxidation resistance.

即ち、本発明の半導体装置によれば、樹脂封入
の際に付着する樹脂薄膜の外装金属被膜の被覆さ
れなくなるリード部分には予め、酸化耐食性の優
れた、例えばニツケル銀、アルミニウムあるいは
これらの合金の金属被膜が形成された半導体装置
を得る。
That is, according to the semiconductor device of the present invention, the lead portions that are not covered by the outer metal coating of the resin thin film that is attached during resin encapsulation are coated with a material having excellent oxidation corrosion resistance, such as nickel silver, aluminum, or an alloy thereof. A semiconductor device on which a metal film is formed is obtained.

このような半導体装置によればリードの素材金
属の露出を防止でき、酸化腐食の進行し難い信頼
度の高い半導体装置を供給することが可能であ
る。
According to such a semiconductor device, it is possible to prevent the material metal of the leads from being exposed, and it is possible to provide a highly reliable semiconductor device in which oxidation corrosion is difficult to progress.

次に本発明説明の為に従来の半導体装置ならび
に、本発明の半導体装置の一実施例につさ図面を
参照してより詳細に説明する。
Next, in order to explain the present invention, a conventional semiconductor device and an embodiment of the semiconductor device of the present invention will be described in more detail with reference to the drawings.

第1図は従来の半導体装置を示す縦断面図、第
2A図は本発明の半導体装置の一実施例を示す縦
断面図、第2B図は第2A図の実施例の樹脂を除
いた上面図である。第1図に於いて、例えば銅、
鉄、或いはこれらの合金よりなるリードフレーム
100はダイパツド部101ならびに、外部導出
リード102のダイパツド部101に近接する先
端部103には、例えば金、銀の如き貴金属10
4がめつきされている。半導体素子105は、ダ
イパツド部101に固着され、半導体素子105
の電極(図示せず)と外部導出リード102は金
属細線106により、リード先端103で接続さ
れている。
FIG. 1 is a vertical sectional view showing a conventional semiconductor device, FIG. 2A is a vertical sectional view showing an embodiment of the semiconductor device of the present invention, and FIG. 2B is a top view of the embodiment of FIG. 2A with the resin removed. It is. In Figure 1, for example, copper,
The lead frame 100 made of iron or an alloy thereof has a die pad portion 101 and a tip portion 103 of the external lead 102 close to the die pad portion 101 that is coated with a precious metal 10 such as gold or silver.
4 is plated. The semiconductor element 105 is fixed to the die pad part 101, and the semiconductor element 105 is fixed to the die pad part 101.
An electrode (not shown) and an external lead 102 are connected at a lead tip 103 by a thin metal wire 106 .

半導体素子105、金属細線106、ならびに
リードフレーム100のこれら装着部は樹脂10
7により封止され、外部導出リード102の樹脂
107より外部に導出された部位には、例えば
錫、鉛或いはこれらの合金よりなる外装金属被膜
108が形成されている。
The semiconductor element 105, the thin metal wire 106, and the mounting portion of the lead frame 100 are made of resin 10.
An exterior metal coating 108 made of, for example, tin, lead, or an alloy thereof is formed on a portion of the external lead lead 102 that is sealed by the resin 107 and led out from the resin 107 .

このような従来の半導体装置に於いては、樹脂
106を封入する際、樹脂107の境界部より、
外部導出リード102の表面に漏出した樹脂薄膜
109の付着した部分には、外装金属被膜108
は被覆されず、また、この樹脂薄膜109が脱落
すると、リードフレーム100の素材金属が露出
する為、前述の如き欠点を有している。
In such a conventional semiconductor device, when encapsulating the resin 106, from the boundary of the resin 107,
The outer metal coating 108 is applied to the part where the leaked resin thin film 109 adheres to the surface of the external lead-out lead 102.
is not covered, and when the thin resin film 109 falls off, the metal material of the lead frame 100 is exposed, resulting in the drawbacks mentioned above.

本発明は従来の半導体装置のかかる欠点を解消
するものである。即ち、第2A図、第2B図に於
いて、例えば、銅、鉄、或いはこれらの合金より
なるリードフレーム200のダイパツド部20
1、ならびに外部導出リード202のダイパツド
部201に近接する先端部203には、例えば
金、銀の如き貴金属204がめつきされ、後に樹
脂207で封止される境界部に例えばニツケル、
銀、アルミニウム、或いは、これらの合金等より
なる金属被膜210が形成されている。半導体素
子205はダイパツド部201に固着され、半導
体素子205の電極(図示せず)と外部導出リー
ド202は金属細線206によりリード先端20
3で接続されている。半導体素子205、金属細
線206ならびにリードフレーム200のこれら
装着部は樹脂206により封止され外部導出リー
ド202の、前記金属被膜210を含み、樹脂2
07より外部に導出された部位には上述の如き金
属被膜207が形成されている。
The present invention eliminates these drawbacks of conventional semiconductor devices. That is, in FIGS. 2A and 2B, for example, the die pad portion 20 of the lead frame 200 made of copper, iron, or an alloy thereof
1 and the tip portion 203 of the external lead-out lead 202 close to the die pad portion 201 are plated with a noble metal 204 such as gold or silver, and the boundary portion that will be later sealed with resin 207 is plated with, for example, nickel, etc.
A metal coating 210 made of silver, aluminum, or an alloy thereof is formed. The semiconductor element 205 is fixed to the die pad part 201, and the electrodes (not shown) of the semiconductor element 205 and the external leads 202 are connected to the lead tips 20 by thin metal wires 206.
Connected by 3. The mounting portions of the semiconductor element 205, the thin metal wires 206, and the lead frame 200 are sealed with a resin 206, and include the metal coating 210 of the external leads 202.
A metal coating 207 as described above is formed on the portion led out from 07.

このような本発明の半導体装置に於ては、樹脂
封止工程でリード202上に所定部位からはみ出
して被着する樹脂薄膜209により外装金属被膜
208の被覆されない部分には、酸化、耐食性の
優れた金属被膜210が形成されている為、不所
望にはみ出した樹脂薄膜209を除去してもリー
ドフレーム200の素材金属は露出することがな
く、外部導出リード202の酸化腐食の進行によ
る断線等の生じ難い信頼度の高い半導体装置を提
供することができる。
In such a semiconductor device of the present invention, the resin thin film 209 that protrudes from a predetermined portion and adheres onto the leads 202 during the resin sealing process covers the portions of the exterior metal coating 208 that are not covered by the resin film, which has excellent oxidation and corrosion resistance. Since the metal coating 210 is formed, the raw metal of the lead frame 200 will not be exposed even if the resin thin film 209 that has undesirably protruded is removed. It is possible to provide a highly reliable semiconductor device that is unlikely to cause such problems.

以上に一実施例を説明したが、金属被膜210
は耐酸化性が強く、リード素材との密着力の強い
ものであれば、ニツケルや銀やアルミニウムに限
られることはない。又、この金属被膜210は樹
脂表面近傍のリード全表面に被着すればより一層
効果的であることは明らかである。
Although one embodiment has been described above, the metal coating 210
is not limited to nickel, silver, or aluminum, as long as it has strong oxidation resistance and strong adhesion to the lead material. Furthermore, it is clear that this metal coating 210 is more effective if it is applied to the entire surface of the lead near the resin surface.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体装置を示す縦断面図、第
2A図は本発明の一実施例を示す縦断面図、第2
B図は、第2A図の実施例の樹脂を除いた上面図
である。 100,200……リードフレーム、101,
201……ダイパツド部、102,202……外
部導出リード、103,203……外部導出リー
ド先端部、104,204……貴金属めつき、1
05,205……半導体素子、106,206…
…金属細線、107,207……樹脂、108,
208……外装金属被膜、109,209……樹
脂薄膜、210……金属被膜。
FIG. 1 is a vertical cross-sectional view showing a conventional semiconductor device, FIG. 2A is a vertical cross-sectional view showing an embodiment of the present invention, and FIG.
Figure B is a top view of the embodiment of Figure 2A with the resin removed. 100,200...lead frame, 101,
201... Die pad part, 102, 202... External lead-out lead, 103, 203... External lead-out lead tip, 104, 204... Precious metal plating, 1
05,205...Semiconductor element, 106,206...
...Thin metal wire, 107,207...Resin, 108,
208...Exterior metal coating, 109, 209...Resin thin film, 210...Metal coating.

Claims (1)

【特許請求の範囲】[Claims] 1 ダイパツド部と、複数の外部導出リードと、
該ダイパツト部に固着された半導体素子と、該半
導体素子の複数電極と前記複数の外部導出リード
とをそれぞれ接続する金属細線と、前記複数の外
部導出リードのそれぞれにその途中において設け
られた耐酸化性の第1の金属被膜と、該第1の金
属被膜上を境界として、該半導体素子、該金属細
線、該ダイパツド部ならびにこれらの周辺の各外
部導出リード部分を含めて封止した樹脂と、半田
付性を良好にする第2の金属被膜であつて該樹脂
外において該第1の金属被膜の端部と接触し該樹
脂外にある各外部導出リード部分を被覆しかつ該
第1の金属被膜と異なる材料でなる第2の金属被
膜とを有し、該樹脂内にある各外部導出リード部
分は該第2の金属被膜で覆われていない半導体装
置。
1 A die pad part, a plurality of external leads,
A semiconductor element fixed to the die pad portion, thin metal wires connecting the plurality of electrodes of the semiconductor element and the plurality of external lead-out leads, and oxidation-resistant wires provided in the middle of each of the plurality of external lead-out leads. a resin that seals the semiconductor element, the thin metal wire, the die pad portion, and each external lead portion around these with the first metal coating as a boundary; A second metal coating that improves solderability and contacts the end of the first metal coating outside the resin and covers each external lead portion outside the resin, and the first metal A semiconductor device comprising a second metal coating made of a material different from the coating, and each external lead portion within the resin is not covered with the second metal coating.
JP56015467A 1981-02-04 1981-02-04 Semiconductor device Granted JPS57128947A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56015467A JPS57128947A (en) 1981-02-04 1981-02-04 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56015467A JPS57128947A (en) 1981-02-04 1981-02-04 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57128947A JPS57128947A (en) 1982-08-10
JPS6217874B2 true JPS6217874B2 (en) 1987-04-20

Family

ID=11889599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56015467A Granted JPS57128947A (en) 1981-02-04 1981-02-04 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57128947A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59117166U (en) * 1983-01-27 1984-08-07 新電元工業株式会社 Resin-encapsulated semiconductor device
US10062639B2 (en) * 2014-12-10 2018-08-28 Stmicroelectronics Sdn Bhd Integrated circuit device with plating on lead interconnection point and method of forming the device

Also Published As

Publication number Publication date
JPS57128947A (en) 1982-08-10

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