JPS6217386B2 - - Google Patents
Info
- Publication number
- JPS6217386B2 JPS6217386B2 JP54165494A JP16549479A JPS6217386B2 JP S6217386 B2 JPS6217386 B2 JP S6217386B2 JP 54165494 A JP54165494 A JP 54165494A JP 16549479 A JP16549479 A JP 16549479A JP S6217386 B2 JPS6217386 B2 JP S6217386B2
- Authority
- JP
- Japan
- Prior art keywords
- conductivity type
- region
- oxide film
- layer
- opposite conductivity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
Landscapes
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16549479A JPS5688352A (en) | 1979-12-21 | 1979-12-21 | Manufacture of semiconductor integrated circuit |
EP80304302A EP0030147B1 (en) | 1979-11-29 | 1980-11-28 | Method for manufacturing a semiconductor integrated circuit |
DE8080304302T DE3063191D1 (en) | 1979-11-29 | 1980-11-28 | Method for manufacturing a semiconductor integrated circuit |
US06/210,759 US4404737A (en) | 1979-11-29 | 1980-11-28 | Method for manufacturing a semiconductor integrated circuit utilizing polycrystalline silicon deposition, oxidation and etching |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16549479A JPS5688352A (en) | 1979-12-21 | 1979-12-21 | Manufacture of semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5688352A JPS5688352A (en) | 1981-07-17 |
JPS6217386B2 true JPS6217386B2 (enrdf_load_stackoverflow) | 1987-04-17 |
Family
ID=15813457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16549479A Granted JPS5688352A (en) | 1979-11-29 | 1979-12-21 | Manufacture of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5688352A (enrdf_load_stackoverflow) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52117579A (en) * | 1976-03-30 | 1977-10-03 | Nec Corp | Semiconductor device |
JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
JPS53142196A (en) * | 1977-05-18 | 1978-12-11 | Hitachi Ltd | Bipolar type semiconductor device |
JPS5852352B2 (ja) * | 1977-12-14 | 1983-11-22 | 日本電信電話株式会社 | 電界効果型トランジスタの製法 |
-
1979
- 1979-12-21 JP JP16549479A patent/JPS5688352A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5688352A (en) | 1981-07-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3962717A (en) | Oxide isolated integrated injection logic with selective guard ring | |
US4892837A (en) | Method for manufacturing semiconductor integrated circuit device | |
US4433470A (en) | Method for manufacturing semiconductor device utilizing selective etching and diffusion | |
US4066473A (en) | Method of fabricating high-gain transistors | |
US5070030A (en) | Method of making an oxide isolated, lateral bipolar transistor | |
EP0021403B1 (en) | Self-aligned semiconductor circuits | |
US4843448A (en) | Thin-film integrated injection logic | |
US3993513A (en) | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures | |
US4933737A (en) | Polysilon contacts to IC mesas | |
US4539742A (en) | Semiconductor device and method for manufacturing the same | |
CA1055619A (en) | Integrated semiconductor circuit arrangement | |
US4825281A (en) | Bipolar transistor with sidewall bare contact structure | |
US4404737A (en) | Method for manufacturing a semiconductor integrated circuit utilizing polycrystalline silicon deposition, oxidation and etching | |
KR0128339B1 (ko) | Cmos 기술을 이용하는 바이폴라 트랜지스터 제조방법 | |
US4407059A (en) | Method of producing semiconductor device | |
EP0034341B1 (en) | Method for manufacturing a semiconductor device | |
KR950001146B1 (ko) | 폴리실리콘 자체 정렬 바이폴라 장치 및 이의 제조 방법 | |
EP0036620B1 (en) | Semiconductor device and method for fabricating the same | |
JPS6217386B2 (enrdf_load_stackoverflow) | ||
JPS6217384B2 (enrdf_load_stackoverflow) | ||
JPS6217385B2 (enrdf_load_stackoverflow) | ||
KR910005393B1 (ko) | 복합형 반도체소자의 구조 및 제조방법 | |
JPS6152575B2 (enrdf_load_stackoverflow) | ||
JPH05335329A (ja) | 半導体装置及びその製造方法 | |
JPH05275633A (ja) | 半導体装置及びその製造方法 |