JPS62171117A - Heat treatment of semiconductor wafer - Google Patents
Heat treatment of semiconductor waferInfo
- Publication number
- JPS62171117A JPS62171117A JP1259486A JP1259486A JPS62171117A JP S62171117 A JPS62171117 A JP S62171117A JP 1259486 A JP1259486 A JP 1259486A JP 1259486 A JP1259486 A JP 1259486A JP S62171117 A JPS62171117 A JP S62171117A
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- quartz boat
- quartz
- furnace
- semiconductor wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010438 heat treatment Methods 0.000 title claims abstract description 37
- 239000004065 semiconductor Substances 0.000 title claims description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 239000010453 quartz Substances 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 26
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052810 boron oxide Inorganic materials 0.000 claims abstract description 8
- 238000005468 ion implantation Methods 0.000 claims abstract description 7
- 238000009792 diffusion process Methods 0.000 claims abstract description 6
- 150000002500 ions Chemical class 0.000 claims abstract description 6
- 239000007789 gas Substances 0.000 claims abstract description 5
- 239000001257 hydrogen Substances 0.000 claims abstract description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 3
- 239000000565 sealant Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 abstract description 30
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 18
- 238000006243 chemical reaction Methods 0.000 abstract description 8
- 238000010494 dissociation reaction Methods 0.000 abstract description 8
- 230000005593 dissociations Effects 0.000 abstract description 8
- 238000009826 distribution Methods 0.000 abstract description 8
- 239000013078 crystal Substances 0.000 abstract description 7
- 230000007547 defect Effects 0.000 abstract description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- 239000003795 chemical substances by application Substances 0.000 abstract description 2
- 238000007789 sealing Methods 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 description 25
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 17
- 238000010586 diagram Methods 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 3
- 230000005484 gravity Effects 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 239000003223 protective agent Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000009835 boiling Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000002341 toxic gas Substances 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の背景と目的］
本発明は、半導体特にガリウムヒ素（Ｇａ Ａｓ ）等
の化合物半導体の熱処理方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Background and Objects of the Invention] The present invention relates to a method for heat treating semiconductors, particularly compound semiconductors such as gallium arsenide (GaAs).
一般に、Ｑａ 、Ａｓ化合物半導体ウェハの熱処理方法
としては、Ａｓの解離を防止するために、二酸化シリコ
ン（Ｓｉ ０２ ）や窒化シリコン（Ｓｉ ３ Ｎ４）
を保護膜としてウェハ表面に被着する方法が従来から行
なわれてきた。この方法では、ＧａＡｓの熱膨張係数が
８．７Ｘ １０−”Ｃ’に比べ、ＳｉＯ２が８．５Ｘ１
０づ℃”、Ｓｉ３Ｎ４が２Ｘ１０４℃°！と１桁前侵異
なるため、ＧａＡＳウェハ表面と保護膜との界面に熱応
力が発生し、結晶欠陥を誘発すると言う欠点があった。In general, as a heat treatment method for Qa, As compound semiconductor wafers, silicon dioxide (Si 02 ) or silicon nitride (Si 3 N4) is used to prevent the dissociation of As.
Conventionally, a method has been used in which a protective film is applied to the wafer surface. In this method, the coefficient of thermal expansion of GaAs is 8.7X 10-"C', while the coefficient of thermal expansion of SiO2 is 8.5
Since Si3N4 has a one-digit difference in penetration of 2×104°C!, thermal stress is generated at the interface between the GaAS wafer surface and the protective film, which induces crystal defects.
そして、この結晶欠陥は、イオン打込み法によって形成
した能動力の活性化率を低減する原因となっていた。This crystal defect causes a reduction in the activation rate of the active force formed by the ion implantation method.
また、界面に発生した熱応力は、打ち込まれたイオンの
拡散を助長し急峻なキャリヤ濃度分布が１ｑられないた
め、デバイスの周波数特性や高速化にとって支障となっ
ていた。一方、ＡＳの解離を補償するため、アルシン（
ＡＳ Ｈ３＞ガス雰囲気中で熱処理する方法もあるが、
アルシンは非常に有毒なガスであるため、ガスの置換や
試料の取扱いに時間を要するなどの理由から実用的とは
云えない。In addition, the thermal stress generated at the interface promotes the diffusion of implanted ions and prevents the steep carrier concentration distribution from becoming 1q, which has been an obstacle to improving the frequency characteristics and speed of the device. On the other hand, to compensate for the dissociation of AS, arsine (
AS H3> There is also a method of heat treatment in a gas atmosphere,
Since arsine is a highly toxic gas, it is not practical because it requires time to replace the gas and handle the sample.
本発明は上記の状況に鑑みなされたものであり、Ａｓの
解離を阻止し界面付近の結晶欠陥の発生を防止し、打ち
込まれたイオンの拡散を抑え、また、急峻なキャリヤ濃
度分布を得ることができる半導体の熱処理方法も提供す
ることを目的とするものである。The present invention was made in view of the above situation, and aims to prevent the dissociation of As, prevent the generation of crystal defects near the interface, suppress the diffusion of implanted ions, and obtain a steep carrier concentration distribution. It is also an object of the present invention to provide a method for heat treatment of semiconductors that can perform the following steps.
［発明の概要コ
本発明の半導体ウェハの熱処理方法は、イオン打込み法
を用いた半導体ウェハのデバイス製造時の熱処理の場合
に、上記イオン打込み後の上記半導体ウェハに酸化ホウ
素を封止剤として適用し、炉内が７００〜９００℃の水
素または不活性ガス雰囲気中で加熱処理を行ない、その
後酸化ホウ素が固化する前に上記半導体ウェハを取り出
し上記イオンの拡散を抑える方法である。即ち、熱処理
用保護剤として酸化ホウ素（Ｂ２０３ ）を用いる方法
である。[Summary of the Invention] The semiconductor wafer heat treatment method of the present invention includes applying boron oxide as a sealant to the semiconductor wafer after the ion implantation in the case of heat treatment during device manufacturing of the semiconductor wafer using the ion implantation method. However, in this method, heat treatment is performed in a hydrogen or inert gas atmosphere at a temperature of 700 to 900° C. in a furnace, and then the semiconductor wafer is taken out before the boron oxide solidifies to suppress the diffusion of the ions. That is, this method uses boron oxide (B203) as a protective agent for heat treatment.
Ｂ２０３の温度特性は、融点５７７℃、沸点１５００℃
以上である。半導体の熱処理温度は７００〜９００℃の
範囲が最適条件であることから、この温度範囲において
は８２０３は液体となっている。即ち、ＧａＡｓ半導体
ウェハはＢ２０３の液体中で熱処理を受けることになる
。The temperature characteristics of B203 are melting point 577℃, boiling point 1500℃
That's all. Since the optimum heat treatment temperature for semiconductors is in the range of 700 to 900°C, 8203 is a liquid in this temperature range. That is, the GaAs semiconductor wafer is subjected to heat treatment in the B203 liquid.
また、Ｂ２０３の比重１．８４に対しＧａＡｓは５．３
であることから、ＧａＡＳウェハは液体８２０ｓ中に沈
むこととなる。そして、ＧａＡｓ半導体ウェハの７００
〜９００℃におけるＡｓの・解離圧は、３ Ｘ １０
’〜２Ｘ１０４ａｔｍである。In addition, while B203 has a specific gravity of 1.84, GaAs has a specific gravity of 5.3.
Therefore, the GaAS wafer will sink into the liquid 820s. And 700 of GaAs semiconductor wafers
The dissociation pressure of As at ~900°C is 3 x 10
'~2X104 atm.
この解離圧をウェハと接する８２０３のみで補償すると
なれば、２０〜１２０＃圧の８２０３層で覆う必要があ
るが、実際の熱処理は大気圧下で行なうため２０ｍ厚前
後で十分と云える。If this dissociation pressure were to be compensated for only by the 8203 layer in contact with the wafer, it would be necessary to cover the 8203 layer with a pressure of 20 to 120 #, but since the actual heat treatment is performed under atmospheric pressure, a thickness of around 20 m is sufficient.
そして、熱処理温度から降温し、Ｂ２０３が固化する前
にウェハを取り出すことにより、ウェハにＳｉＯ２及び
５ｉ３Ｎａの場合のような熱応力を与えることがない。By lowering the temperature from the heat treatment temperature and removing the wafer before B203 solidifies, thermal stress is not applied to the wafer as in the case of SiO2 and 5i3Na.
［実施例］
以下本発明の半導体の熱処理方法を実施例を用い第１図
、第２図により説明する。第１図は実施装置及び熱処理
時の温度分布説明図、第２図は第１図の石英ボートの横
断面図である。図において、１は横型炉、２は石英反応
管、３は石英反応管の蓋、４は操作棒、５はＧａＡｓウ
ェハ、６は封止剤のＢ２Ｏ３，７は石英ボートである。[Example] Hereinafter, the semiconductor heat treatment method of the present invention will be explained using an example with reference to FIGS. 1 and 2. FIG. 1 is an explanatory diagram of the implementation apparatus and temperature distribution during heat treatment, and FIG. 2 is a cross-sectional view of the quartz boat of FIG. 1. In the figure, 1 is a horizontal furnace, 2 is a quartz reaction tube, 3 is a lid of the quartz reaction tube, 4 is an operating rod, 5 is a GaAs wafer, 6 is a sealant B2O3, and 7 is a quartz boat.
横型炉１及び反応石英管２により形成された熱処理装置
において、石英ボート７の中にＧａ Ａｓウェハ５とＢ
２０３６を挿入する。次に、石英材からなる蓋３と操作
棒４とを、石英反応管２及び石英ボート７にセットする
。石英反応管２の内部を不活性ガスのＡｒ雰囲気に置換
後、横軸に時間をとり縦軸に温度をとって示した曲線Ａ
の温度分布となるように温度調節を行ない、炉の中心付
近を８００°Ｃの均熱ゾーンとする。そして、操作棒４
にて石英ボート７を炉の中心に移動し、２０分間加熱の
熱処理を行なう。In a heat treatment apparatus formed by a horizontal furnace 1 and a reaction quartz tube 2, GaAs wafers 5 and B are placed in a quartz boat 7.
Insert 2036. Next, the lid 3 and the operating rod 4 made of quartz are set in the quartz reaction tube 2 and the quartz boat 7. Curve A shown after replacing the inside of the quartz reaction tube 2 with an inert gas Ar atmosphere, with time plotted on the horizontal axis and temperature plotted on the vertical axis.
The temperature was adjusted so that the temperature distribution was as follows, and the area near the center of the furnace was set as an 800°C soaking zone. And operation stick 4
The quartz boat 7 was moved to the center of the furnace and heat treatment was performed for 20 minutes.
このとき、８２０ａ ６は液体となりＧａＡｓウェハ５
の周りを覆うとともに、挿入前の状態ではＧａ Ａｓの
上下に８２０３が配置されていたが、比重の差によりＧ
ａＡｓウェハ５が石英ボート７の底に沈むことになる。At this time, 820a 6 becomes liquid and the GaAs wafer 5
8203 was placed above and below GaAs before insertion, but due to the difference in specific gravity, G
The aAs wafer 5 will sink to the bottom of the quartz boat 7.
ＧａＡｓウェハ５を最初から石英ボート７の底に位置さ
せた場合は、空気をＧａＡｓウェハ５の裏面に抱き込む
可能性があるため第２図に示すように上下を８２０３６
にで挾むようにすることが好ましい。即ち、底部に８２
０３６があれば対流により空気を追い出すことができる
。２０分間の熱処理後、操作棒４により石英ボート７を
引き出し冷却する。そして、Ｂ２０３が固化する館にＧ
ａ Ａｓウェハ５を取り出す。しかし、若干のＢ２０３
６がＧａ、、Ａ、ｓウェハ５に密着してしまうため、温
硫酸によりＢ２０３６を溶解する。硫酸はＧａ Ａｓに
対しエツチング作用がないため、Ｇａ Ａｓウェハ５の
表面に何等影響を与えることはない。If the GaAs wafer 5 is placed at the bottom of the quartz boat 7 from the beginning, there is a possibility that air will be trapped on the back side of the GaAs wafer 5. Therefore, as shown in FIG.
It is preferable to sandwich it between the two. i.e. 82 at the bottom
With 036, air can be expelled by convection. After heat treatment for 20 minutes, the quartz boat 7 is pulled out using the operating rod 4 and cooled. Then, in the building where B203 solidifies, G
a Take out the As wafer 5. However, some B203
Since B2036 adheres closely to the Ga, A, S wafer 5, B2036 is dissolved with warm sulfuric acid. Since sulfuric acid has no etching effect on GaAs, it does not affect the surface of the GaAs wafer 5 in any way.
このように本実施例の半導体の熱処理方法においては、
ＧａＡｓの熱処理用保護剤として溶融Ｂ２Ｏ３を用いか
つ、Ｂ２０３が固化する前にＧａＡｓウェハを取り出す
ことによりＡｓ解離を防止すると共に界面付近の結晶欠
陥の発生を抑制し、イオン打ち込みを行なった能動層の
活性化率を、従来の５１０２膜や５ｉ３Ｎａ膜を利用し
た場合に比べ１０％以上向上させることができる。In this way, in the semiconductor heat treatment method of this example,
By using molten B2O3 as a protective agent for heat treatment of GaAs and taking out the GaAs wafer before B203 solidifies, As dissociation is prevented and the occurrence of crystal defects near the interface is suppressed. The activation rate can be improved by 10% or more compared to when conventional 5102 films or 5i3Na films are used.
また、イオン打ち込み後のキャリア濃度分布を急峻にす
ることができるため、デバイスの周波数特性向上と高速
化を図ることが可能である。更に、熱処理用保護膜（Ｓ
ｉ○ｚ、ｓ！３Ｎａ）を被着するプロセスがなくなるた
めプロセスの短縮が可能である。そして、半絶縁性Ｇａ
Ａｓ結晶の電気特性均一化を図る上で熱処理は効果が
あることが判っている。鏡面仕上を行なったウェハを従
来の熱処理方法で実施すると、ＡＳの解離が発生し易く
表面荒れを生じるので再研磨が必要である。しかし、本
実施例においては熱処理後においても鏡面状態を保つこ
とが可能である。Furthermore, since the carrier concentration distribution after ion implantation can be made steep, it is possible to improve the frequency characteristics and speed up the device. Furthermore, a protective film for heat treatment (S
i○z,s! Since the process of depositing 3Na) is eliminated, the process can be shortened. And semi-insulating Ga
It has been found that heat treatment is effective in making the electrical characteristics of As crystals uniform. If a conventional heat treatment method is applied to a mirror-finished wafer, AS tends to dissociate and the surface becomes rough, thus requiring repolishing. However, in this example, it is possible to maintain a mirror-like state even after heat treatment.
第３図、第４図はスライディングボートを使用した方法
を実施時の他の実施例の説明図である。FIGS. 3 and 4 are explanatory diagrams of other embodiments of the method using a sliding boat.
図において、石英板からなる石英ボート７を第３図に示
す如く２枚重ね、下側の石英ボート７の繰り抜き凹部に
ＧａＡＳウェハ５を置きこの上に８２０３６の板を載置
し、この状態で反応炉の中央へ石英ボート７を挿入する
。Ｂ２０３６は加熱され液体となりＧａ Ａｓウェハの
周囲に入り込む。In the figure, two quartz boats 7 made of quartz plates are stacked as shown in FIG. Insert the quartz boat 7 into the center of the reactor. The B2036 is heated and turns into a liquid that enters around the GaAs wafer.
８００℃で２０分間加熱した後、重ね合せた上の石英ボ
ート７のみを第３図の矢印方向に偏位させ第４図に示す
ようにＧａＡＳウェハ５とＢ２０３６とを引き離した後
、石英ボート７全体を反応炉より引き出し冷却する。本
実施例は８２０３６を繰り変えして使用できる他、上記
実施例とほぼ同様の作用効果を有する。After heating at 800° C. for 20 minutes, only the stacked quartz boat 7 is deflected in the direction of the arrow in FIG. 3, and the GaAS wafer 5 and B2036 are separated as shown in FIG. The whole is taken out of the reactor and cooled. In addition to being able to use 82036 repeatedly, this embodiment has almost the same effects as the above embodiment.
なお、本発明はＧａ Ａｓ以外の化合物半導体にも適用
可能であることはいうまでもない。It goes without saying that the present invention is also applicable to compound semiconductors other than GaAs.
［発明の効果コ
以上記述した如く本発明の半導体の熱処理方法によれば
、Ａｓの解離を阻止し界面付近の結晶欠陥の発生を防止
し、打ち込まれたイオンの拡散を抑え、急峻なキャリヤ
濃度分布を得ることができる効果を有するものである。[Effects of the Invention] As described above, the semiconductor heat treatment method of the present invention prevents the dissociation of As, prevents the generation of crystal defects near the interface, suppresses the diffusion of implanted ions, and improves the carrier concentration. This has the effect of making it possible to obtain a distribution.
第１図は本発明の半導体の熱処理方法を実施する装置及
び熱処理時温度分布の説明図、第２図は第１図の石英ボ
ートの横断面図、第３図は本発明の半導体の熱処理方法
を実施する他の装置の第１図の石英ボート部分と同部分
の説明図、第４図は第３図の状態から熱処理し冷却する
状態の説明図である。
１：横型炉、２：石英反応管、５：ＧａＡＳ、６：Ｂ２
Ｏ３ニア：石英ボート。
代理人 弁理士 佐 藤 不二雄
軍４ｔ２１FIG. 1 is an explanatory diagram of an apparatus for carrying out the semiconductor heat treatment method of the present invention and temperature distribution during heat treatment, FIG. 2 is a cross-sectional view of the quartz boat of FIG. 1, and FIG. 3 is a semiconductor heat treatment method of the present invention. FIG. 4 is an explanatory diagram of the same part as the quartz boat part in FIG. 1 of another apparatus for carrying out the process, and FIG. 4 is an explanatory diagram of a state in which heat treatment and cooling are performed from the state in FIG. 3. 1: Horizontal furnace, 2: Quartz reaction tube, 5: GaAS, 6: B2
O3 Near: Quartz boat. Agent Patent Attorney Sato Fujio Gun 4t21
Claims (2)
製造時の熱処理方法において、上記イオン打込み後の上
記半導体ウェハに酸化ホウ素を封止剤として適用し、炉
内が７００〜９００℃の水素または不活性ガス雰囲気中
で加熱処理を行ないその後降温し、酸化ホウ素が固化す
る前に前記半導体ウェハを取り出して、上記イオンの拡
散を抑えることを特徴とする半導体ウェハの熱処理方法
。(1) In a heat treatment method during device manufacturing of a semiconductor wafer using the ion implantation method, boron oxide is applied as a sealant to the semiconductor wafer after the ion implantation, and the inside of the furnace is hydrogen or nitrogen at 700 to 900°C. A method for heat treatment of a semiconductor wafer, which comprises performing heat treatment in an active gas atmosphere, then lowering the temperature, and removing the semiconductor wafer before the boron oxide solidifies to suppress diffusion of the ions.
ェハの上下面に接触させた状態で上記炉内に挿入し加熱
する特許請求の範囲第１項記載の半導体の熱処理方法。(2) The semiconductor heat treatment method according to claim 1, wherein the boron oxide is inserted into the furnace and heated while being in contact with the upper and lower surfaces of the semiconductor wafer in a quartz boat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1259486A JPS62171117A (en) | 1986-01-23 | 1986-01-23 | Heat treatment of semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1259486A JPS62171117A (en) | 1986-01-23 | 1986-01-23 | Heat treatment of semiconductor wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62171117A true JPS62171117A (en) | 1987-07-28 |
Family
ID=11809673
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1259486A Pending JPS62171117A (en) | 1986-01-23 | 1986-01-23 | Heat treatment of semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62171117A (en) |
-
1986
- 1986-01-23 JP JP1259486A patent/JPS62171117A/en active Pending
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