JPS62166450A - History analyzing device for logical unit - Google Patents

History analyzing device for logical unit

Info

Publication number
JPS62166450A
JPS62166450A JP61009313A JP931386A JPS62166450A JP S62166450 A JPS62166450 A JP S62166450A JP 61009313 A JP61009313 A JP 61009313A JP 931386 A JP931386 A JP 931386A JP S62166450 A JPS62166450 A JP S62166450A
Authority
JP
Japan
Prior art keywords
power source
history
information processing
main power
battery power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61009313A
Other languages
Japanese (ja)
Inventor
Tadashi Matsuzaki
松崎 正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61009313A priority Critical patent/JPS62166450A/en
Publication of JPS62166450A publication Critical patent/JPS62166450A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the reliability of a history analyzing device by performing switching to a battery power source on error occurrence. CONSTITUTION:A storage circuit 4 is stored with the history of an information processor 1 in operation. If the information processor 1 becomes abnormal and an error detecting circuit 2 outputs an error detection signal ES, a power source switch 7 switches the power supply to the storage circuit 4 from a main power source 5 to the battery power source 6. The power supply from the battery power source 6 to the storage circuit 4 is carried on until the power supply is switched to the main power source 5 manually when the history is analyzed later.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、計算機等に適応される、プログラムに従って
所定の動作を行なう論理装置の履歴解析装置に関するも
ので、特にエラー発生時から以前における論理装置の各
状態量を記録保持する事により、エラー発生原因の探索
をする履歴解析装置に関するものである。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a history analysis device for a logic device that performs a predetermined operation according to a program, which is applied to a computer, etc. The present invention relates to a history analysis device that searches for the cause of an error by recording and holding each state quantity of the device.

〔従来の技術〕[Conventional technology]

第2図は例えば特開!49−135540号公報に示さ
れ友従来の論理装置の履歴解析装置を示すブロック図で
あり、図において1は本装置によってその動作履歴が解
析される対象の情報処理装置、2はエラー検出回路で、
情報処理装置1に内蔵されており、自装置における異常
全検出して、検出信号を出力する、3は履歴解析装置の
制御回路、4は記憶回路で、情報処理装置1の各種状態
量全記憶する。
Figure 2 is an example of a special edition! 49-135540 is a block diagram showing a conventional logic device history analysis device, in which 1 is an information processing device whose operation history is analyzed by this device, and 2 is an error detection circuit. ,
Built into the information processing device 1, it detects all abnormalities in the device itself and outputs detection signals. 3 is a control circuit of the history analysis device, and 4 is a storage circuit that stores all the various state quantities of the information processing device 1. do.

次に動作について説明する。まず情報処理装置1が正常
で、エラー検出回路2が異常を検出していない時には、
制御回路3は、情報処理装置1のプログラムの動作の1
ステツプ毎に、情報処理装置1のアドレス、データを記
憶回路4に書き込んで行く、ここで、若し、記憶容量が
プログラムのN番目のステップで埋まってしまうと、N
+1番目のステップからは、記憶回路4の先頭から上書
きするように制御する。この様にして、情報処理装置1
のアドレス・データ等のプログラム実行履歴は無限ルー
プでエンドレスに記憶回路4に書き込まれる。そこで、
情報処理装置IK異常が発生して、エラー検出回路2が
、検出信号を出力すると、制御回路3は記憶回路4への
書込みを中止する。従って記憶回路4の内容は、エラー
が検出されてからそれ以前の実行履歴が記憶回路4の記
憶容量の分だけ格納される。
Next, the operation will be explained. First, when the information processing device 1 is normal and the error detection circuit 2 does not detect any abnormality,
The control circuit 3 controls one of the program operations of the information processing device 1.
At each step, the address and data of the information processing device 1 are written to the memory circuit 4. If the memory capacity is full at the Nth step of the program,
From the +1st step onwards, the memory circuit 4 is controlled to be overwritten from the beginning. In this way, the information processing device 1
The program execution history, such as addresses and data, is endlessly written into the memory circuit 4 in an infinite loop. Therefore,
When an abnormality occurs in the information processing device IK and the error detection circuit 2 outputs a detection signal, the control circuit 3 stops writing to the memory circuit 4. Therefore, the contents of the memory circuit 4 include the execution history from when an error is detected until the time when the error is detected and stored in an amount equal to the memory capacity of the memory circuit 4.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の論理装置の履歴解析装置は以上の様に構成されて
いるので、若し、対象の情報処理装置1のエラー発生か
ら以前の履歴を格納した状態のまま、解析にかかる前に
停電等が発生すると、せっかく記憶した内容を一瞬のう
ちに失ってしまうといった問題点があった。
Since the conventional logic device history analysis device is configured as described above, if a power outage etc. occurs after an error occurs in the target information processing device 1 and the previous history is stored, but before the analysis starts. When this occurs, there is a problem in that the information that has been memorized is lost in an instant.

この発明は上記のような問題点を解消するためになされ
たもので、停電等が発生しても記憶内容を消失しない論
理装置の履歴解析装置を得る事を目的とする。
The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a history analysis device for a logical device that does not lose its memory contents even if a power outage occurs.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る論理装置の履歴解析装置は、記憶回路に
専用のバッテリー電源を付加し、エラー検出回路がエラ
ー検出信号を出力すると同時に、記憶回路の電源を主電
源からバッテリー電源に切り、替えるようにしたもので
ある。
The logic device history analysis device according to the present invention adds a dedicated battery power source to the memory circuit, and switches the power source of the memory circuit from the main power source to the battery power source at the same time as the error detection circuit outputs an error detection signal. This is what I did.

〔作用〕[Effect]

この発明における記憶回路への電源供給はエラー発生に
よって主電源からバッテリー電源に切替わり、以後マニ
アルでバッテリー電源から主電源に切替えられるまでバ
ックアップ全続行する。
In this invention, the power supply to the memory circuit is switched from the main power supply to the battery power supply when an error occurs, and the backup continues until the power supply is manually switched from the battery power supply to the main power supply.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。図中
第2図と同一の部分は同一の符号をもって図示した。第
1図にお論で、6はバッテリー電源、7は電源切替器で
、主電源5からの出力とバッテリー電源6からの出力と
を切替えるもので、電源切替器7によって選択される電
源は、記憶回路4に供給される。
An embodiment of the present invention will be described below with reference to the drawings. In the figure, the same parts as in FIG. 2 are designated by the same reference numerals. As can be seen in FIG. 1, 6 is a battery power source, and 7 is a power switch, which switches between the output from the main power source 5 and the output from the battery power source 6. The power source selected by the power source switch 7 is: The signal is supplied to the memory circuit 4.

次に動作について説明する。まず電源回路以外は第2図
に示した従来例とをく同一の動作を行う。
Next, the operation will be explained. First, except for the power supply circuit, the operation is the same as that of the conventional example shown in FIG.

そして、記憶回路4に情報処理装置1の動作中の履歴が
格納される。そこで情報処理装置1に異常が発生し、エ
ラー検出回路2が、エラー検出信号ESt−出力すると
、電源切替器7は、前記エラー検出信号ESを受け、記
憶回路4への電源供給を主電源5からバッテリー電源6
に切替える。バッテリー電源6からの記憶回路4への電
源供給は、後で履歴の解析を行うときマニュアルで主電
源5に切替えるまで続けられる。
Then, the history of the operation of the information processing device 1 is stored in the storage circuit 4. Then, when an abnormality occurs in the information processing device 1 and the error detection circuit 2 outputs the error detection signal ESt-, the power supply switch 7 receives the error detection signal ES and switches the power supply to the storage circuit 4 from the main power supply 5. battery power from 6
Switch to. The power supply from the battery power source 6 to the memory circuit 4 continues until it is manually switched to the main power source 5 when analyzing the history later.

なお、上記実施例では、エラー発生の前後で、電源供給
を主電源からバッテリー電源に切替える様に回路構成し
たが、主電源に電源低下検出回路を設け、電源低下と、
エラー発生の条件のANDで、バッテリー電源に切替わ
る様にすると、より、バッテリー電源の放電を節約出来
て、より長く、エラー発生後の履歴を格納することが出
来る。
In the above embodiment, the circuit is configured to switch the power supply from the main power source to the battery power source before and after an error occurs, but a power drop detection circuit is provided in the main power source to detect power drop and
If the error occurrence conditions are ANDed to switch to the battery power source, the discharge of the battery power source can be further saved and the history after the error occurrence can be stored for a longer period of time.

[発明の効果] 以上のように、この発明によれば、記憶回路の電源を、
履歴解析対象の情報処理装置のエラー発生以前は主電源
に接続して訃き、 エラー発生と同時にバッテリー電源に切替える様に回路
構成したので、履歴解析装置の信頼性が格段に向上する
という効果がある。
[Effects of the Invention] As described above, according to the present invention, the power supply of the memory circuit is
The circuit is configured in such a way that the information processing equipment subject to history analysis is connected to the main power supply before an error occurs, and then switches to battery power as soon as the error occurs, which has the effect of significantly improving the reliability of the history analysis equipment. be.

【図面の簡単な説明】 第1図はこの発明の一実施例による情報処理装置の履歴
解析装置を示すブロック図、第2図は従来の情報処理装
置の履歴解析装置を示すブロック図である。 図において、lは情報処理装置、2Fi工ラー検出回路
、3は制御回路、4は記憶回路、5は主電源、6はバッ
チ・リー電源、7は切替器である。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a history analysis device for an information processing device according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional history analysis device for an information processing device. In the figure, 1 is an information processing device, 2Fi factory detection circuit, 3 is a control circuit, 4 is a storage circuit, 5 is a main power source, 6 is a batch power source, and 7 is a switch.

Claims (2)

【特許請求の範囲】[Claims] (1)情報処理装置の動作状態からエラー動作をエラー
検出回路によつて検出し、該エラー検出信号を制御回路
に伝達して論理動作エラーとしての履歴を記憶回路に記
憶する論理装置の履歴解析装置において、前記対象とす
る情報処理装置の履歴を記憶する記憶回路への電源とし
て主電源とバッテリー電源とを備え、通常動作時は前記
主電源に接続され情報処理装置にエラーが発生すると電
源切替器によつて主電源からバッテリー電源に切換えて
電源供給するようにしたことを特徴とする論理装置の履
歴解析装置。
(1) History analysis of a logic device in which an error detection circuit detects an error operation from the operating state of the information processing device, transmits the error detection signal to a control circuit, and stores a history of logic operation errors in a storage circuit. The device includes a main power source and a battery power source as power sources for a storage circuit that stores the history of the target information processing device, and is connected to the main power source during normal operation and switches the power supply when an error occurs in the information processing device. 1. A history analysis device for a logic device, characterized in that power is supplied by switching from a main power source to a battery power source depending on the device.
(2)前記主電源とバッテリー電源の切替えは対象の情
報処理装置に異常が発生した時に主電源からバッテリー
電源に切替わり、事後、記憶内容の解析時に手動でバッ
テリー電源から主電源に切替え可能にしたことを特徴と
する特許請求の範囲第1項記載の論理装置の履歴解析装
置。
(2) The switching between the main power source and the battery power source is such that when an abnormality occurs in the target information processing device, the power source is switched from the main power source to the battery power source, and after the fact, it is possible to manually switch from the battery power source to the main power source when analyzing the memory contents. A history analysis device for a logical device according to claim 1, characterized in that:
JP61009313A 1986-01-20 1986-01-20 History analyzing device for logical unit Pending JPS62166450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61009313A JPS62166450A (en) 1986-01-20 1986-01-20 History analyzing device for logical unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61009313A JPS62166450A (en) 1986-01-20 1986-01-20 History analyzing device for logical unit

Publications (1)

Publication Number Publication Date
JPS62166450A true JPS62166450A (en) 1987-07-22

Family

ID=11716981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61009313A Pending JPS62166450A (en) 1986-01-20 1986-01-20 History analyzing device for logical unit

Country Status (1)

Country Link
JP (1) JPS62166450A (en)

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