JPS62159258A - Bus diagnosis system - Google Patents

Abstract

PURPOSE:To observe the state of a bus by providing a latch circuit on a signal line at the READ side of a bus control part, adding a specific address to the latch circuit and performing the latch writing and reading actions. CONSTITUTION:In a bus diagnosis mode are written to the specific address X of a data latch 221. Then data are delivered onto a bus through a transmission buffer 21 and also written to the latch 221. Then the contents of the latch 221 are read through a reception buffer 22 after the address X is read. Therefore the written data is different from the read data if a line is fixed to Vcc or GND on the data lines (BD0-BD7) on the bus. Thus a defective area can be decided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a BUS diagnostic method when a plurality of devices are connected to a plurality of mutually related signal lines (so-called BUS).

[Conventional technology]

The conventional BUS fault diagnosis method has the disadvantage that the circuit becomes complicated.

[Problem that the invention seeks to solve]

A BUS system is used to connect multiple devices in a computer system.

Further, device diagnosis is generally performed as one of the means for improving system reliability. As a result, the ability to detect abnormalities inside the device has greatly improved.

However, the BUS that connects the control side (usually the CPU) and the device
No diagnosis has been made for this. As a result, if even one of the devices connected to the BUS were to fail, the defective device would affect the BUS, making all BUS lines inoperable. Furthermore, in such a state, the diagnostic results of the device cannot be correctly transmitted to the CPU, and the diagnostic function becomes meaningless.

In other words, without the diagnostic function of the BUS, the diagnostic function of each device is meaningless.

[Means for solving problems]

As already mentioned, the problem is that the BUS cannot be diagnosed. In particular, the signal line on the BUS is logically N H'g
The biggest problem is when the temperature is fixed at h% or LOW, including the effect on other devices.

In order to solve this problem, it is only necessary to output arbitrary data on the BUS and monitor its status. Therefore, in the present invention, a circuit is provided on the READ side signal line of the BUS control section, and this It was decided to assign a specific address to the latch and to perform programming and reading of this latch.

[Effect]

There are four types of BUS defects:

1) Disconnection of BUS + t) Adhesion to VCC in the package connected to BUS 1it) Adhesion to GND in the package connected to BUS IV) Disconnection in the package connected to BUS Among these, Items 11) and 111) affect other packages (in other words, make the entire BUS defective) and must be detected.

As shown in FIG. 1, each driver drives a BUS and is used inside the package. Therefore, the state of the BUS (fixed to VCC, fixed to GND, etc.) can be observed within the package.

[Implementation row]

This will be explained using FIGS. 1, 2, and 3.

FIG. 1 is a diagram showing details of the embodiment.

FIG. 2 is an example of the system.

Figure 3 shows a breakdown of the system configuration.

As shown in FIG. 2, one BUS controller and a plurality of ■0 controllers are connected to one BUS. I
The O controller controls IO according to information from the BUS controller.

For this purpose, the information from u and the BU8 controller must be correct. On the other hand, as shown in Figure 3, the BUS
The controller is connected to the BUS by a plurality of transmit buffers and receive buffers.

The transmit buffers 21, 23, 31, etc. fix the BUS to VCC or GND depending on the failure mode. For example, if the transmission buffer 31 is fixed to VCC, the BUS is always connected regardless of the output of the transmission buffer 21) (ig
It becomes h.

In case of such a failure, the BUS controller side
It would be good if the US could monitor it.

A BUS monitoring method will be described using FIG.

Now, BU8Vi, DXA, 5TROBE, WRITE.

It is assumed that the signal is composed of five types of ERROR signals.

5TROBB indicates the direction of the synchronization signal and WRITEfi data. The data is output to BU8 through the transmission buffer 21. Further, data on the BUS is taken in through the data latch 221 and the reception buffer 22.

The data latch 221 is assigned a specific address and an X.

When accessing the ■0 controller on the A regular BUS, the data latch 221 is passed. For this purpose, an LSI such as 743) 3 can be used.

When diagnosing the BUS, n data is loaded into a specific address X. Then, the data is sent to the BUS through the transmission buffer 21.
It is output to the top and written to the data latch 221. Next, when specific address X is read, the contents of data latch 221 are read through reception buffer 22. Therefore, B.U.
Data 5 in on S (BD6~sDt) on - cvc
If the line fixed to UGND breaks, there is a difference between the written data and the read data, and the defective location can be identified. Naturally, in order to detect both vCC fixation and GND fixation, two round-up readings are required. (Use different data such as IT-included data 'kXAA, X55, etc., and use data that allows you to know which line is defective.)

In addition, other signal lines can be determined from the fact that specific address X cannot be deleted normally. Also, if the data latch is made to operate at all times when reading data from a specific address other than In addition, since synchronization can be performed using a data latch within the BUS controller, there is also the advantage that the controller can be simplified with less effort. (In this case, there is a triple advantage that the diagnostic register and the synchronization register can be shared, and the synchronization register on the IO controller side is not required.) [Effects of the Invention] According to the present invention, on the BUS It is possible to detect the fixation of VCC or GND to the product, and the influence of BO2 defects on other products can be minimized.

Furthermore, since the diagnostic register can always be used as a synchronization register, there is no need to distribute the synchronization registers.

[Brief explanation of drawings]

FIG. 1 is a detailed diagram of an embodiment of the present invention, FIG. 2 is a diagram showing an example of a system using the present invention, and FIG. 3 is a detailed diagram of the system. 2... BUS controller, 21... Transmission buffer, 22... Reception buffer, 23... Transmission buffer,
24...Reception buffer, 3...Work 0 controller,
31... Transmission buffer, 32... Reception buffer, 3
3... Reception buffer, 34... Transmission buffer, 4.
... IO controller, 5... IO controller.
/"-"'-"' 5. Agent Patent attorney Katsuo Ogawa -1/j No. l Fig. 2

Claims (1)

[Claims] 1. In a system where a BUS controller and multiple IO control devices are connected to one BUS, create a register in the BUS controller that stores the BUS status, connect this register directly to the BUS, and assign a specific address to that address. A BUS diagnostic method is characterized in that a BUS can be diagnosed by writing and reading.