JP2765659B2 - Self-test method for data processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Overview] Regarding a self-test method for a data processing device having a self-test function by firmware, a plurality of necessary items can be obtained by using a register having an external output terminal among existing registers in the device. A processor for executing a self-test on a data processing device equipped with a processor and for storing a test program for the self-test, wherein the test is to enable localization of a failure point by a test. It is configured to have a program storage means and a test result storage means having an output terminal for storing the result of the self test and outputting the stored contents to the outside of the data processing device.

[Industrial applications]

The present invention relates to a method for testing various devices equipped with a microprocessor, and more particularly, to a self-test method for a data processing device having a self-test function by firmware.

In recent years, among data processing apparatuses and the like including a microprocessor, those having a self-test function by firmware are increasing. Generally, as an overall test of the apparatus, a functional test is performed by using a test program after assembling various apparatuses such as the data processing apparatus into one system. Before the overall test, each function of the system is configured. A unit test is performed for each unit. In this unit test, the man-hours of the whole system test can be reduced by checking the failure of each unit as much as possible. In this sense, there is an increasing demand for a device equipped with a microprocessor, which has a self-test function for performing a test at a unit test stage.

[Conventional technology]

The self-test of the data processing device equipped with the microprocessor as described above is executed by, for example, firmware stored in a ROM. Conventionally, there are the following two methods for displaying the result of the self-test. First
This method is used when the device has visual display means such as a lamp or LED that indicates the operating status of the device when it is actually used online. It is displayed depending on the state.

In the second method, the self test results are stored in a register or a memory inside the apparatus, and the stored test results are read out by a higher-level control device that controls the apparatus to know the test results.

[Problems to be solved by the invention]

However, the above-described method has problems such as a small amount of information obtained from the self-test and an increase in test scale. That is, in the first method, the test results are displayed only by turning on / off the lamps and the like, and the number of lamps and the like is small. And it is difficult to localize a failure point. Further, in the second method, it is necessary to connect a higher-level control device or a special tester, etc., even though it is a unit test of the device to be tested, which increases the test scale and costs. There is.

SUMMARY OF THE INVENTION It is an object of the present invention to enable localization of a fault location by testing a plurality of necessary items using an existing register having an external output terminal among existing registers.

[Means for solving the problem]

FIG. 1 is a block diagram showing the principle of the present invention. In the first invention, the processor 2 in the data processing device 1 performs a self test on the data processing device 1. The test program storage means 3 is, for example, a read-only memory (RO
M) and memorize the test program of the self-test. The test data storage means 4 is, for example, a random access memory (RAM) and stores various test data during execution of the self test. The test result storage means 5 is, for example, a register and stores the result of the self test. The test result storage means 5 has an output terminal for outputting the stored test results to the outside of the data processing device 1.

In the second invention, the processor 2 executes a self-test of a plurality of items effective for proper diagnosis of the own device, and the test program storage means 3 stores the test program of the plurality of items in the test data storage means 4. Is the same as that of the first invention except that the test result storage means 5 stores various test data during execution of the multi-item self-test and the test result storage means 5 stores the results of the multi-item self-test.

[Action]

In the first invention, the test program storage means 3
The self-test is executed by the processor 2 using the test program stored in the. Various test data during the test execution is stored in the test data storage means 4 as necessary.
Is temporarily stored. When the test is completed, the test result is stored in the test result storage means 5 by the processor 2.
Since the test result storage means 5 has an output terminal for outputting the stored contents to the outside of the data processing device 1, the result of the self-test is stored in hardware by connecting an appropriate measuring instrument to this output terminal. Is detected.

In the second invention, the operation is the same as that of the first invention except that a self-test of a plurality of items effective for accurate diagnosis of the data processing device is executed.

As described above, according to the present invention, a self-test result having an output terminal to the outside, for example, stored in a register can be externally detected by a measuring instrument.

〔Example〕

FIG. 2 shows an embodiment of a data processing apparatus to which the self-test method of the present invention is applied, and FIG. 3 shows an example of items of the self-test.
In FIG. 2, reference numeral 6 denotes a microprocessor unit (MP
U) and 7 are read-only memories (ROM) for storing self-test firmware, 8 are random access memories (RAM) that can read and line test data and the like as needed during test execution, CNT _a 9 and CNT _{Reference numeral} b10 denotes various control circuit units specific to this device. Also, for example, in CNT _b 10
Register with address assigned by MPU6 (RE
G) Assume that there are A to E11, and the contents of these registers can be output from an external output terminal. CNT _x 12 in CNT _b 10
Denotes a control circuit unit other than the register 11 in the CNT _b 10.

FIG. 3 shows a self-test item, in which a single item test is performed on various components of the apparatus. The self-test starts when the data processing device is turned on.
The test of each item is executed by the MPU 6, and the result is set in the register 11 in the CNT _b 10 at the end of the test. The set contents are retained until the power is turned off, and the result can be checked by connecting a measuring instrument to the output terminal of the register 11. Here, since the registers 11 are necessary for the actual online operation of the device and are not specially provided for the self-test, the number of registers and the bit width vary depending on the device.

As described above, a feature of the self-test method according to the present invention is that, as a means for displaying a self-test result, an existing register used for its original purpose during online operation and the contents of which can be taken out from an output terminal. The point is to use etc. Further, since the test result can be displayed using a plurality of bits, there is an advantage that the localization of a fault is facilitated, and the output of the error display register can be directly detected by the measuring instrument, thereby enabling a test by itself.

Next, a serial data communication controller (DCC) controlled by a command from a central processing unit in a data processing system will be described as an embodiment of the present invention. FIG. 4 is a block diagram of a telephone exchange system including the communication control device (DCC). In the figure, a network (NW) 15 to which a telephone terminal 13 is connected via a line concentrator (LC) 14
A central controller (CC) 17, a main memory (MM) 18, and a peripheral bus controller (PBC) 19, which corresponds to a general channel controller, inside a main processor (MPR) 16 for controlling the
A serial data communication control device (DCC) 20 is connected to the peripheral bus control device 19, and a host computer 21 external to the MPR 16 or a personal computer (P
C) Control communication with 22.

FIG. 5 shows a configuration block diagram of a serial data communication control device (DCC). In the figure, 23 is an MPU, 24 is a ROM,
25 is RAM. Reference numeral 26 denotes an 8-bit command register (CMR) for receiving a command from the central control unit (CC) 17, for example. Reference numeral 27 denotes an 8-bit status register (STR) for transmitting a status to the central control unit (CC) 17, which has an external output terminal and operates as a test result display register during a self-test.

LCNT 28 is a line control unit, and is a multi-protocol serial data controller (MPSC) 29 which is an LSI for controlling transmission of line data by serial-to-parallel conversion.
DMA controller (DMAC) 30 for controlling DMA data transfer between 29 and RAM 25, and self-loop control circuit SLC for loopback test of transmission data and reception data of line (No. 0, No. 1) part ₀ 31 and SLC ₁ 32. Here, the loopback test is to compare the transmitted data with the loopback received data to determine whether the own device or the communication partner device has failed. If the result of the internal loopback test is normal, there is a fault in the partner device.

FIG. 6 shows an example of a test item of the self-test. For example, in the MPU test of test No. 0, the read / write function and the arithmetic function of the register of the MPU are checked. When the power is turned on, the tests from No. 0 to No. 6 are sequentially executed by the firmware stored in the ROM 24, and the results are saved in the RAM 25. When all the tests are completed, the result is set in the status register 27.

FIG. 7 shows an example of storing test results in the status register 27 after the completion of the self-test. In the figure, test No. _{0 is} sequentially performed from the least significant bit b0 of the 8-bit status register 27.
Test results from No. to No. 6 are stored. And the contents of each bit is output to the terminal T ₀ to T _6, for example,
'H' level terminates normally, if the 'L' level to an abnormal termination, it is possible to know the self test results by measuring the output of the terminal from T ₀ to T ₆ in the measuring instrument.

In this test result, for example, test No. 4 is normal
If No. 6 is abnormal, the program transfer of the No. 1 line, that is, the data transfer by the program of the MPU 23 instead of the DMA transfer is normal and the DMA transfer is abnormal, and the DMA controller (DMAC) 30 fails. It turns out that there is, and it is possible to localize the fault location. On the other hand, in the conventional method, for example, in the lamp display of the result, when all the tests in FIG. 6 are normal, only “normal” is displayed as a whole, and the localization of the fault location is not performed. Impossible. By further increasing the number of test items or combining appropriate test items, more detailed device diagnosis can be performed.

〔The invention's effect〕

As described above, according to the present invention, by using a register inside the device having an external output terminal as a result display register, it becomes possible to perform a single test,
In addition, a failure point can be localized by a test of a plurality of items, which is effective in reducing the number of test steps as a whole.

[Brief description of the drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a diagram of an embodiment of a data processing apparatus for performing a self-test of the present invention, FIG. 3 is a diagram showing an example of a self-test item, and FIG. FIG. 5 is a block diagram showing the configuration of a serial data communication control device (DCC). FIG. 6 is a diagram showing an example of DCC test items. FIG. 7 is a diagram showing an example of storing test results in a status register. It is. 6, 23: microprocessor, 7, 24: read-only memory (ROM), 8, 25: random access memory (RAM), 11: register, 20: serial data communication control device (DCC), 27 ... Status register.

Claims (2)

(57) [Claims] 1. A data processing device connected online and equipped with a processor, a processor for executing a self test on the data processing device, test program storage means for storing a test program for the self test, and the data An output terminal for storing transmission / reception data in an online operation during normal operation of the processing device, storing a result of the self test during execution of the self-test, and outputting the stored content to the outside of the data processing device. And a test result storage means. 2. A data processing apparatus which is connected online and has a processor, a processor for executing a self-test of a plurality of items for the purpose of diagnosing the data processing apparatus, and a test for storing a test program of the multi-item self test. Program storage means; test data storage means for storing test data during execution of the plurality of items self-test; transmission / reception data in online operation during normal operation of the data processing device; Test result storage means having an output terminal for storing a result of the item self-test and outputting the stored contents to the outside of the data processing device.