JPS62157019A - State display device for camera - Google Patents

Abstract

PURPOSE:To confirm reception information in the transmission side by receiving various information of a camera transferred from the transmission side in serial and transmitting them to the transmission side in serial to confirm information. CONSTITUTION:When various information SI of the camera is transferred in serial in 8-bit units, information SI is inputted to a shift register 11 through an inverter 12 and is stored there. Each time information SI is inputted to the shift register 11, a signals of the most significant bit of the register 11 is pushed out to a carry flag part 20 and is outputted to the transmission side through the inverter 21. For example, the transmission side transfers 8-bit information twice repeatedly, and information SO having the same contents of transfer information SI is inputted from the inverter 21 at the second transfer of 8-bit information if information is transferred correctly. The transmission side collates inputted information SO and preceding transferred information SI and transfers correct information in case of error to prevent erroneous display.

Description

[Detailed description of the invention] (Technical field) The present invention relates to a camera status display device.

(Prior Art) A camera status display device reads various transferred camera information, latches it with a latch section, and displays it on a display section.

However, this camera status display device may display incorrect information if the information changes in the circuit that latches the transferred camera information or if an error occurs in reading the information due to the influence of noise. The erroneous display will continue to appear until the correct information is transferred to the primary and the contents of the latch section are rewritten.

Therefore, a method has been devised in which the transfer information is confirmed on the control side.In this method, the transfer information is written from the serial input terminal to a bidirectional shift register that has a terminal that determines the direction of the information, and the serial output of this shift register is Information is read from the terminal and confirmed. However, since this shift register is bidirectional, its structure is complicated, which is disadvantageous when it is integrated into an IC (integrated circuit).

Another method is to process information according to certain rules on the sending side, and then treat information that does not meet the rules as false information on the receiving side. However, with this method, it is the sending side.

The circuit configuration on both the receiving side becomes complicated.

(Objective) It is an object of the present invention to improve the above-mentioned drawbacks and provide a camera status display device with a simple configuration that allows the transmitting side to confirm received information.

(Yokunari) The present invention is characterized in that the reception output means receives various camera information serially transferred from the transmitting side and serially transmits it to the transmitting side to confirm the information.

Next, examples of the present invention will be described.

FIG. 1 shows an embodiment of the invention. In the camera, camera information +Ti5I to be displayed from the transmitting side is serially transferred in units of 8 bits, for example, and at the same time, the serial clock SCK and chip select signal C3 are transferred, and the shift register 11 receives the information SI and the serial clock. SCK is input through inverters 12 and 13, respectively, and information SI is stored.

The contents of the shift register 11 are output in parallel and then latched by the latch sections 141 to 14n, and the contents of the latch sections 141 to 14n are displayed on the display section 16 by the display control section 15. In this case, the counter 17 counts the serial clock from the inverter 13, and the output of the counter 17 is added to the latch/register control unit 18. At the same time, the chip select signal C5 is input via the inverter 19, and the latch/register control unit 18 inputs the chip select signal C5 to the shift register 11 and the latch. The information writing operation of units 141 to L4n is controlled. The shift register 11 has an 8-bit configuration and a carry flag section 20, and each time information SI is input, the signal of the uppermost bit is pushed out to the carry flag section 20.
h and is output to the transmitting side via the inverter 21. On the transmitting side, for example, the 8-bit information SI is sent to the serial clock S.
CK and the chip select signal C5 are repeatedly transferred twice, and if this transfer is performed correctly, when the 8-bit information is transferred for the second time, information SO with the same content as the transfer information SI comes in from the inverter 21. . The transmitting side also sends 8-bit information to the serial clock SCK.

If a 1-byte dummy signal is transferred together with the serial clock SCK and chip select signal C3 after being transferred together with the chip select signal C3, 8-bit information SO will also be received in the same way. The sending side has an error check means that checks whether there is an error in the transferred information SI by comparing the incoming information SO with the previously transferred information S, and if there is an error, it is correct. Transfer information to prevent mislabeling.

FIG. 2 shows another embodiment of the present invention. In this embodiment, the shift register 11 is composed of D flip-flops 111 to 11g in the above embodiment, and the non-inverting output terminal of the first-stage flip-flop 111 (the data of the second-stage flip-flop 112) reads the transfer information SI using the serial clock SCK. The signal from the terminal) is output to the transmitting side via the inverter 21. By doing this, the transfer data is not outputted to the sending side with a one-byte delay as in the above embodiment, and whether the transferred information SI has been read into the shift register is determined by the transfer information SI and the output information S.
The error checking means on the transmitting side can simultaneously compare and check the data and O. However, the above embodiment is of a type in which transfer information is output to the sending side with a delay of 1 byte;
This is equivalent to having a byte worth of external memory, and the applications are wide-ranging.

(Effects) As described above, according to the present invention, various camera information that is serially transferred is received and serially output to the transmitting side to confirm the information, so that the transmitting side can confirm the received information. It can be done easily and the configuration is simple.

[Brief explanation of drawings]

FIGS. 1 and 2 are block diagrams showing each embodiment of the present invention. U, Ut~118...shift register, 14.1/
11 to 14n: latch section, 16: display section. 1η 2nd Procedural Amendment March 25, 1985 Patent Application No. 299242 of 1985 Title of the invention Camera status display device 3 Person making the amendment Relationship to the case Name of patent applicant Title (674) Ricoh Co., Ltd. 4, agent
Humanization Office 4-5-4 Kyodo, Setagaya-ku, Tokyo "
``Detailed Description of the Invention'', ``Brief Explanation of the Drawings'', page 5, line 18, insert the following sentence after ``Wide.'' In addition, instead of outputting the carry flag serially in the embodiment shown in FIG. 1, an output latch section 22 is provided as shown in FIG. The transfer information may be latched by the clock and read out via the inverter 21. In this case, the transfer information is written to the shift register 11 and latched to the display latch sections 141 to 14n, and the byte is also written to the output latch section 22. It can be latched for each byte, and read and used when the next 1 byte of transfer information is sent.6" (2) "And Figure 2" in the 6th line of the same page 6 from r to 3rd milk. correct. (3) Add attached Figure 3 to the drawings.

Claims (1)

[Claims] In the camera, a reception/output means receives various information of the camera serially transferred from the transmitting side and serially outputs it to the transmitting side for confirmation of the information, and the information received by the reception/output means is latched. A camera status display device comprising a latch section and a display section that displays information latched by the latch section.