JPS62155507U - - Google Patents
Info
- Publication number
- JPS62155507U JPS62155507U JP4317886U JP4317886U JPS62155507U JP S62155507 U JPS62155507 U JP S62155507U JP 4317886 U JP4317886 U JP 4317886U JP 4317886 U JP4317886 U JP 4317886U JP S62155507 U JPS62155507 U JP S62155507U
- Authority
- JP
- Japan
- Prior art keywords
- base
- resistor
- transistor
- current limiting
- limiting resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Amplifiers (AREA)
Description
第１図はこの考案によるミユーテイング回路の
一実施例を示す回路図、第２図は第１図の等価回
路図、第３図はこの考案の他の実施例を示す回路
図、第４図は従来のミユーテイング回路の回路図
、第５図は第４図の等価回路図、第６図は第４図
におけるミユーテイングオフ時の信号ライン電圧
を示す波形図である。
３，９……ミユーテイングトランジスタ、１２
……ダイオード、６……ミユーテイングスイツチ
。
Figure 1 is a circuit diagram showing one embodiment of the muting circuit according to this invention, Figure 2 is an equivalent circuit diagram of Figure 1, Figure 3 is a circuit diagram showing another embodiment of this invention, and Figure 4 is FIG. 5 is an equivalent circuit diagram of FIG. 4, and FIG. 6 is a waveform diagram showing the signal line voltage when muting is off in FIG. 4. 3, 9...mutating transistor, 12
... Diode, 6... Muting switch.
Claims (1)
と基準電位間に第１、第２のスイツチングトラン
ジスタを直列接続し、前記第１のトランジスタの
ベースに第１の電流制限用抵抗を接続すると共に
第２のトランジスタのベースには第２の電流制限
用抵抗とダイオードの直列回路を接続し、前記第
１の電流制限用抵抗と共通接続してミユーテイン
グスイツチに接続し、第２のトランジスタのベー
ス・エミツタ間にベースインピーダンス低減用抵
抗を接続したことを特徴とするミユーテイング回
路。 A resistor is connected in series to the signal source, first and second switching transistors are connected in series between the other end of the resistor and a reference potential, and a first current limiting resistor is connected to the base of the first transistor. At the same time, a series circuit of a second current limiting resistor and a diode is connected to the base of the second transistor, which is commonly connected to the first current limiting resistor and connected to a muting switch, and a second current limiting resistor is connected to the base of the second transistor. A muting circuit characterized in that a resistor for reducing base impedance is connected between the base and emitter of a transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4317886U JPS62155507U (en) | 1986-03-25 | 1986-03-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4317886U JPS62155507U (en) | 1986-03-25 | 1986-03-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62155507U true JPS62155507U (en) | 1987-10-02 |
Family
ID=30859792
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4317886U Pending JPS62155507U (en) | 1986-03-25 | 1986-03-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62155507U (en) |
-
1986
- 1986-03-25 JP JP4317886U patent/JPS62155507U/ja active Pending