JPS62152292U - - Google Patents
Info
- Publication number
- JPS62152292U JPS62152292U JP4044786U JP4044786U JPS62152292U JP S62152292 U JPS62152292 U JP S62152292U JP 4044786 U JP4044786 U JP 4044786U JP 4044786 U JP4044786 U JP 4044786U JP S62152292 U JPS62152292 U JP S62152292U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- signal
- outputs
- lead
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
Description
第１図は本考案の実施例を示す回路図である。
１２…発振器、１４…分周回路、１６…秒カウ
ンタ、２０…分カウンタ、２４…時カウンタ、２
８…メイン回路、３０…修正可能スイツチ、３２
…秒修正スイツチ、３４…分修正スイツチ、４０
…第１アンド回路、４２…第２アンド回路、４４
…第３アンド回路、４８…デコーダ、５２…進み
判別回路、５４…フリツプフロツプ、５６…パル
スカウンタ、６０…カウント方向切換回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. 12... Oscillator, 14... Frequency dividing circuit, 16... Second counter, 20... Minute counter, 24... Hour counter, 2
8... Main circuit, 30... Modifiable switch, 32
...Second correction switch, 34...Minute correction switch, 40
...First AND circuit, 42...Second AND circuit, 44
...Third AND circuit, 48...Decoder, 52...Advance discrimination circuit, 54...Flip-flop, 56...Pulse counter, 60...Counting direction switching circuit.
Claims (1)
出力を別の一定周期の基準信号に変える分周回路
と、 該基準信号をカウントして時刻信号を形成する
秒カウンタ、分カウンタ及び時カウンタと、 前記秒カウンタのカウント値をクリアする秒修
正スイツチと、 を少なくとも具えている電子時計において、 前記分カウンタをアツプダウンカウンタを用い
て構成すると共に、 前記分カウンタのカウント値が予め設定された
範囲内のときに前記秒修正スイツチが操作される
と進み誤差判別信号を出力する進み判別回路と、 前記アツプダウンカウンタを通常はアツプカウ
ント状態とし、前記進み誤差判別信号が出力され
た場合にのみ一定時間内だけ、アツプダウンカウ
ンタをダウンカウント状態とさせるカウント切換
信号を出力するカウント方向切換回路と、 を設けたことを特徴とする進み誤差修正機能付電
子時計。[Claims for Utility Model Registration] An oscillator that outputs a signal with a constant cycle, a frequency dividing circuit that converts the output of the oscillator into a reference signal with a different constant cycle, and a second counter that counts the reference signal to form a time signal. , a minute counter, an hour counter, and a second correction switch for clearing the count value of the second counter, wherein the minute counter is configured using an up-down counter, and the minute counter is configured with an up-down counter; a lead discrimination circuit that outputs a lead error discrimination signal when the second correction switch is operated when the value is within a preset range; and a lead discrimination circuit that outputs a lead error discrimination signal; An electronic timepiece with a leading error correction function, comprising: a count direction switching circuit that outputs a count switching signal that causes an up-down counter to be in a down-counting state only within a certain period of time when the up-down counter is output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4044786U JPS62152292U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4044786U JPS62152292U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62152292U true JPS62152292U (en) | 1987-09-26 |
Family
ID=30854536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4044786U Pending JPS62152292U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62152292U (en) |
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1986
- 1986-03-18 JP JP4044786U patent/JPS62152292U/ja active Pending