JPS62147931U - - Google Patents
Info
- Publication number
- JPS62147931U JPS62147931U JP3670786U JP3670786U JPS62147931U JP S62147931 U JPS62147931 U JP S62147931U JP 3670786 U JP3670786 U JP 3670786U JP 3670786 U JP3670786 U JP 3670786U JP S62147931 U JPS62147931 U JP S62147931U
- Authority
- JP
- Japan
- Prior art keywords
- fet
- main line
- circuit
- switch
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Description
第１図はこの考案のＦＥＴスイツチの一実施例
の構成図、第２図はＦＥＴの動作原理を説明する
ためのＦＥＴ部簡略等価回路、第３図はこの考案
の他の実施例を示すＦＥＴ並列装荷型スイツチの
構成図、第４図は従来のＦＥＴ直列装荷型スイツ
チの構成図である。
図において、１は主線路、２は分岐線路、３は
ＦＥＴ、４はインダクター、５はコンデンサー、
６，７はλｇ／４線路、８はコンデンサー、９は
ロジツクバツフア、１０はドレインソース間総容
量、１１はドレインソース間抵抗、１２はレベル
変換回路である。なお、図中、同一等号は同一又
は相当部分を示す。
Fig. 1 is a block diagram of one embodiment of the FET switch of this invention, Fig. 2 is a simplified equivalent circuit of the FET section to explain the operating principle of the FET, and Fig. 3 is an FET showing another embodiment of this invention. FIG. 4 is a block diagram of a conventional FET series-loaded switch. In the figure, 1 is the main line, 2 is the branch line, 3 is the FET, 4 is the inductor, 5 is the capacitor,
6 and 7 are λg/4 lines, 8 is a capacitor, 9 is a logic buffer, 10 is a total drain-source capacitance, 11 is a drain-source resistance, and 12 is a level conversion circuit. In addition, in the figures, the same and equal signs indicate the same or equivalent parts.
Claims (1)
に接続された少なくとも２個のＦＥＴスイツチと
、これらのＦＥＴスイツチのゲートと前記主線路
に直流駆動電圧を与える回路と、前記主回路およ
び前記ＦＥＴのゲートを大地電位から直流的に遮
断するコンデンサとを備えたＦＥＴスイツチ。 at least two FET switches connected in parallel to one end of a main line through which microwaves pass; a circuit for applying a DC drive voltage to the gates of these FET switches and the main line; and the main circuit and the FET. A FET switch equipped with a capacitor that cuts off the gate of the switch from ground potential using direct current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3670786U JPS62147931U (en) | 1986-03-11 | 1986-03-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3670786U JPS62147931U (en) | 1986-03-11 | 1986-03-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62147931U true JPS62147931U (en) | 1987-09-18 |
Family
ID=30847363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3670786U Pending JPS62147931U (en) | 1986-03-11 | 1986-03-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62147931U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998006174A1 (en) * | 1996-08-05 | 1998-02-12 | Mitsubishi Denki Kabushiki Kaisha | High-frequency integrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage |
-
1986
- 1986-03-11 JP JP3670786U patent/JPS62147931U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998006174A1 (en) * | 1996-08-05 | 1998-02-12 | Mitsubishi Denki Kabushiki Kaisha | High-frequency integrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage |
| GB2331879A (en) * | 1996-08-05 | 1999-06-02 | Mitsubishi Electric Corp | High frequency intergrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage |
| GB2331879B (en) * | 1996-08-05 | 2001-03-28 | Mitsubishi Electric Corp | Radio-frequency integrated circuit for a radio-frequency wireless transmitter-receiver with reduced influence by radio-frequency power leakage |