JPS62114539U - - Google Patents

Info

Publication number
JPS62114539U
JPS62114539U JP137186U JP137186U JPS62114539U JP S62114539 U JPS62114539 U JP S62114539U JP 137186 U JP137186 U JP 137186U JP 137186 U JP137186 U JP 137186U JP S62114539 U JPS62114539 U JP S62114539U
Authority
JP
Japan
Prior art keywords
effect transistor
power source
field effect
control circuit
load driving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP137186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP137186U priority Critical patent/JPS62114539U/ja
Publication of JPS62114539U publication Critical patent/JPS62114539U/ja
Pending legal-status Critical Current

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  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案回路の1実施例の回路構成図、
第2図、第3図は従来例の回路構成図である。 E……第1電源、A……制御回路、E……
第2電源、C……電界効果トランジスタ、R……
抵抗。
FIG. 1 is a circuit configuration diagram of one embodiment of the circuit of the present invention,
FIGS. 2 and 3 are circuit configuration diagrams of conventional examples. E1 ...First power supply, A...Control circuit, E2 ...
Second power supply, C...field effect transistor, R...
resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1電源により駆動される制御回路と、第2電
源により駆動される負荷駆動用電界効果トランジ
スタとにより構成され、前記制御回路からの信号
を、前記負荷駆動用電界効果トランジスタのゲー
トに加える電界効果トランジスタ駆動回路におい
て、前記第1電源と前記第2電源の電圧基準点間
の配線に、抵抗もしくはインダクタンスを挿入し
てなることを特徴とする電界効果トランジスタ駆
動回路。
The field effect transistor is configured by a control circuit driven by a first power source and a load driving field effect transistor driven by a second power source, and applies a signal from the control circuit to the gate of the load driving field effect transistor. 1. A field-effect transistor drive circuit, characterized in that a resistor or inductance is inserted in the wiring between the voltage reference points of the first power source and the second power source.
JP137186U 1986-01-09 1986-01-09 Pending JPS62114539U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP137186U JPS62114539U (en) 1986-01-09 1986-01-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP137186U JPS62114539U (en) 1986-01-09 1986-01-09

Publications (1)

Publication Number Publication Date
JPS62114539U true JPS62114539U (en) 1987-07-21

Family

ID=30779218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP137186U Pending JPS62114539U (en) 1986-01-09 1986-01-09

Country Status (1)

Country Link
JP (1) JPS62114539U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2839206B2 (en) * 1990-08-03 1998-12-16 コングドン,ジェームズ,エス. 3-terminal non-inverting transistor switch

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2839206B2 (en) * 1990-08-03 1998-12-16 コングドン,ジェームズ,エス. 3-terminal non-inverting transistor switch

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