JPS6214668Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a series of multilayer ceramic capacitors in which a large number of lead wires are held at intervals on a band-shaped taping member, and a multilayer ceramic capacitor is sandwiched between a pair of adjacent lead wires. .

Multilayer ceramic capacitors are compact and have large capacitance, can be bonded to a flat conductive pattern by being made into chips, have excellent frequency characteristics up to a high frequency range, and have a uniform external shape that makes it easy to print. It has excellent features such as being able to be automatically inserted when mounted on a board, etc., and has recently been used in advanced electronic devices such as ultra-thin radios, ultra-compact transceivers, tape recorders, calculators, and electronic tuners. , the amount used continues to increase with the trend towards higher density packaging.

FIG. 1 shows a cross-sectional view of a conventionally known multilayer ceramic capacitor, in which a dielectric ceramic layer a 1 is formed inside a flat rectangular dielectric ceramic ₁ along its thickness t direction.
A plurality of internal electrodes 2a ₁ to 2a ₄ , 2b ₁ via ~a ₆
~ 2b ₃ is buried in a layered manner, and internal electrodes 2a ₁ ~
One end of opposite sides of 2a ₄ and 2b ₁ to 2b ₃ is conductively connected to end electrodes 3 and 4 provided on the side surface, respectively. Therefore, the internal electrodes 2a ₁ to 2a ₄ are connected in parallel to the end electrode 3.
The internal electrodes 2b ₁ to 2b ₃ are connected in parallel to
A capacitance is formed between the internal electrodes 2a ₁ -2b ₁ ...2a ₂ -...-2a ₄ by the dielectric ceramic layers a ₁ -a ₆ .

By the way, in order to save labor in the manufacturing process of electronic components such as capacitors and resistors, and to automatically insert them into printed circuit boards using automatic insertion machines, the second
A series of electronic components as shown in the figure is known. This consists of a retaining band 5a made of insulating paper or the like and an adhesive tape 5.
Electronic components 6 such as capacitors or resistors are placed on the band-shaped taping member 5 composed of
are held at regular intervals by the lead wires 7 and 8, and are wound around a winding frame or the like.

Using the laminated ceramic capacitor shown in Figure 1,
When trying to configure a series of multilayer porcelain capacitors,
As shown in FIGS. 3A and 3B, the end electrodes 3 and 4
must be held between the lead wires 7 and 8.

However, although the thickness t of this multilayer ceramic capacitor is very thin, for example, around 1 mm, the width W is relatively large, around 10 mm. Inconveniences arise, such as the wires 7 and 8 sometimes falling off, and furthermore, when the taping member 5 is wound, the thickness of only the multilayer ceramic capacitor becomes abnormally thick.

In order to eliminate the drawbacks of the conventional multilayer ceramic capacitors as described above, multilayer ceramic capacitors shown in FIGS. 4A and 4B have been proposed. This multilayer ceramic capacitor has dielectric ceramic layers in the thickness direction of dielectric ceramic 1.
A plurality of internal electrodes 2a ₁ to 2a ₄ and 2b ₁ via a ₁ to _{a 6}
~ 2b ₃ are buried in a layered manner, and the internal electrodes 2a ₁ ~ 2a ₄ ,
Opposite ends of 2b ₁ to 2b ₃ are conductively connected to the end electrodes 3 and 4, respectively, and extraction electrodes are connected to the end electrodes 3 and 4 separately on two surfaces of the dielectric ceramic 1 in the thickness direction. 9 and 10 are provided.

With such a structure, when connecting the capacitors, as shown in FIG.
When the multilayer ceramic capacitor is clamped between the lead wires 7 and 8 taped above, the extraction electrodes 9 and 10 are connected to the open ends 7a and 8a of the lead wires 7 and 8.
Since the multilayer ceramic capacitor can be clamped so as to be in pressure contact between the lead wires 7 and 8, the work of attaching the multilayer ceramic capacitor to the lead wires 7 and 8 is facilitated, and the attachment strength is increased.

Moreover, since the interval between the extraction electrodes 9 and 10 is as thin as, for example, about 1 mm, the open ends 7a and 8a can be held stably without being forced to expand.

In addition, since the electrode area of the extraction electrodes 9 and 10 can be increased, the lead wires 7 and
The shapes of the open ends 7a, 8a of 8 can also be freely processed into shapes that can be clamped most effectively, and the effect of increasing the mounting strength by enlarging the soldering surface can also be obtained. However, the above-described multilayer ceramic capacitor also had the following drawbacks.

(1) The electrode materials for the internal electrodes 2a ₁ to 2a ₄ and 2b ₁ to 2b ₃ are expensive, making the product expensive.
That is, internal electrodes 2a ₁ to 2a ₄ , 2b ₁ to 2b ₃
is constructed using a noble metal with a high melting point that can withstand a firing temperature of 1100 to 1400°C, such as platinum-palladium. This is because it is necessary to provide the electrode, which increases the electrode area.

(2) The cost of electrode materials for the end electrodes 3 and 4 is high, making the product expensive. In other words, the end electrodes 3 and 4 must be provided on almost the entire surface of both sides of the dielectric ceramic 1, and the electrode area is large, and expensive electrode materials such as Ag-Pd alloys are used to ensure good soldering. Therefore, the cost of forming the end electrodes 3 and 4 was high.

(3) Problems such as capacity variation and capacity drop are likely to occur. In other words, the conventional multilayer ceramic capacitor is
Dielectric ceramic layers a 1 to _{a 6} are provided on both sides of the dielectric ceramic ₁ .
Internal electrodes 2a ₁ to 2a ₄ and 2b ₁ to 2
b ₃ is exposed for a long time, and the tight bonding force in this part is weakened. Moreover, the internal electrodes 2a ₁ to 2
Since there is a difference in coefficient of thermal expansion between a ₄ , 2b ₁ to 2b ₃ and the dielectric ceramic 1, thermal stress is generated on the contact surface between them during or after firing. Therefore, the internal electrodes 2a ₁ to 2a ₄ and 2b ₁ to 2b ₃ are made of dielectric ceramic layers.
It peels off from a ₁ to _{a 6} to create a gap, or it is embedded in the dielectric ceramic layers a ₁ to _{a 6} , causing variations in capacity or a drop in capacity.

(4) Cracks may occur in the dielectric ceramic 1 during barrel polishing.

After firing, a barrel polishing process may be performed to improve the electrical connection between the internal electrodes 2a ₁ to 2a ₄ and 2b ₁ to 2b ₃ and the end electrodes 3 and 4. However, there are internal electrodes 2a ₁ ~ on both sides of the dielectric ceramic 1.
Since one end edge of 2a ₄ , 2b ₁ to 2b ₃ is exposed for a long time, the dielectric ceramic 1 gets stuck during barrel polishing, causing cracks, resulting in a decrease in yield and variations in capacity.

(5) When connecting capacitors, it is necessary to insert the end electrodes 3 and 4 between the lead wires 7 and 8 while checking the directionality of the end electrodes 3 and 4 with respect to the lead wires 7 and 8, resulting in poor work efficiency. That is, when connecting the capacitors, the multilayer ceramic capacitors are connected to the lead wires 7-8.
When inserted between them, it is necessary to insert them in a direction in which the side end surfaces of the end electrodes 3 and 4 are parallel to the lead wires 7 and 8, as shown in FIG. If this is inserted with the side end surfaces of the end electrodes 3 and 4 perpendicular to the lead wires 7 and 8, that is, rotated 90 degrees from the position shown in FIG.
The leads 7 or 8 will pass in close proximity over the potentially different end electrodes 4 or 3. Therefore, between the lead wire 7 and the end electrode 4 which are different in potential, and between the lead wire 8
It becomes impossible to secure a sufficient insulation distance between the terminal electrode 3 and the end electrode 3, which not only lowers the dielectric strength voltage, but also causes the lead wire 7 and the end This causes problems such as electrical short circuit between the end electrode 4 or the lead wire 8 and the end electrode 3. In order to avoid such problems, as shown in FIG. At the same time, the electronic component must be inserted between the lead wires 7 and 8.

However, this type of multilayer ceramic capacitor
It is small and thin, and it is difficult to visually identify the end electrodes 3 and 4. Therefore, it is difficult to confirm the direction, and the direction is often misperceived. When the length:width ratio of the dielectric ceramic 1 is increased, the difference between the length in the vertical direction and the length in the horizontal direction becomes large, so it is relatively easy to check the directionality. The closer the ratio is to 1:1, the more difficult it becomes to confirm direction.

(6) The insulating gap that electrically separates the extraction electrode 9 and the end electrode 3 and the insulating gap that electrically separates the extraction electrode 10 and the end electrode 4 are made of the same dielectric material as the extraction electrodes 9 and 10. It is formed in a planar shape on the surface of the porcelain 1. For this reason, the surface properties of the dielectric ceramic 1, for example, the lead wires 7,
The insulation in the insulating gap is likely to deteriorate due to adhesion of solder and flux droplets when soldering 8, and electrical short circuits due to silver migration are likely to occur.

(7) If an attempt is made to increase the dielectric strength voltage by increasing the insulation gap, the area of the extraction electrodes 9 and 10 will be reduced, and the acquired capacity will be reduced. On the other hand, if an attempt is made to increase the acquisition capacity by increasing the area of the extraction electrodes 9 and 10, the insulation gap will be reduced and the dielectric strength voltage will be lowered. That is, with the conventional structure, it is not possible to simultaneously improve the dielectric strength and increase the acquired capacity.

The present invention eliminates the above-mentioned drawbacks, significantly reduces the electrode formation cost of multilayer ceramic capacitors, eliminates problems such as capacitance variation and capacitance drop, and
The purpose of the present invention is to provide a high-quality, highly reliable, and inexpensive multilayer porcelain capacitor series that is easy to manufacture, has excellent electrical insulation properties, and has no direction when connecting capacitors.

In order to achieve the above object, the present invention provides a multilayer ceramic capacitor series in which a large number of lead wires are held at intervals on a strip-shaped taping member, and a multilayer ceramic capacitor is sandwiched between a pair of adjacent lead wires. , the multilayer ceramic capacitor has a plurality of internal electrodes embedded in a layered manner through dielectric ceramic layers in the thickness direction of the dielectric ceramic, and the inside of the dielectric ceramic layer is buried in the thickness direction at every interval of the internal electrodes. The conductive parts are electrically connected to each other by conductive parts, and the conductive parts are electrically connected to lead-out electrodes provided on two surfaces of the dielectric ceramic in the thickness direction. The electrode is formed inside the outer periphery of the dielectric porcelain so that a gap is formed between the outer periphery of the dielectric porcelain and the outer periphery of the dielectric porcelain. It is characterized in that it is formed inside the outer periphery of the dielectric ceramic so as to create a gap, and the lead wires are surface-fixed to each of the extraction electrodes.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The content of the present invention will be specifically explained in detail below with reference to the accompanying drawings, which are examples. FIG. 6 is a sectional view of a multilayer ceramic capacitor incorporated in a multilayer ceramic capacitor series according to the present invention, _FIG .
Figures _A2 to _A5 are cross-sectional views taken along lines _X1 - _X1 to _X4 - _X4 in Figure 6.

In this embodiment, a plurality of internal electrodes 2A ₁ to 2A ₄ are embedded in layers in the thickness direction of a rectangular dielectric ceramic 1 with dielectric ceramic layers B ₂ to B ₄ interposed therebetween. The internal electrodes 2A ₁ to 2A ₄ are constructed using an electrode material such as a base metal with a high melting point that can withstand a firing temperature of 1100 to 1400°C, such as platinum-palladium _. As shown in ~ _A5 , the gap _g1 is formed inward from the outer periphery of the dielectric ceramic layers _B2 ~ _B5 . Therefore, internal electrode 2
The entire peripheries of A ₁ to 2A ₄ are buried inside the dielectric ceramic 1 and are not exposed to the outside. With such a structure, the outer periphery of the dielectric ceramic 1 becomes a firing bond between the dielectric ceramic layers, so the firing bonding force becomes extremely strong, and even if the internal electrodes 2A ₁ to 2A ₄ and the dielectric ceramic 1 Even if thermal stress occurs due to the difference in thermal expansion coefficient between the internal electrodes 2A ₁ ~
2A ₄ peeling accidents are prevented and variations in capacity are eliminated.

Semicircular arc-shaped gaps g ₂ are provided at the edge portions of the internal electrodes 2A ₁ to 2A ₄ at intermediate portions in the width direction, and are arranged alternately between the adjacent internal electrodes 2A ₁ to 2A ₄ . The internal electrodes _{2A 1} to 2A 4 are electrically connected to each other by conductive portions C ₁ and C ₂ passing through the internal electrodes 2A ₁ to 2A ₄ at intervals. That is, the internal electrodes 2A ₁ and 2A ₃ are electrically connected to each other by the conductive portion C ₂ , and the internal electrodes 2A ₂ and 2A ₄ are electrically connected to each other by the conductive portion C ₁ . These conductive parts C ₁ , C ₂
further penetrates the dielectric ceramic layers B ₁ and B ₅ and is electrically connected to extraction electrodes 9 and 10 provided on two surfaces of the dielectric ceramic 1 in the thickness direction.

As described above, the internal electrodes 2A ₁ to 2A ₄ and the extraction electrodes 9 and 10 are electrically connected to each other by the conductive parts C ₁ and C ₂ passing through the inside of the dielectric ceramic 1. , it is not necessary to extend the internal electrodes 2A ₁ to 2A ₄ to the end of the dielectric ceramic 1 as in the conventional case, and the gap g ₁ can be formed inside, and the cost of electrode materials can be reduced accordingly. .

Further, since the portion corresponding to the conventional end electrode can be formed by the conductive portions C ₁ and C ₂ having a much smaller area, the electrode material cost for this portion can be reduced significantly.

Furthermore, with the above-described structure, barrel polishing and end electrode coating steps are not required, so the process can be shortened and costs can be reduced, and at the same time, it is possible to prevent cracks from occurring in the dielectric ceramic 1. can.

FIG. 8 is a partial plan view of a series of multilayer ceramic capacitors according to the present invention using the multilayer ceramic capacitors shown in FIGS. 6 and 7. Taping member 5
A large number of lead wires are held at intervals on the top,
A multilayer ceramic capacitor is sandwiched between a pair of adjacent lead wires 7-8. Here, since the multilayer ceramic capacitor has lead electrodes 9 and 10 provided on two opposing surfaces in the thickness direction of the dielectric ceramic 1, the lead wires 7 and 8 taped on the taping member 5 are connected between the lead wires 7 and 8. The electrodes 9 and 10 are the lead wires 7,
It can be clamped so as to be in pressure contact between the open ends 7a and 8a of 8. Therefore, the work of attaching the multilayer ceramic capacitor to the lead wires 7 and 8 becomes easy, and the attachment strength increases. Moreover, since the distance between the lead wires 7-8 is as small as the thickness of the dielectric ceramic 1, for example, about 1 mm, the open end 7a,
8a can be held stably without causing a situation where it is forcibly expanded. Further, since the extraction electrodes 9 and 10 are provided on the surface of the dielectric ceramic 1 in the thickness direction, and the area of the electrodes can be widened, the lead wires 7 and 10 can be provided correspondingly.
The shapes of the open ends 7a, 8a of 8 can also be freely processed into shapes that can be clamped most effectively, and the effect of increasing the mounting strength by enlarging the soldering surface can also be obtained.

Further, the extraction electrodes 9 and 10 are attached to the outer periphery of the dielectric ceramic 1 so that a gap _g3 is created between the entire circumference of the outer periphery and the outer periphery of the dielectric ceramic 1, as shown in FIG. 7A1. Since the lead wires are formed on the inner side, the relationship between the lead electrodes 9 and 10 with respect to the side end surface of the dielectric ceramic 1 is the same over the entire circumference of the side end surface of the dielectric ceramic 1, and when connecting the capacitors, the lead wires 8,
The directionality of the extraction electrodes 9 and 10 with respect to 7 is eliminated. Therefore, there is no need to check the direction,
The work of inserting the multilayer ceramic capacitor into the lead wires 7 and 8 can be automated, and mass productivity can be improved.

Further, the extraction electrodes 9 and 10 are formed inside the outer periphery of the dielectric ceramic 1 so that a gap g ₃ is created between the entire circumference of the outer periphery thereof and the outer periphery of the dielectric ceramic 1. Therefore, the insulating gap between the extraction electrodes 9 and 10 becomes a three-dimensional path from one side of the extraction electrode 9, passing through the side end face, to the other side where the extraction electrode 10 is located. Because of this three-dimensional insulation gap, the dielectric porcelain 1 with the extraction electrodes 9 and 10
At the same time, the insulation distance between the lead electrodes 9 and 10 becomes longer, and the dielectric strength voltage becomes higher. Furthermore, since the insulating gap is three-dimensional, short circuits between electrodes due to silver migration are less likely to occur, improving reliability.

FIG. 9 shows an example of a method for manufacturing a multilayer ceramic capacitor used in a multilayer ceramic capacitor series according to the present invention.

First, rectangular dielectric ceramic sheets B ₁ to B ₅ called green sheets are prepared, and conductive parts C ₁ and C ₂ are formed at the same positions at the ends of the dielectric ceramic sheets B ₁ to B ₅ . Through holes D ₁ and D ₂ are provided. Then, conductive patterns 2A ₁ to 2A ₄ that will become internal electrodes and conductive patterns 9 and 10 that will become extraction electrodes are printed on the surfaces of the dielectric ceramic sheets B ₁ to _{B 5} . During this print formation, the printing paste is also dripped into the through holes D ₁ and D ₂ .

Next, the dielectric ceramic sheets B ₁ to _{B 5} are stacked so that their through holes D ₁ and D ₂ coincide with each other, and are heat-pressed to complete a multilayer ceramic capacitor having the structure shown in FIG. 6.

However, the present invention is not limited to such a manufacturing method, and can be similarly realized by a method in which dielectric ceramic layers and electrodes are alternately printed and laminated, a carrier film method, or the like.

As described in detail above, the multilayer ceramic capacitor series according to the present invention provides the following effects.

(a) The internal electrodes of the multilayer ceramic capacitor are formed inside the outer periphery of the dielectric porcelain so that a gap is created between the entire periphery of the outer periphery and the outer periphery of the dielectric porcelain. The periphery becomes a sintered bond between the dielectric ceramic layers, and even if thermal stress occurs between the internal electrode and the dielectric ceramic due to the difference in thermal expansion coefficient, it prevents the internal electrode from peeling off and reduces the variation in capacity. disappears.

(b) Since the internal electrodes of the laminated ceramic capacitor are electrically connected to each other and the lead-out electrode by a conductive portion that runs through the inside of the dielectric ceramic in the thickness direction, the cost of electrode materials can be reduced.

(c) Barrel polishing and end electrode coating processes for laminated ceramic capacitors are no longer necessary, which shortens the process and reduces costs, while at the same time preventing cracks from occurring in the dielectric ceramic.

(d) The take-out electrodes of a multilayer ceramic capacitor are provided on two surfaces of the dielectric ceramic in the thickness direction, so when obtaining a capacitor series, the take-out electrodes are placed between the lead wires taped on the taping member. It can be clamped so that it is pressed between the ends. Therefore, the work of attaching the multilayer ceramic capacitor to the lead wire becomes easy, and the attachment strength increases. Moreover, the distance between the lead wires is determined by the thickness of the dielectric porcelain, for example, 1 mm.
Since the lead wire is small in size, the lead wire can be held stably without causing a situation where the open end of the lead wire is forcibly expanded.

(e) Since the extraction electrode is provided on the surface of the dielectric ceramic in the thickness direction, the electrode area can be increased. For this reason, when connecting capacitors,
The shape of the open end of the lead wire can be freely processed into a shape that can be clamped most effectively, and the effect of increasing the mounting strength by expanding the soldering surface can also be obtained.

(F) The extraction electrode is formed inside the outer periphery of the dielectric porcelain so that a gap is created between the entire periphery of the outer periphery and the outer periphery of the dielectric porcelain. , the directionality of the extraction electrode with respect to the lead wire is lost. Therefore, there is no need to check the directionality, and the process of inserting the multilayer ceramic capacitor into the lead wire can be automated.
Mass productivity can be improved.

(G) The extraction electrode should be arranged so that a gap is created between the entire circumference of its outer periphery and the outer periphery of the dielectric ceramic.
Since it is formed inside the outer periphery of the dielectric ceramic, the insulation gap between the extraction electrodes is a three-dimensional path from one side where the extraction electrode is located, passing through the side end face to the other side where the extraction electrode is located. Become. Because of this three-dimensional insulation gap, a decrease in insulation resistance due to the surface texture of the dielectric ceramic on which the lead-out electrodes are located is prevented, and at the same time, the insulation distance between the lead-out electrodes is increased, and the dielectric strength voltage is increased.

(H) As described above, by making the insulation gap between the extraction electrodes three-dimensional, short circuits between the electrodes due to silver migration are less likely to occur, and reliability is improved.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a conventional multilayer ceramic capacitor.
FIG. 2 is a perspective view of an electronic component series, FIGS. 3A and 3B are diagrams illustrating the disadvantages of obtaining a multilayer ceramic capacitor series using the conventional multilayer ceramic capacitor shown in FIG. 1, and FIG. 4A is a perspective view of the previously proposed multilayer ceramic capacitor, FIG. 4B is a cross-sectional view thereof, and FIG. 5 is a front view showing part of a multilayer ceramic capacitor series using the multilayer ceramic capacitor shown in FIG. ,
Fig. 6 is a cross-sectional view of a multilayer ceramic capacitor incorporated in a multilayer ceramic capacitor series according to the present invention, and Fig. 7
A ₁ is the same plan view, and Fig. 7 A ₂ to _{A 5} are Fig. 6.
A cross-sectional plan view at X ₁ -X ₁ to _{X 4} -X ₄ , Fig. 8 is a front view of a part of the multilayer ceramic capacitor series according to the present invention, and Fig. 9 is a cross-sectional view of a part of the multilayer ceramic capacitor series according to the present invention. It is a figure explaining the manufacturing method of a laminated ceramic capacitor. DESCRIPTION OF SYMBOLS 1...Dielectric ceramic _{, B1-B5...Dielectric ceramic layer, 2A1-2A4 ... Internal electrode} , _C1 , _C2 ...Conductive part, 5...Taping member, 7, 8... Lead wires, 9, 10...extracting electrodes.

Claims (1)

[Scope of utility model registration request] In a series of multilayer ceramic capacitors in which a large number of lead wires are held at intervals on a strip-shaped taping member 5 and a multilayer ceramic capacitor is sandwiched between a pair of adjacent lead wires 7 and 8, the multilayer ceramic capacitor is A plurality of internal electrodes _2A 1 to 2A ₄ are embedded in a layered manner through dielectric ceramic layers B ₁ to B ₅ in the thickness direction of the dielectric ceramic 1, and the internal electrodes 2A ₁ to 2A ₄
The dielectric ceramic layers B ₁ to B 5 are electrically connected to each other by conductive portions C ₁ and C ₂ passing through the interior of the dielectric ceramic layers B 1 to B ₅ in the thickness direction, and the conductive portions C ₁ and C ₂ are connected to the dielectric Take-out electrodes 9 provided on two surfaces in the thickness direction of the porcelain 1;
The internal electrodes 2A ₁ to 2A ₄ are connected to the outside of the dielectric ceramic 1 so that a gap g ₁ is created between the entire circumference of the outer periphery and the outer periphery of the dielectric ceramic 1. The extraction electrodes 9 and 10 are formed on the inner side of the outer circumference of the dielectric ceramic 1 so that a gap _g3 is created between the entire circumference of the outer circumference and the outer circumference of the dielectric ceramic 1. A series of multilayer ceramic capacitors characterized in that the lead wires 7 and 8 are formed on the inside and fixed to the lead wires 7 and 8 in a surface manner to each of the extraction electrodes 9 and 10.