JPS62145828A - Semiconductor device - Google Patents

Abstract

PURPOSE:To determine the electrostatic breakdown resistance of an MOS FET in a semiconductor device during manufacturing steps by providing a check pattern for measuring characteristics equivalent to forward and reverse characteristics of a gate protection diode sole unit. CONSTITUTION:n-Type diffused layer 22, 23 are formed by ion implanting on a p-type Si substrate 21, and p<+> type diffused layers 24, 25 are thereafter formed by diffusing boron. Then, n<+> type diffused layers 26 are formed by diffusing phosphorus, the layers 26 are respectively opened, and connected with aluminum electrodes 27 to obtain a check pattern having entirely the same sectional struc ture as a gate protection diode and formed in the same process. Thus, the electrostatic breakdown resistance of an MOS FET in a semiconductor device can be determined during manufacturing steps.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to an insulated gate field effect transistor (hereinafter referred to as MO8FF, T) and an 01
The present invention relates to a semiconductor device having a gate protection diode connected to a transistor.

[Conventional technology]

Conventionally, in this type of semiconductor device, the protection diode for the gate is connected in series with two P-N junction diodes, one in the forward direction and the other in the reverse direction, as shown in the circuit diagram of FIG. It was not possible to measure the forward and reverse characteristics of these two PN junction diodes alone. Furthermore, no check pattern having characteristics equivalent to those of the diode has been reported.

[Problem that the invention seeks to solve]

-L-mentioned MOS I? In E T, the electrostatic breakdown strength is determined by (+) the dielectric strength voltage of the gate oxide film of the MOS FET, (2) the breakdown strength of the P-N junction in the gate protection diode, and (3) the time constant (C) of the gate protection diode.
(R), etc., as described above. - Conventional semiconductor devices are manufactured by measuring the characteristics of the gate protection diode during the manufacturing process to ensure the reliability of the device. I couldn't do it.

An object of the present invention is to reduce M in a semiconductor device during the manufacturing process.
The object of the present invention is to provide a semiconductor device that can grasp the electrostatic breakdown resistance of an OS F''ET.

[Means for solving problems]

A semiconductor device of the present invention includes an insulated gate field effect transistor and a gate protection diode for preventing electrostatic breakdown or surge damage of the insulated gate of the insulated gate field effect transistor, wherein the gate protection diode alone It is constructed with a check pattern that can measure characteristics equivalent to the forward and reverse characteristics of .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of one embodiment of the present invention.

In FIG. 1, 1 is a MOS FET, 2 is a gate protection diode, and 3 is a check pattern formed in the same process and the same cross-sectional structure as the gate protection diode 2.

FIGS. 2 and 3 are schematic sectional views shown in order of steps to explain a manufacturing method according to an embodiment of the present invention.

In FIG. 2, an n-type diffusion layer 22 .
23 is formed using ion implantation. Thereafter, P+ type diffusion layers 24 and 25 are formed by boron diffusion.

Next, as shown in FIG. 3, an nF diffusion layer 26 is formed using phosphorus diffusion. Thereafter, by opening holes in each diffusion layer and connecting them with aluminum electrodes 27, a check pattern having exactly the same cross-sectional structure as the gate protection diode and formed by the same process can be obtained.

〔Effect of the invention〕

As explained above, the present invention provides a gate I/protection diode.
By measuring electrical characteristics such as DC forward voltage (Vp), DC reverse voltage (VR), capacitance, breakdown strength, etc. of diodes with check patterns that have the same cross-sectional structure and are formed in the same process. This has the effect of being able to grasp the electrostatic breakdown resistance of MOS FFs and Ts in a semiconductor device during the manufacturing process.

[Brief explanation of drawings]

FIG. 1 is a plan view of an embodiment of the present invention, FIGS. 2 and 3 are schematic cross-sectional views shown in order of steps to explain the manufacturing method of an embodiment of the present invention, and FIG. 4 is a conventional MOS F
FIG. 3 is a circuit diagram of ET and gate protection diode. 1...MOS FET, 2...Gate protection diode, 3...Check pattern, 21...P-type Si
Substrate, 22.23-n type diffusion layer, 24.25-P+ diffusion layer, 26...n+ diffusion layer, 27...aluminum electrode. 1st round difference 2 closed 4th round 3 figure

Claims (1)

[Claims] In a semiconductor device having an insulated gate field effect transistor and a gate protection diode for preventing electrostatic breakdown of the insulated gate of the insulated gate field effect transistor or breakdown due to a surge, forward and reverse directions of the single gate protection diode are provided. A semiconductor device with a check pattern that can measure characteristics equivalent to those of the semiconductor device.